From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0A30C433DB for ; Thu, 18 Feb 2021 19:08:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9535864E79 for ; Thu, 18 Feb 2021 19:08:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233809AbhBRTHq (ORCPT ); Thu, 18 Feb 2021 14:07:46 -0500 Received: from mail-lj1-f178.google.com ([209.85.208.178]:39332 "EHLO mail-lj1-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231401AbhBRRfE (ORCPT ); Thu, 18 Feb 2021 12:35:04 -0500 Received: by mail-lj1-f178.google.com with SMTP id u4so6588321ljh.6; Thu, 18 Feb 2021 09:34:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=+H5vXg85aSm3kKn9ABWRfBsJH0MBve5XT0w01S84ZnA=; b=qeBjF9FaK8ywxhhZy7dT8jsUL3y3Ish6j5VUAHUJKYGCvljvKN9OuaA+ZxZ1l1Krk9 3iV7SvfUelZKx+H7HuOZKsCus4DZNQuh1JJ/bYTNXWN0JoOkOvdH4d5dHWY25qMPHr4O O5C+apO4ztUKAxzuzRTcyb0skjK9tFX6TNBKmRljy+CRbIx0dUnidjTtm2yOKMudJA3n hRYSQfrNPOhy3vrXXvojdLSuuttF4IH3zkD9Bam/yMddJTNOEt3Fbn8tA9XdpCPm0hM1 OSH/S5lTx9eAMuvpnzLafMzPpl+rKfdMC9eOdkK8kRfHIJJ7Gs3QvzgBR5kazfrV0hAv GXKA== X-Gm-Message-State: AOAM5309T5kqtpz6SBt55dcnhcOrZAZsQLfn+F4mmviI0ht8VqtL7aya T5teVMJMucat9oKRafi7uis= X-Google-Smtp-Source: ABdhPJwl/ulks4iH3qRkRAtn+ihuBahk7zBSXH3/5QASJOyrDU/f5gUKrALLJoY/y819thiC3X6DmQ== X-Received: by 2002:a05:6512:3092:: with SMTP id z18mr2875307lfd.249.1613669646944; Thu, 18 Feb 2021 09:34:06 -0800 (PST) Received: from rocinante ([95.155.85.46]) by smtp.gmail.com with ESMTPSA id u9sm181117lfn.138.2021.02.18.09.34.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Feb 2021 09:34:06 -0800 (PST) Date: Thu, 18 Feb 2021 18:34:05 +0100 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Richard Zhu Cc: l.stach@pengutronix.de, helgaas@kernel.org, stefan@agner.ch, lorenzo.pieralisi@arm.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: Re: [PATCH] PCI: imx6: Limit DBI register length for imx6qp pcie Message-ID: References: <1613624980-29382-1-git-send-email-hongxing.zhu@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [...] > > Refer to commit 075af61c19cd ("PCI: imx6: Limit DBI register length"), > > i.MX6QP PCIe has the similar issue. > > Define the length of the DBI registers and limit config space to its > > length for i.MX6QP PCIe too. > > You could probably flip these two sentences around to make the commit > message read slightly better, so what about this (a suggestion): > > Define the length of the DBI registers and limit config space to its > length. This makes sure that the kernel does not access registers beyond > that point that otherwise would lead to an abort on a i.MX 6QuadPlus. > > See commit 075af61c19cd ("PCI: imx6: Limit DBI register length") that > resolves a similar issue on a i.MX 6Quad PCIe. [...] If you do decide to send another version, then also use "PCIe" in the subject, rather than "pcie". I forgot to mention this in the previous message, apologies. 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Thu, 18 Feb 2021 09:34:06 -0800 (PST) Received: from rocinante ([95.155.85.46]) by smtp.gmail.com with ESMTPSA id u9sm181117lfn.138.2021.02.18.09.34.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Feb 2021 09:34:06 -0800 (PST) Date: Thu, 18 Feb 2021 18:34:05 +0100 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Richard Zhu Subject: Re: [PATCH] PCI: imx6: Limit DBI register length for imx6qp pcie Message-ID: References: <1613624980-29382-1-git-send-email-hongxing.zhu@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210218_123408_556593_5D3EA497 X-CRM114-Status: GOOD ( 12.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lorenzo.pieralisi@arm.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, stefan@agner.ch, helgaas@kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org, l.stach@pengutronix.de Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org [...] > > Refer to commit 075af61c19cd ("PCI: imx6: Limit DBI register length"), > > i.MX6QP PCIe has the similar issue. > > Define the length of the DBI registers and limit config space to its > > length for i.MX6QP PCIe too. > > You could probably flip these two sentences around to make the commit > message read slightly better, so what about this (a suggestion): > > Define the length of the DBI registers and limit config space to its > length. This makes sure that the kernel does not access registers beyond > that point that otherwise would lead to an abort on a i.MX 6QuadPlus. > > See commit 075af61c19cd ("PCI: imx6: Limit DBI register length") that > resolves a similar issue on a i.MX 6Quad PCIe. [...] If you do decide to send another version, then also use "PCIe" in the subject, rather than "pcie". I forgot to mention this in the previous message, apologies. Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel