From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCCFCC433DB for ; Mon, 8 Feb 2021 06:57:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B02964E30 for ; Mon, 8 Feb 2021 06:57:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229784AbhBHG5z (ORCPT ); Mon, 8 Feb 2021 01:57:55 -0500 Received: from mail.kernel.org ([198.145.29.99]:58112 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229759AbhBHG5n (ORCPT ); Mon, 8 Feb 2021 01:57:43 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1A64964E6E; Mon, 8 Feb 2021 06:57:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1612767422; bh=NHVThXsdsWsn5OLyJXfv1c5uwH4fZPLlA6iF/5+HU/E=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=RYrQS+XhLjXw8uVV6RxZ6/YfJAbW72ULgHtvdBlnKXGCo39VU2WqGHI+B9hABmLTQ fhGfzGt5pKNUD95+O2gyk+ougVgvZpR998Jc8fXGEvONqYAfZZlSg19glIo5en9+AH rLj3zsykwgUwbcXfyYcWLbtTs/E+z+yfzG37syW4= Date: Mon, 8 Feb 2021 07:56:58 +0100 From: Greg KH To: Baruch Siach Cc: Felipe Balbi , linux-usb@vger.kernel.org, Andy Gross , Bjorn Andersson , linux-arm-msm@vger.kernel.org, Kathiravan T , Balaji Prakash J Subject: Re: [PATCH] usb: dwc3: reference clock configuration Message-ID: References: <8fc38cb73afd31269f1ea0c28e73604c53cebb17.1612764006.git.baruch@tkos.co.il> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8fc38cb73afd31269f1ea0c28e73604c53cebb17.1612764006.git.baruch@tkos.co.il> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon, Feb 08, 2021 at 08:00:06AM +0200, Baruch Siach wrote: > From: Balaji Prakash J > > DWC_USB3_GFLADJ and DWC_USB3_GUCTL registers contain options > to control the behavior of controller with respect to SOF and ITP. > The reset values of these registers are aligned for 19.2 MHz > reference clock source. This change will add option to override > these settings for reference clock other than 19.2 MHz > > Tested on IPQ6018 SoC based CP01 board with 24MHz reference clock. > > Signed-off-by: Balaji Prakash J > [ baruch: mention tested hardware ] > Signed-off-by: Baruch Siach > --- > .../devicetree/bindings/usb/dwc3.txt | 5 ++ Bindings should be split into a separate patch (1/2) so that the DT maintainers can review it easier. Also, always run checkpatch on your submissions before sending them out. thanks, greg k-h