From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DD67C433E0 for ; Tue, 16 Feb 2021 10:11:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40BA264DC3 for ; Tue, 16 Feb 2021 10:11:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229635AbhBPKLj (ORCPT ); Tue, 16 Feb 2021 05:11:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229626AbhBPKLj (ORCPT ); Tue, 16 Feb 2021 05:11:39 -0500 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BEE8C061574; Tue, 16 Feb 2021 02:10:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=M3sGSrTBwz4qNYhjumdWtmzUj5dwr3S+HhZN9jBgyco=; b=d2WIA82ke4d6idbElbNfc4JiTt 2CelTzoLni619XeJSNwMEn6uf8A5GxrMeYXv54drG9i38ULUj2AKPEPNty6Yskh6Ss5RPmhM0q0tF M/x8hbX7kygeHNqSb1IDfON8Y8i8Nldb81lTChkCH/Zvcf8WHOZShqpWpRk8uEJpoWOOXjrppfPnJ X8t7q/x5jqG2NrxnIquyNGWHb8q/VTI6A9L8wAFG9cf5Ecq1cl/ZtIyG07cHQllkaAYHCOgoHRV3d bDq5qwzkzpygGX2Dj+fwYWa4vlSBYkzDS4bdfzuQ5iZL8lOm34Gxk29cH3mb+8U0zuvLXslIE2XfL SNJvnonQ==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94 #2 (Red Hat Linux)) id 1lBxI3-00GjSg-DG; Tue, 16 Feb 2021 10:09:25 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id B468A3011E6; Tue, 16 Feb 2021 11:09:05 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 91A502B7E1C46; Tue, 16 Feb 2021 11:09:05 +0100 (CET) Date: Tue, 16 Feb 2021 11:09:05 +0100 From: Peter Zijlstra To: Ard Biesheuvel Cc: linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dave Martin , Mark Brown , Herbert Xu , Eric Biggers , Will Deacon , Catalin Marinas , Thomas Gleixner , Sebastian Andrzej Siewior , Ingo Molnar Subject: Re: [RFC PATCH 0/5] running kernel mode SIMD with softirqs disabled Message-ID: References: <20201218170106.23280-1-ardb@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201218170106.23280-1-ardb@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Fri, Dec 18, 2020 at 06:01:01PM +0100, Ard Biesheuvel wrote: > [ TL;DR for the non-ARM folks on CC: disabling softirq processing when using > SIMD in kernel mode could reduce complexity and improve performance, but we > need to decide whether we can do this, and how much softirq processing > latency we can tolerate. If we can find a satisfactory solution for this, > we might do the same for x86 and 32-bit ARM as well. ] > - could we do the same on x86, now that kernel_fpu_begin/end is no longer > expensive? Can't we simply save/restore the relevant register set? So something like (note amluto was wanting to add a regset argument): kernel_fpu_begin(MMX) kernel_fpu_begin(SSE) kernel_fpu_end(); ... kernel_fpu_end() Would have to save the MMX regs on first SIRQ invocation of kernel_fpu_begin(), and then have softirq context termination above, restore it. I mean, we already do much the same for the first kernel_fpu_begin(), that has to save the user registers, which will be restore when we go back to userspace. So why not do exactly the same for softirq context? From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC329C433E0 for ; Tue, 16 Feb 2021 10:12:06 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D7BE64DC3 for ; Tue, 16 Feb 2021 10:12:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D7BE64DC3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=e/Fkj80R+RXq0rjrolprreQyXY+8o4IEebIdr5xybFk=; b=expce+DVuMGmEzn2BcVTh36EG 9M2BSOSKYj4pDX5Dh78z6sJOFArLOJ1mkT7wenqvX6PZvNvp35WDOVaXLiMRaO5W07UgD8tZYl/Ut jMUEt53lQ0qW04ocazPqOs81EJN1vLHUhawCODEXYwiI4bZVPY067u65FUAEgy4ovCGJkM/MqzRyX SijrUR5sZyIYqWQrNo0aHI1Yd9/NZacmF0Yb2Zf/9pxWgaO1ghn3UB1F6G5Yae67gLI5W3ZMtdCNJ GUi/HmWLRfnk5me6K91WoOVB2Cwqs3kTFRuUYooJ2fyUtkcJFUAnTXFQ/0E4ixzYrYVFNLcw4baQQ +Qdao5eOw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lBxJ6-0005y0-Cv; Tue, 16 Feb 2021 10:10:12 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lBxJ4-0005xj-OW for linux-arm-kernel@merlin.infradead.org; Tue, 16 Feb 2021 10:10:10 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=M3sGSrTBwz4qNYhjumdWtmzUj5dwr3S+HhZN9jBgyco=; b=d2WIA82ke4d6idbElbNfc4JiTt 2CelTzoLni619XeJSNwMEn6uf8A5GxrMeYXv54drG9i38ULUj2AKPEPNty6Yskh6Ss5RPmhM0q0tF M/x8hbX7kygeHNqSb1IDfON8Y8i8Nldb81lTChkCH/Zvcf8WHOZShqpWpRk8uEJpoWOOXjrppfPnJ X8t7q/x5jqG2NrxnIquyNGWHb8q/VTI6A9L8wAFG9cf5Ecq1cl/ZtIyG07cHQllkaAYHCOgoHRV3d bDq5qwzkzpygGX2Dj+fwYWa4vlSBYkzDS4bdfzuQ5iZL8lOm34Gxk29cH3mb+8U0zuvLXslIE2XfL SNJvnonQ==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94 #2 (Red Hat Linux)) id 1lBxI3-00GjSg-DG; Tue, 16 Feb 2021 10:09:25 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id B468A3011E6; Tue, 16 Feb 2021 11:09:05 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 91A502B7E1C46; Tue, 16 Feb 2021 11:09:05 +0100 (CET) Date: Tue, 16 Feb 2021 11:09:05 +0100 From: Peter Zijlstra To: Ard Biesheuvel Subject: Re: [RFC PATCH 0/5] running kernel mode SIMD with softirqs disabled Message-ID: References: <20201218170106.23280-1-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201218170106.23280-1-ardb@kernel.org> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Herbert Xu , Catalin Marinas , Sebastian Andrzej Siewior , linux-kernel@vger.kernel.org, Ingo Molnar , Eric Biggers , Mark Brown , linux-crypto@vger.kernel.org, Thomas Gleixner , Will Deacon , Dave Martin , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Dec 18, 2020 at 06:01:01PM +0100, Ard Biesheuvel wrote: > [ TL;DR for the non-ARM folks on CC: disabling softirq processing when using > SIMD in kernel mode could reduce complexity and improve performance, but we > need to decide whether we can do this, and how much softirq processing > latency we can tolerate. If we can find a satisfactory solution for this, > we might do the same for x86 and 32-bit ARM as well. ] > - could we do the same on x86, now that kernel_fpu_begin/end is no longer > expensive? Can't we simply save/restore the relevant register set? So something like (note amluto was wanting to add a regset argument): kernel_fpu_begin(MMX) kernel_fpu_begin(SSE) kernel_fpu_end(); ... kernel_fpu_end() Would have to save the MMX regs on first SIRQ invocation of kernel_fpu_begin(), and then have softirq context termination above, restore it. I mean, we already do much the same for the first kernel_fpu_begin(), that has to save the user registers, which will be restore when we go back to userspace. So why not do exactly the same for softirq context? _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel