From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C0AFC433E9 for ; Wed, 10 Mar 2021 22:40:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 06E5F64FD0 for ; Wed, 10 Mar 2021 22:40:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232051AbhCJWjk (ORCPT ); Wed, 10 Mar 2021 17:39:40 -0500 Received: from mail.kernel.org ([198.145.29.99]:58734 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229574AbhCJWjd (ORCPT ); Wed, 10 Mar 2021 17:39:33 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 9440864FAD; Wed, 10 Mar 2021 22:39:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1615415973; bh=/46Jnxa7GWN9GVouuxzmFfEuec3FnGDcKOJciHOHIws=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=RQVhIJPvxkTfFjVIPmqOKZDu2W4Nh4bCefUys/PH4bS7IXAKLvuIGeL9yhBYKdFP5 lksoks30ZjiCv8ilR8KqVY0PdBbpG0g0TNcfZHYk6hwqtefg7gFEAY87X7yt8mhdol QJ2wOLKtIHhcKvcevYhkWhkRCocXou2LN0rCUhk4Zwgl/MnwRYDLqQcrzt1v6lVUMJ Lb+tXWCBqUqRthdAEPSfKPBq6I4FMl068ag+2rhpdfTX7oWzWweApQZ/DYZhaSw0nL DnvADmCkmQa8QE8r3T5gVPAbIyjReGYNV0r37VQZ0hTFu5acOicAQLQ41bdECi4BzT VOU+cnaHYAdzQ== Date: Thu, 11 Mar 2021 00:39:09 +0200 From: Jarkko Sakkinen To: Yu-cheng Yu Cc: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang Subject: Re: [PATCH v22 8/8] x86/vdso: Add ENDBR64 to __vdso_sgx_enter_enclave Message-ID: References: <20210310220519.16811-1-yu-cheng.yu@intel.com> <20210310220519.16811-9-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210310220519.16811-9-yu-cheng.yu@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 10, 2021 at 02:05:19PM -0800, Yu-cheng Yu wrote: > When CET is enabled, __vdso_sgx_enter_enclave() needs an endbr64 > in the beginning of the function. OK. What you should do is to explain what it does and why it's needed. > > Signed-off-by: Yu-cheng Yu > Cc: Andy Lutomirski > Cc: Dave Hansen > Cc: Jarkko Sakkinen > --- > arch/x86/entry/vdso/vsgx.S | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/entry/vdso/vsgx.S b/arch/x86/entry/vdso/vsgx.S > index 86a0e94f68df..a70d4d09f713 100644 > --- a/arch/x86/entry/vdso/vsgx.S > +++ b/arch/x86/entry/vdso/vsgx.S > @@ -27,6 +27,9 @@ > SYM_FUNC_START(__vdso_sgx_enter_enclave) > /* Prolog */ > .cfi_startproc > +#ifdef CONFIG_X86_CET > + endbr64 > +#endif > push %rbp > .cfi_adjust_cfa_offset 8 > .cfi_rel_offset %rbp, 0 > -- > 2.21.0 > > /Jarkko