From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7040FC433ED for ; Wed, 14 Apr 2021 11:56:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4BC0A611F2 for ; Wed, 14 Apr 2021 11:56:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233668AbhDNL4c (ORCPT ); Wed, 14 Apr 2021 07:56:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233008AbhDNL4a (ORCPT ); Wed, 14 Apr 2021 07:56:30 -0400 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B91D3C061756 for ; Wed, 14 Apr 2021 04:56:06 -0700 (PDT) Received: by mail-ed1-x529.google.com with SMTP id d21so3231565edv.9 for ; Wed, 14 Apr 2021 04:56:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=hx2ElfME/z8t2NqHuq0is1lt5Hwbga3+EmXPk/bu8jE=; b=DWo11BYUP8M2RRCHuP8NVoIUVaZdHxvf5gQUYMCSsF+3FuNm57QzXEZcai5Rz0tOOo SbjF++30ZWPKeE5ll0FuVJdbnC6en6luhn4Srsw0nzGczA/5kOLisn07OBSuyU4dZxRn VA64IxWARI5+cNZO1Gpuzf/roH+cBpRBVTJdejQt5W9JrR4IlCALwHfffinSr2UyHkil qxsEo35IATHxRBKkw2RZFaVCbU++Ou4BlBSalUywvyrmHI7vFrB5bXCM1E5ca49UqJsq uPEylfZj+pQ5RnNAzRX75L24L3VACUzpB9eOBEiA/pU28RYTNcsgrRrzCb+ZaVdCccSG HZEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=hx2ElfME/z8t2NqHuq0is1lt5Hwbga3+EmXPk/bu8jE=; b=lJ7EzyiS8RcqZrFfT6sGjsSxkjB3SAaMfvW709x13khupsLmX+Oy+8+lNcgxHWPMKP M5dGH4+xT5xJIpD2KIyOwSSXOpqEv9XjsKM5OLn8r2XHSE2hFuNYY/VhEB6xPy0dVgc5 gTxGLFE9pZZsvFOR7bHNBtCmma6X4pB3EUUNl2xpiqWCJYJlWop7Eq/k1RS88S75RqEX wGH2zFoMUlkmRT8suz6Kq1DZYjMXwYMcPY1PYiqsAsVgRW1moOF6ozpiv0/e9gVJxRos FKnxu5xC6ueh09Od8L3nrKdiD23Dy2LGlHJG3v1O2StQJtJQ0KIq2lrkOYZLFSiUbdC9 E7NA== X-Gm-Message-State: AOAM531NiuaulxdSbAfs5fzke8Q+2MK8fMG7mKLXZwnA/8F8fFNxwCjd xDZw42ZDXqTQgmPNgncKO2Dbdw== X-Google-Smtp-Source: ABdhPJw6QJVw35RGBrDVlA3MmikqiMsQbKDlIXm2vu0RmVXh/7v7wkWwJa8DqtuBoq9uM+i77OTQzQ== X-Received: by 2002:a05:6402:1051:: with SMTP id e17mr40827551edu.42.1618401365504; Wed, 14 Apr 2021 04:56:05 -0700 (PDT) Received: from apalos.home (ppp-94-65-92-88.home.otenet.gr. [94.65.92.88]) by smtp.gmail.com with ESMTPSA id z4sm11158884edb.97.2021.04.14.04.56.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Apr 2021 04:56:05 -0700 (PDT) Date: Wed, 14 Apr 2021 14:56:02 +0300 From: Ilias Apalodimas To: Matthew Wilcox Cc: Jesper Dangaard Brouer , linux-kernel@vger.kernel.org, linux-mm@kvack.org, netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Matteo Croce , Grygorii Strashko , Arnd Bergmann , Christoph Hellwig Subject: Re: [PATCH 1/1] mm: Fix struct page layout on 32-bit systems Message-ID: References: <20210410205246.507048-1-willy@infradead.org> <20210410205246.507048-2-willy@infradead.org> <20210411114307.5087f958@carbon> <20210411103318.GC2531743@casper.infradead.org> <20210412011532.GG2531743@casper.infradead.org> <20210414101044.19da09df@carbon> <20210414115052.GS2531743@casper.infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210414115052.GS2531743@casper.infradead.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 14, 2021 at 12:50:52PM +0100, Matthew Wilcox wrote: > On Wed, Apr 14, 2021 at 10:10:44AM +0200, Jesper Dangaard Brouer wrote: > > Yes, indeed! - And very frustrating. It's keeping me up at night. > > I'm dreaming about 32 vs 64 bit data structures. My fitbit stats tell > > me that I don't sleep well with these kind of dreams ;-) > > Then you're going to love this ... even with the latest patch, there's > still a problem. Because dma_addr_t is still 64-bit aligned _as a type_, > that forces the union to be 64-bit aligned (as we already knew and worked > around), but what I'd forgotten is that forces the entirety of struct > page to be 64-bit aligned. Which means ... > > /* size: 40, cachelines: 1, members: 4 */ > /* padding: 4 */ > /* forced alignments: 1 */ > /* last cacheline: 40 bytes */ > } __attribute__((__aligned__(8))); > > .. that we still have a hole! It's just moved from being at offset 4 > to being at offset 36. > > > That said, I think we need to have a quicker fix for the immediate > > issue with 64-bit bit dma_addr on 32-bit arch and the misalignment hole > > it leaves[3] in struct page. In[3] you mention ppc32, does it only > > happens on certain 32-bit archs? > > AFAICT it happens on mips32, ppc32, arm32 and arc. It doesn't happen > on x86-32 because dma_addr_t is 32-bit aligned. > > Doing this fixes it: > > +++ b/include/linux/types.h > @@ -140,7 +140,7 @@ typedef u64 blkcnt_t; > * so they don't care about the size of the actual bus addresses. > */ > #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT > -typedef u64 dma_addr_t; > +typedef u64 __attribute__((aligned(sizeof(void *)))) dma_addr_t; > #else > typedef u32 dma_addr_t; > #endif > > > I'm seriously considering removing page_pool's support for doing/keeping > > DMA-mappings on 32-bit arch's. AFAIK only a single driver use this. > > ... if you're going to do that, then we don't need to do this. FWIW I already proposed that to Matthew in private a few days ago... II am not even sure the AM572x has that support. I'd much prefer getting rid of it as well, instead of overcomplicating the struct for a device noone is going to need. Cheers /Ilias From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA9F3C433B4 for ; Wed, 14 Apr 2021 11:56:39 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 93D7F6109E for ; Wed, 14 Apr 2021 11:56:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 93D7F6109E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4FL1Cm4nsjz3bwv for ; Wed, 14 Apr 2021 21:56:36 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=DWo11BYU; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linaro.org (client-ip=2a00:1450:4864:20::529; helo=mail-ed1-x529.google.com; envelope-from=ilias.apalodimas@linaro.org; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=DWo11BYU; dkim-atps=neutral Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4FL1CH6sm9z2xZc for ; Wed, 14 Apr 2021 21:56:10 +1000 (AEST) Received: by mail-ed1-x529.google.com with SMTP id s15so23351327edd.4 for ; Wed, 14 Apr 2021 04:56:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=hx2ElfME/z8t2NqHuq0is1lt5Hwbga3+EmXPk/bu8jE=; b=DWo11BYUP8M2RRCHuP8NVoIUVaZdHxvf5gQUYMCSsF+3FuNm57QzXEZcai5Rz0tOOo SbjF++30ZWPKeE5ll0FuVJdbnC6en6luhn4Srsw0nzGczA/5kOLisn07OBSuyU4dZxRn VA64IxWARI5+cNZO1Gpuzf/roH+cBpRBVTJdejQt5W9JrR4IlCALwHfffinSr2UyHkil qxsEo35IATHxRBKkw2RZFaVCbU++Ou4BlBSalUywvyrmHI7vFrB5bXCM1E5ca49UqJsq uPEylfZj+pQ5RnNAzRX75L24L3VACUzpB9eOBEiA/pU28RYTNcsgrRrzCb+ZaVdCccSG HZEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=hx2ElfME/z8t2NqHuq0is1lt5Hwbga3+EmXPk/bu8jE=; b=tWKmvBaC82NmKxZTU+vuuG7ZHHXKSKY2YAW6QWFJumSX42KHw7hwIMsvyohF7hHFJ2 ImffxBQ1RF1bwabZrdc53iz3VGNoQdRKf3/M15jKkttW5wojn9HmuwnB05G0ZLcusQQ9 Tez7/nanPwl/iNIz0HEDXS8VFJcbfxMg7ZW3/glYftF3hTo9jljOesVwbd417tu4OjOc avieUciLLN8hFs29YtUFe72fEUIedqwriswmZQ4et84ntGrLUV+0UDeG48XIUda8XAJ7 NtvkfRqzKBBZI1uDrW1QnHzKtpGK1eX0AWmZTN2KDqeOET6OnhWAkPENPWZswLitQVLT vEfg== X-Gm-Message-State: AOAM5302hY2MEpHURghvUmJs3yn6Xgl4KIgdEyOgQRQGcxhMzg6n/HvI NhSPlPXyMtdHiS6dG1BVbFBkcQ== X-Google-Smtp-Source: ABdhPJw6QJVw35RGBrDVlA3MmikqiMsQbKDlIXm2vu0RmVXh/7v7wkWwJa8DqtuBoq9uM+i77OTQzQ== X-Received: by 2002:a05:6402:1051:: with SMTP id e17mr40827551edu.42.1618401365504; Wed, 14 Apr 2021 04:56:05 -0700 (PDT) Received: from apalos.home (ppp-94-65-92-88.home.otenet.gr. [94.65.92.88]) by smtp.gmail.com with ESMTPSA id z4sm11158884edb.97.2021.04.14.04.56.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Apr 2021 04:56:05 -0700 (PDT) Date: Wed, 14 Apr 2021 14:56:02 +0300 From: Ilias Apalodimas To: Matthew Wilcox Subject: Re: [PATCH 1/1] mm: Fix struct page layout on 32-bit systems Message-ID: References: <20210410205246.507048-1-willy@infradead.org> <20210410205246.507048-2-willy@infradead.org> <20210411114307.5087f958@carbon> <20210411103318.GC2531743@casper.infradead.org> <20210412011532.GG2531743@casper.infradead.org> <20210414101044.19da09df@carbon> <20210414115052.GS2531743@casper.infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210414115052.GS2531743@casper.infradead.org> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Grygorii Strashko , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-mm@kvack.org, Jesper Dangaard Brouer , Matteo Croce , linuxppc-dev@lists.ozlabs.org, Christoph Hellwig , linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Apr 14, 2021 at 12:50:52PM +0100, Matthew Wilcox wrote: > On Wed, Apr 14, 2021 at 10:10:44AM +0200, Jesper Dangaard Brouer wrote: > > Yes, indeed! - And very frustrating. It's keeping me up at night. > > I'm dreaming about 32 vs 64 bit data structures. My fitbit stats tell > > me that I don't sleep well with these kind of dreams ;-) > > Then you're going to love this ... even with the latest patch, there's > still a problem. Because dma_addr_t is still 64-bit aligned _as a type_, > that forces the union to be 64-bit aligned (as we already knew and worked > around), but what I'd forgotten is that forces the entirety of struct > page to be 64-bit aligned. Which means ... > > /* size: 40, cachelines: 1, members: 4 */ > /* padding: 4 */ > /* forced alignments: 1 */ > /* last cacheline: 40 bytes */ > } __attribute__((__aligned__(8))); > > .. that we still have a hole! It's just moved from being at offset 4 > to being at offset 36. > > > That said, I think we need to have a quicker fix for the immediate > > issue with 64-bit bit dma_addr on 32-bit arch and the misalignment hole > > it leaves[3] in struct page. In[3] you mention ppc32, does it only > > happens on certain 32-bit archs? > > AFAICT it happens on mips32, ppc32, arm32 and arc. It doesn't happen > on x86-32 because dma_addr_t is 32-bit aligned. > > Doing this fixes it: > > +++ b/include/linux/types.h > @@ -140,7 +140,7 @@ typedef u64 blkcnt_t; > * so they don't care about the size of the actual bus addresses. > */ > #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT > -typedef u64 dma_addr_t; > +typedef u64 __attribute__((aligned(sizeof(void *)))) dma_addr_t; > #else > typedef u32 dma_addr_t; > #endif > > > I'm seriously considering removing page_pool's support for doing/keeping > > DMA-mappings on 32-bit arch's. AFAIK only a single driver use this. > > ... if you're going to do that, then we don't need to do this. FWIW I already proposed that to Matthew in private a few days ago... II am not even sure the AM572x has that support. I'd much prefer getting rid of it as well, instead of overcomplicating the struct for a device noone is going to need. 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[94.65.92.88]) by smtp.gmail.com with ESMTPSA id z4sm11158884edb.97.2021.04.14.04.56.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Apr 2021 04:56:05 -0700 (PDT) Date: Wed, 14 Apr 2021 14:56:02 +0300 From: Ilias Apalodimas To: Matthew Wilcox Cc: Jesper Dangaard Brouer , linux-kernel@vger.kernel.org, linux-mm@kvack.org, netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Matteo Croce , Grygorii Strashko , Arnd Bergmann , Christoph Hellwig Subject: Re: [PATCH 1/1] mm: Fix struct page layout on 32-bit systems Message-ID: References: <20210410205246.507048-1-willy@infradead.org> <20210410205246.507048-2-willy@infradead.org> <20210411114307.5087f958@carbon> <20210411103318.GC2531743@casper.infradead.org> <20210412011532.GG2531743@casper.infradead.org> <20210414101044.19da09df@carbon> <20210414115052.GS2531743@casper.infradead.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210414115052.GS2531743@casper.infradead.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210414_045607_937781_5F7160C2 X-CRM114-Status: GOOD ( 26.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 14, 2021 at 12:50:52PM +0100, Matthew Wilcox wrote: > On Wed, Apr 14, 2021 at 10:10:44AM +0200, Jesper Dangaard Brouer wrote: > > Yes, indeed! - And very frustrating. It's keeping me up at night. > > I'm dreaming about 32 vs 64 bit data structures. My fitbit stats tell > > me that I don't sleep well with these kind of dreams ;-) > > Then you're going to love this ... even with the latest patch, there's > still a problem. Because dma_addr_t is still 64-bit aligned _as a type_, > that forces the union to be 64-bit aligned (as we already knew and worked > around), but what I'd forgotten is that forces the entirety of struct > page to be 64-bit aligned. Which means ... > > /* size: 40, cachelines: 1, members: 4 */ > /* padding: 4 */ > /* forced alignments: 1 */ > /* last cacheline: 40 bytes */ > } __attribute__((__aligned__(8))); > > .. that we still have a hole! It's just moved from being at offset 4 > to being at offset 36. > > > That said, I think we need to have a quicker fix for the immediate > > issue with 64-bit bit dma_addr on 32-bit arch and the misalignment hole > > it leaves[3] in struct page. In[3] you mention ppc32, does it only > > happens on certain 32-bit archs? > > AFAICT it happens on mips32, ppc32, arm32 and arc. It doesn't happen > on x86-32 because dma_addr_t is 32-bit aligned. > > Doing this fixes it: > > +++ b/include/linux/types.h > @@ -140,7 +140,7 @@ typedef u64 blkcnt_t; > * so they don't care about the size of the actual bus addresses. > */ > #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT > -typedef u64 dma_addr_t; > +typedef u64 __attribute__((aligned(sizeof(void *)))) dma_addr_t; > #else > typedef u32 dma_addr_t; > #endif > > > I'm seriously considering removing page_pool's support for doing/keeping > > DMA-mappings on 32-bit arch's. AFAIK only a single driver use this. > > ... if you're going to do that, then we don't need to do this. FWIW I already proposed that to Matthew in private a few days ago... II am not even sure the AM572x has that support. I'd much prefer getting rid of it as well, instead of overcomplicating the struct for a device noone is going to need. Cheers /Ilias _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel