From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0B08C433ED for ; Thu, 22 Apr 2021 18:51:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 308EB61405 for ; Thu, 22 Apr 2021 18:51:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 308EB61405 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4781B6E5AB; Thu, 22 Apr 2021 18:51:56 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id B71DF6E5AB; Thu, 22 Apr 2021 18:51:54 +0000 (UTC) IronPort-SDR: XjEaaeFQqvSgQ14rlgXmYjzLPe1Y1t8Sgx6AtSNvwqzDaSrcX9dTHHNLVYtVodhp6KCVYpWClK NKOPcyFlsqIQ== X-IronPort-AV: E=McAfee;i="6200,9189,9962"; a="175438289" X-IronPort-AV: E=Sophos;i="5.82,243,1613462400"; d="scan'208";a="175438289" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2021 11:51:54 -0700 IronPort-SDR: 53GYaL8ca1IhBNbJfGJqKXsZvAf8Qy/JQ7WWEMp4yhZgwB/MZmKUaBLnLfwE3VDtAbhTbWWWiU NP4Gi+TWIPLw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,243,1613462400"; d="scan'208";a="464055868" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga001.jf.intel.com with SMTP; 22 Apr 2021 11:51:51 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 22 Apr 2021 21:51:50 +0300 Date: Thu, 22 Apr 2021 21:51:50 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Daniel Vetter Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915: Rewrite CL/CTG L-shaped memory detection Message-ID: References: <20210421153401.13847-1-ville.syrjala@linux.intel.com> <20210421153401.13847-5-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Patchwork-Hint: comment X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Chris Wilson Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu, Apr 22, 2021 at 11:49:43AM +0200, Daniel Vetter wrote: > On Wed, Apr 21, 2021 at 06:34:01PM +0300, Ville Syrjala wrote: > > From: Ville Syrj=E4l=E4 > > = > > Currently we try to detect a symmetric memory configurations > > using a magic DCC2_MODIFIED_ENHANCED_DISABLE bit. That bit is > > either only set on a very specific subset of machines or it > > just does not exist (it's not mentioned in any public chipset > > datasheets I've found). As it happens my CL/CTG machines never > > set said bit, even if I populate the channels with identical > > sticks. > > = > > So let's do the L-shaped memory detection the same way as the > > desktop variants, ie. just look at the DRAM rank boundary > > registers to see if both channels have an identical size. > > = > > With this my CL/CTG no longer claim L-shaped memory when I use > > identical sticks. Also tested with non-matching sticks just to > > make sure the L-shaped memory is still properly detected. > > = > > And for completeness let's update the debugfs code to dump > > the correct set of registers on each platform. > > = > > Cc: Chris Wilson > > Signed-off-by: Ville Syrj=E4l=E4 > = > Did you check this with the swapping igt? I have some vague memories of > bug reports where somehow the machine was acting like it's L-shaped memory > despite that banks were populated equally. I've iirc tried all kinds of > tricks to figure it out, all to absolutely no avail. BTW looking at the patches/dumps in eg. https://bugs.freedesktop.org/show_bug.cgi?id=3D28813 I can't immediately see a single thing that is actually using the correct register offsets for cl/ctg. So I'm a bit sceptical about how well this was researched in the past. -- = Ville Syrj=E4l=E4 Intel _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4588EC433ED for ; Thu, 22 Apr 2021 18:52:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CF248613FA for ; Thu, 22 Apr 2021 18:52:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CF248613FA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F82C6E5B0; Thu, 22 Apr 2021 18:51:56 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id B71DF6E5AB; Thu, 22 Apr 2021 18:51:54 +0000 (UTC) IronPort-SDR: XjEaaeFQqvSgQ14rlgXmYjzLPe1Y1t8Sgx6AtSNvwqzDaSrcX9dTHHNLVYtVodhp6KCVYpWClK NKOPcyFlsqIQ== X-IronPort-AV: E=McAfee;i="6200,9189,9962"; a="175438289" X-IronPort-AV: E=Sophos;i="5.82,243,1613462400"; d="scan'208";a="175438289" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2021 11:51:54 -0700 IronPort-SDR: 53GYaL8ca1IhBNbJfGJqKXsZvAf8Qy/JQ7WWEMp4yhZgwB/MZmKUaBLnLfwE3VDtAbhTbWWWiU NP4Gi+TWIPLw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,243,1613462400"; d="scan'208";a="464055868" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga001.jf.intel.com with SMTP; 22 Apr 2021 11:51:51 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 22 Apr 2021 21:51:50 +0300 Date: Thu, 22 Apr 2021 21:51:50 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Daniel Vetter Message-ID: References: <20210421153401.13847-1-ville.syrjala@linux.intel.com> <20210421153401.13847-5-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Patchwork-Hint: comment Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915: Rewrite CL/CTG L-shaped memory detection X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Chris Wilson Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Apr 22, 2021 at 11:49:43AM +0200, Daniel Vetter wrote: > On Wed, Apr 21, 2021 at 06:34:01PM +0300, Ville Syrjala wrote: > > From: Ville Syrj=E4l=E4 > > = > > Currently we try to detect a symmetric memory configurations > > using a magic DCC2_MODIFIED_ENHANCED_DISABLE bit. That bit is > > either only set on a very specific subset of machines or it > > just does not exist (it's not mentioned in any public chipset > > datasheets I've found). As it happens my CL/CTG machines never > > set said bit, even if I populate the channels with identical > > sticks. > > = > > So let's do the L-shaped memory detection the same way as the > > desktop variants, ie. just look at the DRAM rank boundary > > registers to see if both channels have an identical size. > > = > > With this my CL/CTG no longer claim L-shaped memory when I use > > identical sticks. Also tested with non-matching sticks just to > > make sure the L-shaped memory is still properly detected. > > = > > And for completeness let's update the debugfs code to dump > > the correct set of registers on each platform. > > = > > Cc: Chris Wilson > > Signed-off-by: Ville Syrj=E4l=E4 > = > Did you check this with the swapping igt? I have some vague memories of > bug reports where somehow the machine was acting like it's L-shaped memory > despite that banks were populated equally. I've iirc tried all kinds of > tricks to figure it out, all to absolutely no avail. BTW looking at the patches/dumps in eg. https://bugs.freedesktop.org/show_bug.cgi?id=3D28813 I can't immediately see a single thing that is actually using the correct register offsets for cl/ctg. So I'm a bit sceptical about how well this was researched in the past. -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx