From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 204FFC43460 for ; Fri, 23 Apr 2021 12:25:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E49B061468 for ; Fri, 23 Apr 2021 12:25:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242381AbhDWM0D (ORCPT ); Fri, 23 Apr 2021 08:26:03 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:37858 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbhDWM0C (ORCPT ); Fri, 23 Apr 2021 08:26:02 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1lZurx-000eHK-PO; Fri, 23 Apr 2021 14:25:13 +0200 Date: Fri, 23 Apr 2021 14:25:13 +0200 From: Andrew Lunn To: Ansuel Smith Cc: Florian Fainelli , Vivien Didelot , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 02/14] drivers: net: dsa: qca8k: tweak internal delay to oem spec Message-ID: References: <20210423014741.11858-1-ansuelsmth@gmail.com> <20210423014741.11858-3-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210423014741.11858-3-ansuelsmth@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 23, 2021 at 03:47:28AM +0200, Ansuel Smith wrote: > The original code had the internal dalay set to 1 for tx and 2 for rx. Do you have any idea what these values mean, in terms of pS? What value is being passed to the PHY? Since the MAC is providing the delays, you need to ensure the PHY is not adding a delay. Is there code doing this? Andrew