From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 370B0C43461 for ; Fri, 23 Apr 2021 12:47:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E80D261459 for ; Fri, 23 Apr 2021 12:47:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242484AbhDWMrp (ORCPT ); Fri, 23 Apr 2021 08:47:45 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:37920 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbhDWMro (ORCPT ); Fri, 23 Apr 2021 08:47:44 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1lZvD5-000eTU-RS; Fri, 23 Apr 2021 14:47:03 +0200 Date: Fri, 23 Apr 2021 14:47:03 +0200 From: Andrew Lunn To: Ansuel Smith Cc: Florian Fainelli , Vivien Didelot , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 10/14] drivers: net: dsa: qca8k: add support for specific QCA access function Message-ID: References: <20210423014741.11858-1-ansuelsmth@gmail.com> <20210423014741.11858-11-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210423014741.11858-11-ansuelsmth@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +static inline void qca8k_phy_mmd_prep(struct mii_bus *bus, int phy_addr, u16 addr, u16 reg) > +{ > + bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr); > + bus->write(bus, phy_addr, MII_ATH_MMD_DATA, reg); > + bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr | 0x4000); > +} > + > +void qca8k_phy_mmd_write(struct qca8k_priv *priv, int phy_addr, u16 addr, u16 reg, u16 data) > +{ > + struct mii_bus *bus = priv->bus; > + > + mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); > + qca8k_phy_mmd_prep(bus, phy_addr, addr, reg); > + bus->write(bus, phy_addr, MII_ATH_MMD_DATA, data); > + mutex_unlock(&bus->mdio_lock); > +} > + > +u16 qca8k_phy_mmd_read(struct qca8k_priv *priv, int phy_addr, u16 addr, u16 reg) > +{ > + struct mii_bus *bus = priv->bus; > + u16 data; > + > + mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); > + qca8k_phy_mmd_prep(bus, phy_addr, addr, reg); > + data = bus->read(bus, phy_addr, MII_ATH_MMD_DATA); > + mutex_unlock(&bus->mdio_lock); > + > + return data; > +} Can you use the PHY core MMD access functions? Andrew