From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 286F7C433B4 for ; Fri, 30 Apr 2021 12:55:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A9A32613CD for ; Fri, 30 Apr 2021 12:55:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A9A32613CD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0EF036E0A0; Fri, 30 Apr 2021 12:55:35 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id F08D26E0A0 for ; Fri, 30 Apr 2021 12:55:32 +0000 (UTC) IronPort-SDR: jZH3sfQ1sIuIv3yxpq3Rid8fwadthcLmv3xpSR7SjrrMl/XDfNKkJuUUjO/tzh6jh+I6nbgM2/ TEu8iiSk+zLQ== X-IronPort-AV: E=McAfee;i="6200,9189,9969"; a="177426672" X-IronPort-AV: E=Sophos;i="5.82,262,1613462400"; d="scan'208";a="177426672" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2021 05:55:32 -0700 IronPort-SDR: ZiWrrmGqYsU5jHIbFEr2xLPXMKqeEwrLVQ/qI6sKVdbtR+jD5SftesLrO4G2tGhIPzZ3Ujxuao 6IG9KRFmecNg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,262,1613462400"; d="scan'208";a="431420388" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga008.jf.intel.com with SMTP; 30 Apr 2021 05:55:29 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 30 Apr 2021 15:55:28 +0300 Date: Fri, 30 Apr 2021 15:55:28 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: "Gupta, Anshuman" Message-ID: References: <20210328225709.18541-16-daniele.ceraolospurio@intel.com> <20210427104504.2720-1-anshuman.gupta@intel.com> <96d9782a7e864448a4d311f4eeaa6923@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <96d9782a7e864448a4d311f4eeaa6923@intel.com> X-Patchwork-Hint: comment Subject: Re: [Intel-gfx] [PATCH v3 15/16] drm/i915/pxp: black pixels on pxp disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Gaurav, Kumar" , "intel-gfx@lists.freedesktop.org" Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, Apr 30, 2021 at 07:12:53AM +0000, Gupta, Anshuman wrote: > = > = > > -----Original Message----- > > From: Ville Syrj=E4l=E4 > > Sent: Wednesday, April 28, 2021 12:26 AM > > To: Gupta, Anshuman > > Cc: intel-gfx@lists.freedesktop.org; Vivi, Rodrigo ; > > Gaurav, Kumar ; Shankar, Uma > > ; Ceraolo Spurio, Daniele > > > > Subject: Re: [PATCH v3 15/16] drm/i915/pxp: black pixels on pxp disabled > > = > > On Tue, Apr 27, 2021 at 04:15:04PM +0530, Anshuman Gupta wrote: > > > When protected sufaces has flipped and pxp session is disabled, > > > display black pixels by using plane color CTM correction. > > > > > > v2: > > > - Display black pixels in aysnc flip too. = > > = > > We can't change any of that with an async flip. > I was thinking of an scenario , when application flip the protected surfa= ces with synchronous flips > and driver has enable the plane decryption, can application issue an inte= rmediate async flip with > protected surfaces afterwards ? > If above is possible, is it possible to display black pixels in case of p= xp session invalidation at the time of > Plane commit? = We'll just have to refuse the async flip if the session has been invalidated. -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx