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Tue, 25 May 2021 07:47:57 -0700 (PDT) Date: Tue, 25 May 2021 16:47:56 +0200 From: Daniel Vetter To: Tvrtko Ursulin Subject: Re: [Intel-gfx] [PATCH 1/1] Let userspace know if they can trust timeslicing by including it as part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING Message-ID: References: <20210525135508.244659-1-tejaskumarx.surendrakumar.upadhyay@intel.com> <20210525135508.244659-2-tejaskumarx.surendrakumar.upadhyay@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Operating-System: Linux phenom 5.10.32scarlett+ X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Tejas Upadhyay , DRI Development , mahesh.meena@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Tue, May 25, 2021 at 03:19:47PM +0100, Tvrtko Ursulin wrote: > > + dri-devel as per process > > On 25/05/2021 14:55, Tejas Upadhyay wrote: > > v2: Only declare timeslicing if we can safely preempt userspace. > > Commit message got butchered up somehow so you'll need to fix that at some > point. > > Regards, > > Tvrtko > > > Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing") > > Signed-off-by: Chris Wilson > > Cc: Tvrtko Ursulin > > Reviewed-by: Tvrtko Ursulin > > --- > > drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 + > > include/uapi/drm/i915_drm.h | 1 + > > 2 files changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c > > index 3cca7ea2d6ea..12d165566ed2 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c > > +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c > > @@ -98,6 +98,7 @@ static void set_scheduler_caps(struct drm_i915_private *i915) > > MAP(HAS_PREEMPTION, PREEMPTION), > > MAP(HAS_SEMAPHORES, SEMAPHORES), > > MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS), > > + MAP(TIMESLICE_BIT, TIMESLICING), > > #undef MAP > > }; > > struct intel_engine_cs *engine; > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h > > index c2c7759b7d2e..af2212d6113c 100644 > > --- a/include/uapi/drm/i915_drm.h > > +++ b/include/uapi/drm/i915_drm.h > > @@ -572,6 +572,7 @@ typedef struct drm_i915_irq_wait { > > #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2) > > #define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3) > > #define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4) > > +#define I915_SCHEDULER_CAP_TIMESLICING (1ul << 5) Since this is uapi I think we should at least have some nice kerneldoc that explains what exactly this is, what for (link to userspace) and all that. Ideally also minimally filing in the gaps in our uapi docs for stuff this references. -Daniel > > #define I915_PARAM_HUC_STATUS 42 > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1957C47084 for ; Tue, 25 May 2021 14:48:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 57ECF6135F for ; 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Tue, 25 May 2021 07:47:57 -0700 (PDT) Date: Tue, 25 May 2021 16:47:56 +0200 From: Daniel Vetter To: Tvrtko Ursulin Message-ID: References: <20210525135508.244659-1-tejaskumarx.surendrakumar.upadhyay@intel.com> <20210525135508.244659-2-tejaskumarx.surendrakumar.upadhyay@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Operating-System: Linux phenom 5.10.32scarlett+ Subject: Re: [Intel-gfx] [PATCH 1/1] Let userspace know if they can trust timeslicing by including it as part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, DRI Development , mahesh.meena@intel.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, May 25, 2021 at 03:19:47PM +0100, Tvrtko Ursulin wrote: > > + dri-devel as per process > > On 25/05/2021 14:55, Tejas Upadhyay wrote: > > v2: Only declare timeslicing if we can safely preempt userspace. > > Commit message got butchered up somehow so you'll need to fix that at some > point. > > Regards, > > Tvrtko > > > Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing") > > Signed-off-by: Chris Wilson > > Cc: Tvrtko Ursulin > > Reviewed-by: Tvrtko Ursulin > > --- > > drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 + > > include/uapi/drm/i915_drm.h | 1 + > > 2 files changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c > > index 3cca7ea2d6ea..12d165566ed2 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c > > +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c > > @@ -98,6 +98,7 @@ static void set_scheduler_caps(struct drm_i915_private *i915) > > MAP(HAS_PREEMPTION, PREEMPTION), > > MAP(HAS_SEMAPHORES, SEMAPHORES), > > MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS), > > + MAP(TIMESLICE_BIT, TIMESLICING), > > #undef MAP > > }; > > struct intel_engine_cs *engine; > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h > > index c2c7759b7d2e..af2212d6113c 100644 > > --- a/include/uapi/drm/i915_drm.h > > +++ b/include/uapi/drm/i915_drm.h > > @@ -572,6 +572,7 @@ typedef struct drm_i915_irq_wait { > > #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2) > > #define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3) > > #define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4) > > +#define I915_SCHEDULER_CAP_TIMESLICING (1ul << 5) Since this is uapi I think we should at least have some nice kerneldoc that explains what exactly this is, what for (link to userspace) and all that. Ideally also minimally filing in the gaps in our uapi docs for stuff this references. -Daniel > > #define I915_PARAM_HUC_STATUS 42 > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx