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b=M+8Pg91vUUGFTZXuM81ywe9xE7ao0jqDsVTVzdjx59KVp8D/ImPbTc3BOkxifi1Kc B5VdrwMfZaYwKqZqxh6YrGcZK2JCyTe2ejB9/bsrgsfXurBsgLNuI8Eou12wj+dbEO ftbOWF2Kzu1JXFOkwuuPd6A0zzqu4ZIa9+lTkOhs= Date: Tue, 18 May 2021 10:35:40 +1000 From: David Gibson To: matheus.ferst@eldorado.org.br Subject: Re: [PATCH v5 12/23] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI Message-ID: References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> <20210517205025.3777947-13-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="9zuFZm4HKVcW/hHr" Content-Disposition: inline In-Reply-To: <20210517205025.3777947-13-matheus.ferst@eldorado.org.br> Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, f4bug@amsat.org, luis.pires@eldorado.org.br, qemu-ppc@nongnu.org, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --9zuFZm4HKVcW/hHr Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, May 17, 2021 at 05:50:14PM -0300, matheus.ferst@eldorado.org.br wro= te: > From: Richard Henderson >=20 > Signed-off-by: Richard Henderson > Signed-off-by: Matheus Ferst Applied to ppc-for-6.1, thanks. > --- > target/ppc/insn32.decode | 8 ++++ > target/ppc/insn64.decode | 12 ++++++ > target/ppc/translate.c | 29 -------------- > target/ppc/translate/fixedpoint-impl.c.inc | 44 ++++++++++++++++++++++ > 4 files changed, 64 insertions(+), 29 deletions(-) >=20 > diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode > index a3a8ae06bf..e7c062d8b4 100644 > --- a/target/ppc/insn32.decode > +++ b/target/ppc/insn32.decode > @@ -16,3 +16,11 @@ > # You should have received a copy of the GNU Lesser General Public > # License along with this library; if not, see . > # > + > +&D rt ra si:int64_t > +@D ...... rt:5 ra:5 si:s16 &D > + > +### Fixed-Point Arithmetic Instructions > + > +ADDI 001110 ..... ..... ................ @D > +ADDIS 001111 ..... ..... ................ @D > diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode > index a38b1f84dc..1965088915 100644 > --- a/target/ppc/insn64.decode > +++ b/target/ppc/insn64.decode > @@ -16,3 +16,15 @@ > # You should have received a copy of the GNU Lesser General Public > # License along with this library; if not, see . > # > + > +# Format MLS:D and 8LS:D > +&PLS_D rt ra si:int64_t r:bool > +%pls_si 32:s18 0:16 > +@PLS_D ...... .. ... r:1 .. .................. \ > + ...... rt:5 ra:5 ................ \ > + &PLS_D si=3D%pls_si > + > +### Fixed-Point Arithmetic Instructions > + > +PADDI 000001 10 0--.-- .................. \ > + 001110 ..... ..... ................ @PLS_D > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 64d6acb078..5bf9001141 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -1846,19 +1846,6 @@ GEN_INT_ARITH_ADD(addex, 0x05, cpu_ov, 1, 1, 0); > /* addze addze. addzeo addzeo.*/ > GEN_INT_ARITH_ADD_CONST(addze, 0x06, 0, cpu_ca, 1, 1, 0) > GEN_INT_ARITH_ADD_CONST(addzeo, 0x16, 0, cpu_ca, 1, 1, 1) > -/* addi */ > -static void gen_addi(DisasContext *ctx) > -{ > - target_long simm =3D SIMM(ctx->opcode); > - > - if (rA(ctx->opcode) =3D=3D 0) { > - /* li case */ > - tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm); > - } else { > - tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], > - cpu_gpr[rA(ctx->opcode)], simm); > - } > -} > /* addic addic.*/ > static inline void gen_op_addic(DisasContext *ctx, bool compute_rc0) > { > @@ -1878,20 +1865,6 @@ static void gen_addic_(DisasContext *ctx) > gen_op_addic(ctx, 1); > } > =20 > -/* addis */ > -static void gen_addis(DisasContext *ctx) > -{ > - target_long simm =3D SIMM(ctx->opcode); > - > - if (rA(ctx->opcode) =3D=3D 0) { > - /* lis case */ > - tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm << 16); > - } else { > - tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], > - cpu_gpr[rA(ctx->opcode)], simm << 16); > - } > -} > - > /* addpcis */ > static void gen_addpcis(DisasContext *ctx) > { > @@ -7903,10 +7876,8 @@ GEN_HANDLER_E(cmpeqb, 0x1F, 0x00, 0x07, 0x00600000= , PPC_NONE, PPC2_ISA300), > GEN_HANDLER_E(cmpb, 0x1F, 0x1C, 0x0F, 0x00000001, PPC_NONE, PPC2_ISA205), > GEN_HANDLER_E(cmprb, 0x1F, 0x00, 0x06, 0x00400001, PPC_NONE, PPC2_ISA300= ), > GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL), > -GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), > GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), > GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER= ), > -GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), > GEN_HANDLER_E(addpcis, 0x13, 0x2, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA30= 0), > GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER), > GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER), > diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/tran= slate/fixedpoint-impl.c.inc > index be75085cee..344a3ed54b 100644 > --- a/target/ppc/translate/fixedpoint-impl.c.inc > +++ b/target/ppc/translate/fixedpoint-impl.c.inc > @@ -16,3 +16,47 @@ > * You should have received a copy of the GNU Lesser General Public > * License along with this library; if not, see . > */ > + > +/* > + * Incorporate CIA into the constant when R=3D1. > + * Validate that when R=3D1, RA=3D0. > + */ > +static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) > +{ > + d->rt =3D a->rt; > + d->ra =3D a->ra; > + d->si =3D a->si; > + if (a->r) { > + if (unlikely(a->ra !=3D 0)) { > + gen_invalid(ctx); > + return false; > + } > + d->si +=3D ctx->cia; > + } > + return true; > +} > + > +static bool trans_ADDI(DisasContext *ctx, arg_D *a) > +{ > + if (a->ra) { > + tcg_gen_addi_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], a->si); > + } else { > + tcg_gen_movi_tl(cpu_gpr[a->rt], a->si); > + } > + return true; > +} > + > +static bool trans_PADDI(DisasContext *ctx, arg_PLS_D *a) > +{ > + arg_D d; > + if (!resolve_PLS_D(ctx, &d, a)) { > + return true; > + } > + return trans_ADDI(ctx, &d); > +} > + > +static bool trans_ADDIS(DisasContext *ctx, arg_D *a) > +{ > + a->si <<=3D 16; > + return trans_ADDI(ctx, a); > +} --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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