From: David Gibson <david@gibson.dropbear.id.au>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 16/24] target/ppc: Remove PowerPCCPUClass.handle_mmu_fault
Date: Mon, 24 May 2021 13:28:03 +1000 [thread overview]
Message-ID: <YKsdQ4IKyLJpGi4Y@yekko> (raw)
In-Reply-To: <20210518201146.794854-17-richard.henderson@linaro.org>
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On Tue, May 18, 2021 at 03:11:38PM -0500, Richard Henderson wrote:
> Instead, use a switch on env->mmu_model. This avoids some
> replicated information in cpu setup.
I have mixed feelings about this, since I introduced
pcc->handle_mmu_fault specifically to get rid of the nasty
mega-switch, with the hope of eventually getting rid of env->mmu_model
entirely.
But.. it does simplify your patch series, which makes a good change
overall.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/ppc/cpu-qom.h | 1 -
> target/ppc/cpu_init.c | 45 -----------------------------------------
> target/ppc/mmu_helper.c | 24 ++++++++++++++++++----
> 3 files changed, 20 insertions(+), 50 deletions(-)
>
> diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
> index 06b6571bc9..3b14d2f134 100644
> --- a/target/ppc/cpu-qom.h
> +++ b/target/ppc/cpu-qom.h
> @@ -198,7 +198,6 @@ struct PowerPCCPUClass {
> int n_host_threads;
> void (*init_proc)(CPUPPCState *env);
> int (*check_pow)(CPUPPCState *env);
> - int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx);
> bool (*interrupts_big_endian)(PowerPCCPU *cpu);
> };
>
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index d0fa219880..d33aded7cf 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -4580,9 +4580,6 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data)
> (1ull << MSR_IR) |
> (1ull << MSR_DR);
> pcc->mmu_model = POWERPC_MMU_601;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_601;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_601;
> @@ -4625,9 +4622,6 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data)
> (1ull << MSR_IR) |
> (1ull << MSR_DR);
> pcc->mmu_model = POWERPC_MMU_601;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_601;
> pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE;
> @@ -4891,9 +4885,6 @@ POWERPC_FAMILY(604)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_604;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_604;
> @@ -4975,9 +4966,6 @@ POWERPC_FAMILY(604E)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_604;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_604;
> @@ -5046,9 +5034,6 @@ POWERPC_FAMILY(740)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_7x0;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_750;
> @@ -5126,9 +5111,6 @@ POWERPC_FAMILY(750)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_7x0;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_750;
> @@ -5329,9 +5311,6 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_7x0;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_750;
> @@ -5412,9 +5391,6 @@ POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_7x0;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_750;
> @@ -5500,9 +5476,6 @@ POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_7x0;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_750;
> @@ -5588,9 +5561,6 @@ POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_7x0;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_750;
> @@ -5830,9 +5800,6 @@ POWERPC_FAMILY(7400)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_74xx;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_7400;
> @@ -5916,9 +5883,6 @@ POWERPC_FAMILY(7410)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_74xx;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_7400;
> @@ -6745,9 +6709,6 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data)
> (1ull << MSR_RI) |
> (1ull << MSR_LE);
> pcc->mmu_model = POWERPC_MMU_32B;
> -#if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> -#endif
> pcc->excp_model = POWERPC_EXCP_74xx;
> pcc->bus_model = PPC_FLAGS_INPUT_6xx;
> pcc->bfd_mach = bfd_mach_ppc_7400;
> @@ -7507,7 +7468,6 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data)
> (1ull << MSR_RI);
> pcc->mmu_model = POWERPC_MMU_64B;
> #if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
> pcc->hash64_opts = &ppc_hash64_opts_basic;
> #endif
> pcc->excp_model = POWERPC_EXCP_970;
> @@ -7585,7 +7545,6 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data)
> LPCR_RMI | LPCR_HDICE;
> pcc->mmu_model = POWERPC_MMU_2_03;
> #if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
> pcc->hash64_opts = &ppc_hash64_opts_basic;
> pcc->lrg_decr_bits = 32;
> #endif
> @@ -7729,7 +7688,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
> pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2;
> pcc->mmu_model = POWERPC_MMU_2_06;
> #if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
> pcc->hash64_opts = &ppc_hash64_opts_POWER7;
> pcc->lrg_decr_bits = 32;
> #endif
> @@ -7906,7 +7864,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
> LPCR_P8_PECE3 | LPCR_P8_PECE4;
> pcc->mmu_model = POWERPC_MMU_2_07;
> #if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
> pcc->hash64_opts = &ppc_hash64_opts_POWER7;
> pcc->lrg_decr_bits = 32;
> pcc->n_host_threads = 8;
> @@ -8122,7 +8079,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
> pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE;
> pcc->mmu_model = POWERPC_MMU_3_00;
> #if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault;
> /* segment page size remain the same */
> pcc->hash64_opts = &ppc_hash64_opts_POWER7;
> pcc->radix_page_info = &POWER9_radix_page_info;
> @@ -8334,7 +8290,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
> pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE;
> pcc->mmu_model = POWERPC_MMU_3_00;
> #if defined(CONFIG_SOFTMMU)
> - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault;
> /* segment page size remain the same */
> pcc->hash64_opts = &ppc_hash64_opts_POWER7;
> pcc->radix_page_info = &POWER10_radix_page_info;
> diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
> index ef634fcb33..863e556a22 100644
> --- a/target/ppc/mmu_helper.c
> +++ b/target/ppc/mmu_helper.c
> @@ -2963,14 +2963,30 @@ bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
> bool probe, uintptr_t retaddr)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
> CPUPPCState *env = &cpu->env;
> int ret;
>
> - if (pcc->handle_mmu_fault) {
> - ret = pcc->handle_mmu_fault(cpu, addr, access_type, mmu_idx);
> - } else {
> + switch (env->mmu_model) {
> +#if defined(TARGET_PPC64)
> + case POWERPC_MMU_64B:
> + case POWERPC_MMU_2_03:
> + case POWERPC_MMU_2_06:
> + case POWERPC_MMU_2_07:
> + ret = ppc_hash64_handle_mmu_fault(cpu, addr, access_type, mmu_idx);
> + break;
> + case POWERPC_MMU_3_00:
> + ret = ppc64_v3_handle_mmu_fault(cpu, addr, access_type, mmu_idx);
> + break;
> +#endif
> +
> + case POWERPC_MMU_32B:
> + case POWERPC_MMU_601:
> + ret = ppc_hash32_handle_mmu_fault(cpu, addr, access_type, mmu_idx);
> + break;
> +
> + default:
> ret = cpu_ppc_handle_mmu_fault(env, addr, access_type, mmu_idx);
> + break;
> }
> if (unlikely(ret != 0)) {
> if (probe) {
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2021-05-24 3:52 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-18 20:11 [PATCH 00/24] target/ppc: Clean up mmu translation Richard Henderson
2021-05-18 20:11 ` [PATCH 01/24] target/ppc: Introduce prot_for_access_type Richard Henderson
2021-05-18 20:11 ` [PATCH 02/24] target/ppc: Use MMUAccessType in mmu-radix64.c Richard Henderson
2021-05-18 20:11 ` [PATCH 03/24] target/ppc: Use MMUAccessType in mmu-hash64.c Richard Henderson
2021-05-18 20:11 ` [PATCH 04/24] target/ppc: Use MMUAccessType in mmu-hash32.c Richard Henderson
2021-05-18 20:11 ` [PATCH 05/24] target/ppc: Rename access_type to type in mmu_helper.c Richard Henderson
2021-05-18 20:11 ` [PATCH 06/24] target/ppc: Use MMUAccessType " Richard Henderson
2021-05-18 20:11 ` [PATCH 07/24] target/ppc: Remove type argument from check_prot Richard Henderson
2021-05-18 20:11 ` [PATCH 08/24] target/ppc: Remove type argument from ppc6xx_tlb_pte_check Richard Henderson
2021-05-18 20:11 ` [PATCH 09/24] target/ppc: Remove type argument from ppc6xx_tlb_check Richard Henderson
2021-05-18 20:11 ` [PATCH 10/24] target/ppc: Remove type argument from get_bat_6xx_tlb Richard Henderson
2021-05-18 20:11 ` [PATCH 11/24] target/ppc: Remove type argument from mmu40x_get_physical_address Richard Henderson
2021-05-18 20:11 ` [PATCH 12/24] target/ppc: Remove type argument from mmubooke_check_tlb Richard Henderson
2021-05-18 20:11 ` [PATCH 13/24] target/ppc: Remove type argument from mmubooke_get_physical_address Richard Henderson
2021-05-18 20:11 ` [PATCH 14/24] target/ppc: Remove type argument from mmubooke206_check_tlb Richard Henderson
2021-05-18 20:11 ` [PATCH 15/24] target/ppc: Remove type argument for mmubooke206_get_physical_address Richard Henderson
2021-05-18 20:11 ` [PATCH 16/24] target/ppc: Remove PowerPCCPUClass.handle_mmu_fault Richard Henderson
2021-05-19 13:02 ` Bruno Piazera Larsen
2021-05-24 3:28 ` David Gibson [this message]
2021-05-24 4:36 ` Richard Henderson
2021-05-24 5:11 ` David Gibson
2021-05-18 20:11 ` [PATCH 17/24] target/ppc: Use MMUAccessType with *_handle_mmu_fault Richard Henderson
2021-05-19 13:02 ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 18/24] target/ppc: Push real-mode handling into ppc_radix64_xlate Richard Henderson
2021-05-19 17:44 ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 19/24] target/ppc: Use bool success for ppc_radix64_xlate Richard Henderson
2021-05-19 17:53 ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 20/24] target/ppc: Split out ppc_hash64_xlate Richard Henderson
2021-05-19 18:09 ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 21/24] target/ppc: Split out ppc_hash32_xlate Richard Henderson
2021-05-19 18:20 ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 22/24] target/ppc: Split out ppc_jumbo_xlate Richard Henderson
2021-05-19 18:40 ` Bruno Piazera Larsen
2021-05-24 3:19 ` David Gibson
2021-05-18 20:11 ` [PATCH 23/24] target/ppc: Introduce ppc_xlate Richard Henderson
2021-05-19 18:53 ` Bruno Piazera Larsen
2021-05-18 20:11 ` [PATCH 24/24] target/ppc: Restrict ppc_cpu_tlb_fill to TCG Richard Henderson
2021-05-20 13:18 ` Bruno Piazera Larsen
2021-05-20 14:52 ` Richard Henderson
2021-05-20 17:13 ` Bruno Piazera Larsen
2021-05-19 2:52 ` [PATCH 00/24] target/ppc: Clean up mmu translation David Gibson
2021-05-19 20:37 ` Richard Henderson
2021-05-19 22:47 ` Richard Henderson
2021-05-24 3:26 ` David Gibson
2021-05-24 4:47 ` Richard Henderson
2021-05-24 12:16 ` Bruno Piazera Larsen
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