From: Vinod Koul <vkoul@kernel.org> To: Biju Das <biju.das.jz@bp.renesas.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>, linux-phy@lists.infradead.org, Geert Uytterhoeven <geert+renesas@glider.be>, Chris Paterson <Chris.Paterson2@renesas.com>, Biju Das <biju.das@bp.renesas.com>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH 3/6] phy: renesas: Add RZ/G2L usb phy control driver Date: Mon, 21 Jun 2021 09:43:21 +0530 [thread overview] Message-ID: <YNAR4XKMLHsdWzbM@vkoul-mobl> (raw) In-Reply-To: <20210611134642.24029-4-biju.das.jz@bp.renesas.com> On 11-06-21, 14:46, Biju Das wrote: > +static int rzg2l_usbphycontrol_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct rzg2l_usbphycontrol_drv *drv; > + struct phy_provider *provider; > + u32 val; > + int n; > + > + if (!dev->of_node) { > + dev_err(dev, "device tree not found\n"); > + return -EINVAL; > + } why do you think this would happen? > + > + drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL); > + if (!drv) > + return -ENOMEM; > + > + drv->base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(drv->base)) > + return PTR_ERR(drv->base); > + > + for (n = 0; n < NUM_PORTS; n++) { > + struct rzg2l_phyctrl *phy = &drv->phyctrl[n]; > + > + phy->phy = devm_phy_create(dev, NULL, &rzg2l_usbphyctrl_ops); > + if (IS_ERR(phy->phy)) { > + dev_err(dev, "Failed to create USBPHY Control\n"); > + return PTR_ERR(phy->phy); > + } > + > + if (n == 1) > + phy->phy_reset_port_mask = PHY_RESET_PORT2; this looks inverted, should this logically not be: if (n == 0) phy->phy_reset_port_mask = PHY_RESET_PORT1; ? > + else > + phy->phy_reset_port_mask = PHY_RESET_PORT1; > + > + phy->drv = drv; > + phy_set_drvdata(phy->phy, phy); > + }; > + > + provider = devm_of_phy_provider_register(dev, > + rzg2l_usbphycontrol_xlate); single line pls -- ~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org> To: Biju Das <biju.das.jz@bp.renesas.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>, linux-phy@lists.infradead.org, Geert Uytterhoeven <geert+renesas@glider.be>, Chris Paterson <Chris.Paterson2@renesas.com>, Biju Das <biju.das@bp.renesas.com>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH 3/6] phy: renesas: Add RZ/G2L usb phy control driver Date: Mon, 21 Jun 2021 09:43:21 +0530 [thread overview] Message-ID: <YNAR4XKMLHsdWzbM@vkoul-mobl> (raw) In-Reply-To: <20210611134642.24029-4-biju.das.jz@bp.renesas.com> On 11-06-21, 14:46, Biju Das wrote: > +static int rzg2l_usbphycontrol_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct rzg2l_usbphycontrol_drv *drv; > + struct phy_provider *provider; > + u32 val; > + int n; > + > + if (!dev->of_node) { > + dev_err(dev, "device tree not found\n"); > + return -EINVAL; > + } why do you think this would happen? > + > + drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL); > + if (!drv) > + return -ENOMEM; > + > + drv->base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(drv->base)) > + return PTR_ERR(drv->base); > + > + for (n = 0; n < NUM_PORTS; n++) { > + struct rzg2l_phyctrl *phy = &drv->phyctrl[n]; > + > + phy->phy = devm_phy_create(dev, NULL, &rzg2l_usbphyctrl_ops); > + if (IS_ERR(phy->phy)) { > + dev_err(dev, "Failed to create USBPHY Control\n"); > + return PTR_ERR(phy->phy); > + } > + > + if (n == 1) > + phy->phy_reset_port_mask = PHY_RESET_PORT2; this looks inverted, should this logically not be: if (n == 0) phy->phy_reset_port_mask = PHY_RESET_PORT1; ? > + else > + phy->phy_reset_port_mask = PHY_RESET_PORT1; > + > + phy->drv = drv; > + phy_set_drvdata(phy->phy, phy); > + }; > + > + provider = devm_of_phy_provider_register(dev, > + rzg2l_usbphycontrol_xlate); single line pls -- ~Vinod -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2021-06-21 4:13 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-11 13:46 [PATCH 0/6] Add RZ/G2L USB2.0 phy and host support Biju Das 2021-06-11 13:46 ` Biju Das 2021-06-11 13:46 ` [PATCH 1/6] dt-bindings: phy: renesas: Document RZ/G2L USB PHY Control bindings Biju Das 2021-06-11 13:46 ` Biju Das 2021-06-21 4:01 ` Vinod Koul 2021-06-21 4:01 ` Vinod Koul 2021-06-21 6:40 ` Biju Das 2021-06-21 6:40 ` Biju Das 2021-06-11 13:46 ` [PATCH 2/6] drivers: clk: renesas: r9a07g044-cpg: Add USB clocks Biju Das 2021-06-14 12:26 ` Geert Uytterhoeven 2021-06-15 8:58 ` Geert Uytterhoeven 2021-06-15 9:48 ` Laurent Pinchart 2021-06-15 9:53 ` Geert Uytterhoeven 2021-06-15 9:57 ` Laurent Pinchart 2021-06-15 10:24 ` Geert Uytterhoeven 2021-06-16 10:16 ` Biju Das 2021-06-16 11:33 ` Laurent Pinchart 2021-06-16 10:12 ` Biju Das 2021-06-11 13:46 ` [PATCH 3/6] phy: renesas: Add RZ/G2L usb phy control driver Biju Das 2021-06-11 13:46 ` Biju Das 2021-06-21 4:13 ` Vinod Koul [this message] 2021-06-21 4:13 ` Vinod Koul 2021-06-21 6:51 ` Biju Das 2021-06-21 6:51 ` Biju Das 2021-06-11 13:46 ` [PATCH 4/6] arm64: configs: defconfig: Enable RZ/G2L USB PHY " Biju Das 2021-06-11 13:46 ` Biju Das 2021-06-11 13:46 ` [PATCH 5/6] dt-bindings: phy: renesas,usb2-phy: Document RZ/G2L phy bindings Biju Das 2021-06-11 13:46 ` [PATCH 5/6] dt-bindings: phy: renesas, usb2-phy: " Biju Das 2021-06-11 13:46 ` [PATCH 6/6] arm64: dts: renesas: r9a07g044: Add USB2.0 phy and host support Biju Das
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