From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EB36C4743C for ; Wed, 23 Jun 2021 14:19:44 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id F1AA160FDC for ; Wed, 23 Jun 2021 14:19:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F1AA160FDC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DBF5740141; Wed, 23 Jun 2021 16:19:42 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 1ED134003E for ; Wed, 23 Jun 2021 16:19:40 +0200 (CEST) IronPort-SDR: Ib86pp4nlom2gLvQ383IyGbrTieBYHYvUauRXMw4TDH+vA+02tI3kM7Bqt2zfOUb4oc0XLa72/ XL15Pt3c/INA== X-IronPort-AV: E=McAfee;i="6200,9189,10024"; a="292897610" X-IronPort-AV: E=Sophos;i="5.83,294,1616482800"; d="scan'208";a="292897610" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2021 07:19:19 -0700 IronPort-SDR: Sjg32AZ71cFl1/jLwJIoQwvSGvfZxR08qfp6Fqm94dOBsTq6fLSB0SBAEgmc+lDfB/kluwT3pb LUCCalLTWd8A== X-IronPort-AV: E=Sophos;i="5.83,294,1616482800"; d="scan'208";a="406699003" Received: from bricha3-mobl.ger.corp.intel.com ([10.252.13.79]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 23 Jun 2021 07:19:08 -0700 Date: Wed, 23 Jun 2021 15:19:03 +0100 From: Bruce Richardson To: Jerin Jacob Cc: fengchengwen , Morten =?iso-8859-1?Q?Br=F8rup?= , Thomas Monjalon , Ferruh Yigit , dpdk-dev , Nipun Gupta , Hemant Agrawal , Maxime Coquelin , Honnappa Nagarahalli , Jerin Jacob , David Marchand , Satananda Burla , Prasun Kapoor Message-ID: References: <3cb0bd01-2b0d-cf96-d173-920947466041@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [dpdk-dev] [RFC PATCH] dmadev: introduce DMA device library X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Wed, Jun 23, 2021 at 05:10:22PM +0530, Jerin Jacob wrote: > On Wed, Jun 23, 2021 at 3:07 PM Bruce Richardson > wrote: > > > > On Wed, Jun 23, 2021 at 12:51:07PM +0530, Jerin Jacob wrote: > > > On Wed, Jun 23, 2021 at 9:00 AM fengchengwen wrote: > > > > > > > > > > > > > Currently, it is hard to define generic dma descriptor, I think the well-defined > > > > APIs is feasible. > > > > > > I would like to understand why not feasible? if we move the > > > preparation to the slow path. > > > > > > i.e > > > > > > struct rte_dmadev_desc defines all the "attributes" of all DMA devices available > > > using capability. I believe with the scheme, we can scale and > > > incorporate all features of > > > all DMA HW without any performance impact. > > > > > > something like: > > > > > > struct rte_dmadev_desc { > > > /* Attributes all DMA transfer available for all HW under capability. */ > > > channel or port; > > > ops ; // copy, fill etc.. > > > /* impemention opqueue memory as zero length array, > > > rte_dmadev_desc_prep() update this memory with HW specific information > > > */ > > > uint8_t impl_opq[]; > > > } > > > > > > // allocate the memory for dma decriptor > > > struct rte_dmadev_desc *rte_dmadev_desc_alloc(devid); > > > // Convert DPDK specific descriptors to HW specific descriptors in slowpath */ > > > rte_dmadev_desc_prep(devid, struct rte_dmadev_desc *desc); > > > // Free dma descriptor memory > > > rte_dmadev_desc_free(devid, struct rte_dmadev_desc *desc ) > > > > > > The above calls in slow path. > > > > > > Only below call in fastpath. > > > // Here desc can be NULL(in case you don't need any specific attribute > > > attached to transfer, if needed, it can be an object which is gone > > > through rte_dmadev_desc_prep()) > > > rte_dmadev_enq(devid, struct rte_dmadev_desc *desc, void *src, void > > > *dest, unsigned int len, cookie) > > > > > > > The trouble here is the performance penalty due to building up and tearing > > down structures and passing those structures into functions via function > > pointer. With the APIs for enqueue/dequeue that have been discussed here, > > all parameters will be passed in registers, and then each driver can do a > > write of the actual hardware descriptor straight to cache/memory from > > registers. With the scheme you propose above, the register contains a > > pointer to the data which must then be loaded into the CPU before being > > written out again. This increases our offload cost. > > See below. > > > > > However, assuming that the desc_prep call is just for slowpath or > > initialization time, I'd be ok to have the functions take an extra > > hw-specific parameter for each call prepared with tx_prep. It would still > > allow all other parameters to be passed in registers. How much data are you > > looking to store in this desc struct? It can't all be represented as flags, > > for example? > > There is around 128bit of metadata for octeontx2. New HW may > completely different metata > http://code.dpdk.org/dpdk/v21.05/source/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h#L149 > > I see following issue with flags scheme: > > - We need to start populate in fastpath, Since it based on capabality, > application needs to have > different versions of fastpath code > - Not future proof, Not easy add other stuff as needed when new HW > comes with new > transfer attributes. > > Understood. Would the "tx_prep" (or perhaps op_prep) function you proposed solve that problem, if it were passed (along with flags) to the enqueue_copy function? i.e. would the below work for you, and if so, what parameters would you see passed to the prep function? metad = rte_dma_op_prep(dev_id, ....) rte_dma_enqueue_copy(dev_id, src, dst, len, flags, metad) > > > > As for the individual APIs, we could do a generic "enqueue" API, which > > takes the op as a parameter, I prefer having each operation as a separate > > function, in order to increase the readability of the code and to reduce > > Only issue I see, all application needs have two path for doing the stuff, > one with _prep() and separate function() and drivers need to support both. > If prep is not called per-op, we could always mandate it be called before the actual enqueue functions, even if some drivers ignore the argument. > > the number of parameters needed per function i.e. thereby saving registers > > needing to be used and potentially making the function calls and offload > > My worry is, struct rte_dmadev can hold only function pointers for <= > 8 fastpath functions for 64B cache line. > When you say new op, say fill, need a new function, What will be the > change wrt HW > driver point of view? Is it updating HW descriptor with op as _fill_ > vs _copy_? something beyond that? Well, from a user view-point each operation takes different parameters, so for a fill operation, you have a destination address, but instead of a source address for copy you have pattern for fill. Internally, for those two ops, the only different in input and descriptor writing is indeed in the op flag, and no additional context or metadata is needed for a copy other than source, address and length (+ plus maybe some flags e.g. for caching behaviour or the like), so having the extra prep function adds no value for us, and loading data from a prebuilt structure just adds more IO overhead. Therefore, I'd ok to add it for enabling other hardware, but only in such a way as it doesn't impact the offload cost. If we want to in future look at adding more advanced or complex capabilities, I'm ok for adding a general "enqueue_op" function which takes multiple op types, but for very simple ops like copy, where we need to keep the offload cost down to a minimum, having fastpath specific copy functions makes a lot of sense to me. > If it is about, HW descriptor update, then _prep() can do all work, > just driver need to copy desc to > to HW. > > I believe upto to 6 arguments passed over registers in x86(it is 8 in > arm64). if so, > the desc pointer(already populated in HW descriptor format by _prep()) > is in register, and > would be simple 64bit/128bit copy from desc pointer to HW memory on > driver enq(). I dont see > any overhead on that, On other side, we if keep adding arguments, it > will spill out > to stack. > For a copy operation, we should never need more than 6 arguments - see proposal above which has 6 including a set of flags and arbitrary void * pointer for extensibility. If anything more complex than that is needed, the generic "enqueue_op" function can be used instead. Let's fast-path the common, simple case, since that what is most likely to be used most! /Bruce