From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F88AC49EAB for ; Fri, 25 Jun 2021 13:19:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6852261969 for ; Fri, 25 Jun 2021 13:19:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231375AbhFYNVX (ORCPT ); Fri, 25 Jun 2021 09:21:23 -0400 Received: from 8bytes.org ([81.169.241.247]:52276 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230151AbhFYNVW (ORCPT ); Fri, 25 Jun 2021 09:21:22 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id A7AA23FC; Fri, 25 Jun 2021 15:18:59 +0200 (CEST) Date: Fri, 25 Jun 2021 15:18:58 +0200 From: Joerg Roedel To: Douglas Anderson Cc: will@kernel.org, robin.murphy@arm.com, bjorn.andersson@linaro.org, ulf.hansson@linaro.org, adrian.hunter@intel.com, bhelgaas@google.com, john.garry@huawei.com, robdclark@chromium.org, quic_c_gdjako@quicinc.com, saravanak@google.com, rajatja@google.com, saiprakash.ranjan@codeaurora.org, vbadigan@codeaurora.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, sonnyrao@chromium.org, joel@joelfernandes.org, Andrew Morton , Jonathan Corbet , Jordan Crouse , Konrad Dybcio , Krishna Reddy , "Maciej W. Rozycki" , Nicolin Chen , "Paul E. McKenney" , Peter Zijlstra , Randy Dunlap , Thierry Reding , Viresh Kumar , Vlastimil Babka , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/3] iommu: Enable non-strict DMA on QCom SD/MMC Message-ID: References: <20210624171759.4125094-1-dianders@chromium.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210624171759.4125094-1-dianders@chromium.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Douglas, On Thu, Jun 24, 2021 at 10:17:56AM -0700, Douglas Anderson wrote: > The goal of this patch series is to get better SD/MMC performance on > Qualcomm eMMC controllers and in generally nudge us forward on the > path of allowing some devices to be in strict mode and others to be in > non-strict mode. So if I understand it right, this patch-set wants a per-device decision about setting dma-mode to strict vs. non-strict. I think we should get to the reason why strict mode is used by default first. Is the default on ARM platforms to use iommu-strict mode by default and if so, why? The x86 IOMMUs use non-strict mode by default (yes, it is a security trade-off). Regards, Joerg From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC0CCC2B9F4 for ; Fri, 25 Jun 2021 13:19:06 +0000 (UTC) Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9128861963 for ; Fri, 25 Jun 2021 13:19:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9128861963 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=8bytes.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id 4FFE6607E7; Fri, 25 Jun 2021 13:19:06 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Z7uqktJRM7al; Fri, 25 Jun 2021 13:19:05 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [IPv6:2605:bc80:3010:104::8cd3:938]) by smtp3.osuosl.org (Postfix) with ESMTPS id 3A42B607D1; Fri, 25 Jun 2021 13:19:05 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 0F1C4C001A; Fri, 25 Jun 2021 13:19:05 +0000 (UTC) Received: from smtp3.osuosl.org (smtp3.osuosl.org [IPv6:2605:bc80:3010::136]) by lists.linuxfoundation.org (Postfix) with ESMTP id 0606BC000E for ; Fri, 25 Jun 2021 13:19:04 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id DAA83607B2 for ; Fri, 25 Jun 2021 13:19:03 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TK9h_J_lGAUl for ; Fri, 25 Jun 2021 13:19:03 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.8.0 Received: from theia.8bytes.org (8bytes.org [IPv6:2a01:238:4383:600:38bc:a715:4b6d:a889]) by smtp3.osuosl.org (Postfix) with ESMTPS id 46295605F0 for ; Fri, 25 Jun 2021 13:19:03 +0000 (UTC) Received: by theia.8bytes.org (Postfix, from userid 1000) id A7AA23FC; Fri, 25 Jun 2021 15:18:59 +0200 (CEST) Date: Fri, 25 Jun 2021 15:18:58 +0200 From: Joerg Roedel To: Douglas Anderson Subject: Re: [PATCH v2 0/3] iommu: Enable non-strict DMA on QCom SD/MMC Message-ID: References: <20210624171759.4125094-1-dianders@chromium.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210624171759.4125094-1-dianders@chromium.org> Cc: ulf.hansson@linaro.org, linux-doc@vger.kernel.org, Peter Zijlstra , linux-pci@vger.kernel.org, Konrad Dybcio , Thierry Reding , joel@joelfernandes.org, rajatja@google.com, will@kernel.org, robdclark@chromium.org, saravanak@google.com, Jonathan Corbet , quic_c_gdjako@quicinc.com, linux-arm-kernel@lists.infradead.org, Viresh Kumar , vbadigan@codeaurora.org, "Paul E. McKenney" , linux-arm-msm@vger.kernel.org, bhelgaas@google.com, sonnyrao@chromium.org, Vlastimil Babka , Randy Dunlap , linux-mmc@vger.kernel.org, adrian.hunter@intel.com, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Andrew Morton , robin.murphy@arm.com, "Maciej W. Rozycki" X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi Douglas, On Thu, Jun 24, 2021 at 10:17:56AM -0700, Douglas Anderson wrote: > The goal of this patch series is to get better SD/MMC performance on > Qualcomm eMMC controllers and in generally nudge us forward on the > path of allowing some devices to be in strict mode and others to be in > non-strict mode. So if I understand it right, this patch-set wants a per-device decision about setting dma-mode to strict vs. non-strict. I think we should get to the reason why strict mode is used by default first. Is the default on ARM platforms to use iommu-strict mode by default and if so, why? The x86 IOMMUs use non-strict mode by default (yes, it is a security trade-off). Regards, Joerg _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 270BFC2B9F4 for ; Fri, 25 Jun 2021 13:20:29 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E824061969 for ; Fri, 25 Jun 2021 13:20:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E824061969 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=8bytes.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nwB7NqsoYDpUV3OcnaLqmd6bzcP9PnBjVR+WuNBCQXQ=; b=ZoVjy56NK8I/99 OnB/sA1Rz3ewb50d2HaKYAR2LxRZ3elOx2kgf+eGjEqvgwqc5uORqTxHo5LZ4hGQXZoJDNnJvipjP GRb7txl/zxNufbj/tc4+5ttxLREyfGNTXFPcprzVrV/ewQ7YcN1gtEuuEPsg3O1XUshE/QpT91010 xet2vEGVHXxjoNYdovY2Wc6EQX0VRVhRdyLeKU8EzjeH840/5l8y9kdFKY0xzMrYUfH6f93F5tX7R Ulf5HCLEKZyoAa3QktixwUfFlZ7Lz9dRynmTnJlsroguWOzY+vJta+M1ovzhIHpye81sjFUtNSHtM xvh7W/kdBFiZHNdY1e6A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lwljd-001dzd-NQ; Fri, 25 Jun 2021 13:19:05 +0000 Received: from 8bytes.org ([2a01:238:4383:600:38bc:a715:4b6d:a889] helo=theia.8bytes.org) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lwljZ-001dyQ-EO for linux-arm-kernel@lists.infradead.org; Fri, 25 Jun 2021 13:19:02 +0000 Received: by theia.8bytes.org (Postfix, from userid 1000) id A7AA23FC; Fri, 25 Jun 2021 15:18:59 +0200 (CEST) Date: Fri, 25 Jun 2021 15:18:58 +0200 From: Joerg Roedel To: Douglas Anderson Subject: Re: [PATCH v2 0/3] iommu: Enable non-strict DMA on QCom SD/MMC Message-ID: References: <20210624171759.4125094-1-dianders@chromium.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210624171759.4125094-1-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210625_061901_683856_16AF4A39 X-CRM114-Status: GOOD ( 13.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ulf.hansson@linaro.org, linux-doc@vger.kernel.org, Peter Zijlstra , linux-pci@vger.kernel.org, Konrad Dybcio , Jordan Crouse , Thierry Reding , joel@joelfernandes.org, rajatja@google.com, will@kernel.org, robdclark@chromium.org, saiprakash.ranjan@codeaurora.org, saravanak@google.com, Jonathan Corbet , quic_c_gdjako@quicinc.com, linux-arm-kernel@lists.infradead.org, Viresh Kumar , vbadigan@codeaurora.org, "Paul E. McKenney" , linux-arm-msm@vger.kernel.org, john.garry@huawei.com, Nicolin Chen , bhelgaas@google.com, bjorn.andersson@linaro.org, sonnyrao@chromium.org, Vlastimil Babka , Randy Dunlap , linux-mmc@vger.kernel.org, adrian.hunter@intel.com, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Andrew Morton , robin.murphy@arm.com, "Maciej W. Rozycki" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Douglas, On Thu, Jun 24, 2021 at 10:17:56AM -0700, Douglas Anderson wrote: > The goal of this patch series is to get better SD/MMC performance on > Qualcomm eMMC controllers and in generally nudge us forward on the > path of allowing some devices to be in strict mode and others to be in > non-strict mode. So if I understand it right, this patch-set wants a per-device decision about setting dma-mode to strict vs. non-strict. I think we should get to the reason why strict mode is used by default first. Is the default on ARM platforms to use iommu-strict mode by default and if so, why? The x86 IOMMUs use non-strict mode by default (yes, it is a security trade-off). Regards, Joerg _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel