On Mon, Aug 16, 2021 at 02:18:33PM +0200, Jan Beulich wrote:
> On 16.08.2021 12:25, Marek Marczykowski-Górecki wrote:
> > On Mon, Aug 16, 2021 at 11:18:31AM +0200, Jan Beulich wrote:
> >> Hard to tell without knowing whether the extra reg - as per the spec -
> >> is connected to any of these. Is the spec you have publicly available?
> > 
> > Yes, here: https://www.maxlinear.com/document/index?id=1585&languageid=1033&type=Datasheet&partnumber=XR17V352&filename=XR17V352.pdf&part=XR17V352
> > (and few more links on https://www.maxlinear.com/product/interface/uarts/pcie-uarts/xr17v352, but mostly the above PDF)
> 
> Ah yes, thanks.
> 
> > Hmm, maybe I should add the link to the commit message?
> 
> Wouldn't hurt; question is how likely it is for the link to become stale
> in the next couple of years.

No idea, but the latter URL looks nicer - likely manually chosen
instead of purely generated by some CMS, and as such, there is IMO
better chance for it to remain alive.

> > Other bits are defined and are things IMO we want to keep disabled. See top
> > of the page 40 in the PDF.
> 
> To be honest, in particular for the low 4 bits I'm not sure we should
> alter them if they turn out non-zero (e.g. due to firmware or boot
> loader action).

Given how much time I spent to find out the not working console was
because of failure to disable flow control, I tend to disagree...

-- 
Best Regards,
Marek Marczykowski-Górecki
Invisible Things Lab