[PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Add an initial set of tests for the gpu SUBMIT ioctl.  There is
plenty more we can add, but need to start somewhere.

Rob Clark (3):
  drmtest: Add DRIVER_MSM support
  msm: Add helper library
  msm: Add submit ioctl tests

 .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
 lib/drmtest.c                                 |   3 +
 lib/drmtest.h                                 |   1 +
 lib/igt_msm.c                                 | 211 ++++++++++++++++++
 lib/igt_msm.h                                 | 142 ++++++++++++
 lib/meson.build                               |   1 +
 tests/meson.build                             |   1 +
 tests/msm_submit.c                            | 194 ++++++++++++++++
 8 files changed, 554 insertions(+)
 create mode 100644 lib/igt_msm.c
 create mode 100644 lib/igt_msm.h
 create mode 100644 tests/msm_submit.c

-- 
2.31.1

[igt-dev] [PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Add an initial set of tests for the gpu SUBMIT ioctl.  There is
plenty more we can add, but need to start somewhere.

Rob Clark (3):
  drmtest: Add DRIVER_MSM support
  msm: Add helper library
  msm: Add submit ioctl tests

 .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
 lib/drmtest.c                                 |   3 +
 lib/drmtest.h                                 |   1 +
 lib/igt_msm.c                                 | 211 ++++++++++++++++++
 lib/igt_msm.h                                 | 142 ++++++++++++
 lib/meson.build                               |   1 +
 tests/meson.build                             |   1 +
 tests/msm_submit.c                            | 194 ++++++++++++++++
 8 files changed, 554 insertions(+)
 create mode 100644 lib/igt_msm.c
 create mode 100644 lib/igt_msm.h
 create mode 100644 tests/msm_submit.c

-- 
2.31.1

[PATCH igt v3 1/3] drmtest: Add DRIVER_MSM support

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
---
 lib/drmtest.c | 3 +++
 lib/drmtest.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/lib/drmtest.c b/lib/drmtest.c
index e1f9b115..29cb3f4c 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -179,6 +179,7 @@ static const struct module {
 } modules[] = {
 	{ DRIVER_AMDGPU, "amdgpu" },
 	{ DRIVER_INTEL, "i915", modprobe_i915 },
+	{ DRIVER_MSM, "msm" },
 	{ DRIVER_PANFROST, "panfrost" },
 	{ DRIVER_V3D, "v3d" },
 	{ DRIVER_VC4, "vc4" },
@@ -539,6 +540,8 @@ static const char *chipset_to_str(int chipset)
 		return "amdgpu";
 	case DRIVER_PANFROST:
 		return "panfrost";
+	case DRIVER_MSM:
+		return "msm";
 	case DRIVER_ANY:
 		return "any";
 	default:
diff --git a/lib/drmtest.h b/lib/drmtest.h
index 7d17a0f9..a6eb60c3 100644
--- a/lib/drmtest.h
+++ b/lib/drmtest.h
@@ -50,6 +50,7 @@
 #define DRIVER_AMDGPU	(1 << 3)
 #define DRIVER_V3D	(1 << 4)
 #define DRIVER_PANFROST	(1 << 5)
+#define DRIVER_MSM	(1 << 6)
 
 /*
  * Exclude DRVER_VGEM from DRIVER_ANY since if you run on a system
-- 
2.31.1

[igt-dev] [PATCH igt v3 1/3] drmtest: Add DRIVER_MSM support

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
---
 lib/drmtest.c | 3 +++
 lib/drmtest.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/lib/drmtest.c b/lib/drmtest.c
index e1f9b115..29cb3f4c 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -179,6 +179,7 @@ static const struct module {
 } modules[] = {
 	{ DRIVER_AMDGPU, "amdgpu" },
 	{ DRIVER_INTEL, "i915", modprobe_i915 },
+	{ DRIVER_MSM, "msm" },
 	{ DRIVER_PANFROST, "panfrost" },
 	{ DRIVER_V3D, "v3d" },
 	{ DRIVER_VC4, "vc4" },
@@ -539,6 +540,8 @@ static const char *chipset_to_str(int chipset)
 		return "amdgpu";
 	case DRIVER_PANFROST:
 		return "panfrost";
+	case DRIVER_MSM:
+		return "msm";
 	case DRIVER_ANY:
 		return "any";
 	default:
diff --git a/lib/drmtest.h b/lib/drmtest.h
index 7d17a0f9..a6eb60c3 100644
--- a/lib/drmtest.h
+++ b/lib/drmtest.h
@@ -50,6 +50,7 @@
 #define DRIVER_AMDGPU	(1 << 3)
 #define DRIVER_V3D	(1 << 4)
 #define DRIVER_PANFROST	(1 << 5)
+#define DRIVER_MSM	(1 << 6)
 
 /*
  * Exclude DRVER_VGEM from DRIVER_ANY since if you run on a system
-- 
2.31.1

[PATCH igt v3 2/3] msm: Add helper library

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Handle some of the boilerplate for tests.

v2: fix comment, drop unnecessary drm_open_driver_render() error
    handling, docs fixes, drop igt_msm_pipe_get_param() (for now),
    handle NULL in destructors

Signed-off-by: Rob Clark <robdclark@chromium.org>
---
 .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
 lib/igt_msm.c                                 | 211 ++++++++++++++++++
 lib/igt_msm.h                                 | 142 ++++++++++++
 lib/meson.build                               |   1 +
 4 files changed, 355 insertions(+)
 create mode 100644 lib/igt_msm.c
 create mode 100644 lib/igt_msm.h

diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
index 0f49b4a3..189597c6 100644
--- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
+++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
@@ -34,6 +34,7 @@
     <xi:include href="xml/igt_kms.xml"/>
     <xi:include href="xml/igt_list.xml"/>
     <xi:include href="xml/igt_map.xml"/>
+    <xi:include href="xml/igt_msm.xml"/>
     <xi:include href="xml/igt_pm.xml"/>
     <xi:include href="xml/igt_primes.xml"/>
     <xi:include href="xml/igt_rand.xml"/>
diff --git a/lib/igt_msm.c b/lib/igt_msm.c
new file mode 100644
index 00000000..b9534164
--- /dev/null
+++ b/lib/igt_msm.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright © 2021 Google, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <assert.h>
+#include <string.h>
+#include <signal.h>
+#include <errno.h>
+#include <sys/mman.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <fcntl.h>
+
+#include "drmtest.h"
+#include "igt_aux.h"
+#include "igt_core.h"
+#include "igt_msm.h"
+#include "ioctl_wrappers.h"
+
+/**
+ * SECTION:igt_msm
+ * @short_description: msm support library
+ * @title: msm
+ * @include: igt_msm.h
+ *
+ * This library provides various auxiliary helper functions for writing msm
+ * tests.
+ */
+
+static uint64_t
+get_param(struct msm_device *dev, uint32_t pipe, uint32_t param)
+{
+	struct drm_msm_param req = {
+			.pipe = pipe,
+			.param = param,
+	};
+
+	do_ioctl(dev->fd, DRM_IOCTL_MSM_GET_PARAM, &req);
+
+	return req.value;
+}
+
+/**
+ * igt_msm_dev_open:
+ *
+ * Open the msm drm device.
+ */
+struct msm_device *
+igt_msm_dev_open(void)
+{
+	struct msm_device *dev = calloc(1, sizeof(*dev));
+
+	dev->fd = drm_open_driver_render(DRIVER_MSM);
+	dev->gen = (get_param(dev, MSM_PIPE_3D0, MSM_PARAM_CHIP_ID) >> 24) & 0xff;
+
+	return dev;
+}
+
+/**
+ * igt_msm_dev_close:
+ * @dev: the device to close
+ *
+ * Close the msm drm device.
+ */
+void
+igt_msm_dev_close(struct msm_device *dev)
+{
+	if (!dev)
+		return;
+	close(dev->fd);
+	free(dev);
+}
+
+/**
+ * igt_msm_bo_new:
+ * @dev: the device to allocate the BO from
+ * @size: the requested BO size in bytes
+ * @flags: bitmask of MSM_BO_x
+ *
+ * Allocate a buffer object of the requested size.
+ */
+struct msm_bo *
+igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags)
+{
+	struct msm_bo *bo = calloc(1, sizeof(*bo));
+
+	struct drm_msm_gem_new req = {
+			.size = size,
+			.flags = flags,
+	};
+
+	bo->dev = dev;
+	bo->size = size;
+
+	do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_NEW, &req);
+
+	bo->handle = req.handle;
+
+	return bo;
+}
+
+/**
+ * igt_msm_bo_free:
+ * @bo: the BO to free
+ *
+ * Free a buffer object
+ */
+void
+igt_msm_bo_free(struct msm_bo *bo)
+{
+	if (!bo)
+		return;
+	if (bo->map)
+		munmap(bo->map, bo->size);
+	gem_close(bo->dev->fd, bo->handle);
+	free(bo);
+}
+
+/**
+ * igt_msm_bo_map:
+ * @bo: the BO to map
+ *
+ * Returns a pointer to mmap'd buffer.
+ */
+void *
+igt_msm_bo_map(struct msm_bo *bo)
+{
+	if (!bo->map) {
+		struct drm_msm_gem_info req = {
+				.handle = bo->handle,
+				.info = MSM_INFO_GET_OFFSET,
+		};
+		void *ptr;
+
+		do_ioctl(bo->dev->fd, DRM_IOCTL_MSM_GEM_INFO, &req);
+
+		ptr = mmap(0, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,
+				bo->dev->fd, req.value);
+		if (ptr == MAP_FAILED)
+			return NULL;
+
+		bo->map = ptr;
+	}
+	return bo->map;
+}
+
+/**
+ * igt_msm_pipe_open:
+ * @dev: the device to create a submitqueue/pipe against
+ * @prio: the requested priority, from 0 (highest) to MSM_PARAM_PRIORITIES-1
+ *        (lowest)
+ *
+ * Allocate a pipe/submitqueue against which cmdstream may be submitted.
+ */
+struct msm_pipe *
+igt_msm_pipe_open(struct msm_device *dev, uint32_t prio)
+{
+	struct msm_pipe *pipe = calloc(1, sizeof(*pipe));
+	struct drm_msm_submitqueue req = {
+			.flags = 0,
+			.prio = prio,
+	};
+
+	pipe->dev = dev;
+	pipe->pipe = MSM_PIPE_3D0;
+
+	/* Note that kernels prior to v4.15 did not support submitqueues.
+	 * Mesa maintains support for older kernels, but IGT does not need
+	 * to.
+	 */
+	do_ioctl(dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_NEW, &req);
+
+	pipe->submitqueue_id = req.id;
+
+	return pipe;
+}
+
+/**
+ * igt_msm_pipe_close:
+ * @pipe: the pipe to close
+ *
+ * Close a pipe
+ */
+void
+igt_msm_pipe_close(struct msm_pipe *pipe)
+{
+	if (!pipe)
+		return;
+	do_ioctl(pipe->dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE, &pipe->submitqueue_id);
+	free(pipe);
+}
diff --git a/lib/igt_msm.h b/lib/igt_msm.h
new file mode 100644
index 00000000..99a099c1
--- /dev/null
+++ b/lib/igt_msm.h
@@ -0,0 +1,142 @@
+/*
+ * Copyright © 2021 Google, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef IGT_MSM_H
+#define IGT_MSM_H
+
+#include "msm_drm.h"
+
+/**
+ * msm_device:
+ * @fd: the drm device file descriptor
+ * @gen: the device major generation (ie. 2 for a2xx, etc)
+ *
+ * Helper container for device and device related parameters used by tests.
+ */
+struct msm_device {
+	int fd;
+	unsigned gen;
+};
+
+struct msm_device *igt_msm_dev_open(void);
+void igt_msm_dev_close(struct msm_device *dev);
+
+/**
+ * msm_bo:
+ * @dev: the device the BO is allocated from
+ * @handle: the BO's GEM handle
+ * @size: the BO's size
+ * @map: the BO's memory mapping (if mapped)
+ *
+ * Helper wrapper for a GEM buffer object.
+ */
+struct msm_bo {
+	struct msm_device *dev;
+	int handle;
+	uint32_t size;
+	void *map;
+};
+
+struct msm_bo *igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags);
+void igt_msm_bo_free(struct msm_bo *bo);
+void *igt_msm_bo_map(struct msm_bo *bo);
+
+/**
+ * msm_pipe:
+ * @dev: the device the pipe is allocated from
+ * @pipe: the pipe id
+ * @submitqueue_id: the submitqueue id
+ *
+ * Helper wrapper for a submitqueue for cmdstream submission.
+ */
+struct msm_pipe {
+	struct msm_device *dev;
+	uint32_t pipe;
+	uint32_t submitqueue_id;
+};
+
+struct msm_pipe *igt_msm_pipe_open(struct msm_device *dev, uint32_t prio);
+void igt_msm_pipe_close(struct msm_pipe *pipe);
+
+/*
+ * Helpers for cmdstream building:
+ */
+
+enum adreno_pm4_packet_type {
+	CP_TYPE0_PKT = 0,
+	CP_TYPE1_PKT = 0x40000000,
+	CP_TYPE2_PKT = 0x80000000,
+	CP_TYPE3_PKT = 0xc0000000,
+	CP_TYPE4_PKT = 0x40000000,
+	CP_TYPE7_PKT = 0x70000000,
+};
+
+enum adreno_pm4_type3_packets {
+	CP_NOP = 16,
+};
+
+static inline unsigned
+pm4_odd_parity_bit(unsigned val)
+{
+	/* See: http://graphics.stanford.edu/~seander/bithacks.html#ParityParallel
+	 * note that we want odd parity so 0x6996 is inverted.
+	 */
+	val ^= val >> 16;
+	val ^= val >> 8;
+	val ^= val >> 4;
+	val &= 0xf;
+	return (~0x6996 >> val) & 1;
+}
+
+static inline uint32_t
+pm4_pkt0_hdr(uint16_t regindx, uint16_t cnt)
+{
+	return CP_TYPE0_PKT | ((cnt - 1) << 16) | (regindx & 0x7fff);
+}
+
+static inline uint32_t
+pm4_pkt3_hdr(uint8_t opcode, uint16_t cnt)
+{
+	return CP_TYPE3_PKT | ((cnt - 1) << 16) | ((opcode & 0xff) << 8);
+}
+
+static inline uint32_t
+pm4_pkt4_hdr(uint16_t regindx, uint16_t cnt)
+{
+	return CP_TYPE4_PKT | cnt | (pm4_odd_parity_bit(cnt) << 7) |
+			((regindx & 0x3ffff) << 8) |
+			((pm4_odd_parity_bit(regindx) << 27));
+}
+
+static inline uint32_t
+pm4_pkt7_hdr(uint8_t opcode, uint16_t cnt)
+{
+	return CP_TYPE7_PKT | cnt | (pm4_odd_parity_bit(cnt) << 15) |
+			((opcode & 0x7f) << 16) |
+			((pm4_odd_parity_bit(opcode) << 23));
+}
+
+#define U642VOID(x) ((void *)(uintptr_t)(x))
+#define VOID2U64(x) ((uint64_t)(uintptr_t)(x))
+
+#endif /* IGT_MSM_H */
diff --git a/lib/meson.build b/lib/meson.build
index 67d40512..c3080fc8 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -82,6 +82,7 @@ lib_sources = [
 	'igt_eld.c',
 	'igt_infoframe.c',
 	'veboxcopy_gen12.c',
+	'igt_msm.c',
 ]
 
 lib_deps = [
-- 
2.31.1

[igt-dev] [PATCH igt v3 2/3] msm: Add helper library

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Handle some of the boilerplate for tests.

v2: fix comment, drop unnecessary drm_open_driver_render() error
    handling, docs fixes, drop igt_msm_pipe_get_param() (for now),
    handle NULL in destructors

Signed-off-by: Rob Clark <robdclark@chromium.org>
---
 .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
 lib/igt_msm.c                                 | 211 ++++++++++++++++++
 lib/igt_msm.h                                 | 142 ++++++++++++
 lib/meson.build                               |   1 +
 4 files changed, 355 insertions(+)
 create mode 100644 lib/igt_msm.c
 create mode 100644 lib/igt_msm.h

diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
index 0f49b4a3..189597c6 100644
--- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
+++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
@@ -34,6 +34,7 @@
     <xi:include href="xml/igt_kms.xml"/>
     <xi:include href="xml/igt_list.xml"/>
     <xi:include href="xml/igt_map.xml"/>
+    <xi:include href="xml/igt_msm.xml"/>
     <xi:include href="xml/igt_pm.xml"/>
     <xi:include href="xml/igt_primes.xml"/>
     <xi:include href="xml/igt_rand.xml"/>
diff --git a/lib/igt_msm.c b/lib/igt_msm.c
new file mode 100644
index 00000000..b9534164
--- /dev/null
+++ b/lib/igt_msm.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright © 2021 Google, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <assert.h>
+#include <string.h>
+#include <signal.h>
+#include <errno.h>
+#include <sys/mman.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <fcntl.h>
+
+#include "drmtest.h"
+#include "igt_aux.h"
+#include "igt_core.h"
+#include "igt_msm.h"
+#include "ioctl_wrappers.h"
+
+/**
+ * SECTION:igt_msm
+ * @short_description: msm support library
+ * @title: msm
+ * @include: igt_msm.h
+ *
+ * This library provides various auxiliary helper functions for writing msm
+ * tests.
+ */
+
+static uint64_t
+get_param(struct msm_device *dev, uint32_t pipe, uint32_t param)
+{
+	struct drm_msm_param req = {
+			.pipe = pipe,
+			.param = param,
+	};
+
+	do_ioctl(dev->fd, DRM_IOCTL_MSM_GET_PARAM, &req);
+
+	return req.value;
+}
+
+/**
+ * igt_msm_dev_open:
+ *
+ * Open the msm drm device.
+ */
+struct msm_device *
+igt_msm_dev_open(void)
+{
+	struct msm_device *dev = calloc(1, sizeof(*dev));
+
+	dev->fd = drm_open_driver_render(DRIVER_MSM);
+	dev->gen = (get_param(dev, MSM_PIPE_3D0, MSM_PARAM_CHIP_ID) >> 24) & 0xff;
+
+	return dev;
+}
+
+/**
+ * igt_msm_dev_close:
+ * @dev: the device to close
+ *
+ * Close the msm drm device.
+ */
+void
+igt_msm_dev_close(struct msm_device *dev)
+{
+	if (!dev)
+		return;
+	close(dev->fd);
+	free(dev);
+}
+
+/**
+ * igt_msm_bo_new:
+ * @dev: the device to allocate the BO from
+ * @size: the requested BO size in bytes
+ * @flags: bitmask of MSM_BO_x
+ *
+ * Allocate a buffer object of the requested size.
+ */
+struct msm_bo *
+igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags)
+{
+	struct msm_bo *bo = calloc(1, sizeof(*bo));
+
+	struct drm_msm_gem_new req = {
+			.size = size,
+			.flags = flags,
+	};
+
+	bo->dev = dev;
+	bo->size = size;
+
+	do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_NEW, &req);
+
+	bo->handle = req.handle;
+
+	return bo;
+}
+
+/**
+ * igt_msm_bo_free:
+ * @bo: the BO to free
+ *
+ * Free a buffer object
+ */
+void
+igt_msm_bo_free(struct msm_bo *bo)
+{
+	if (!bo)
+		return;
+	if (bo->map)
+		munmap(bo->map, bo->size);
+	gem_close(bo->dev->fd, bo->handle);
+	free(bo);
+}
+
+/**
+ * igt_msm_bo_map:
+ * @bo: the BO to map
+ *
+ * Returns a pointer to mmap'd buffer.
+ */
+void *
+igt_msm_bo_map(struct msm_bo *bo)
+{
+	if (!bo->map) {
+		struct drm_msm_gem_info req = {
+				.handle = bo->handle,
+				.info = MSM_INFO_GET_OFFSET,
+		};
+		void *ptr;
+
+		do_ioctl(bo->dev->fd, DRM_IOCTL_MSM_GEM_INFO, &req);
+
+		ptr = mmap(0, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,
+				bo->dev->fd, req.value);
+		if (ptr == MAP_FAILED)
+			return NULL;
+
+		bo->map = ptr;
+	}
+	return bo->map;
+}
+
+/**
+ * igt_msm_pipe_open:
+ * @dev: the device to create a submitqueue/pipe against
+ * @prio: the requested priority, from 0 (highest) to MSM_PARAM_PRIORITIES-1
+ *        (lowest)
+ *
+ * Allocate a pipe/submitqueue against which cmdstream may be submitted.
+ */
+struct msm_pipe *
+igt_msm_pipe_open(struct msm_device *dev, uint32_t prio)
+{
+	struct msm_pipe *pipe = calloc(1, sizeof(*pipe));
+	struct drm_msm_submitqueue req = {
+			.flags = 0,
+			.prio = prio,
+	};
+
+	pipe->dev = dev;
+	pipe->pipe = MSM_PIPE_3D0;
+
+	/* Note that kernels prior to v4.15 did not support submitqueues.
+	 * Mesa maintains support for older kernels, but IGT does not need
+	 * to.
+	 */
+	do_ioctl(dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_NEW, &req);
+
+	pipe->submitqueue_id = req.id;
+
+	return pipe;
+}
+
+/**
+ * igt_msm_pipe_close:
+ * @pipe: the pipe to close
+ *
+ * Close a pipe
+ */
+void
+igt_msm_pipe_close(struct msm_pipe *pipe)
+{
+	if (!pipe)
+		return;
+	do_ioctl(pipe->dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE, &pipe->submitqueue_id);
+	free(pipe);
+}
diff --git a/lib/igt_msm.h b/lib/igt_msm.h
new file mode 100644
index 00000000..99a099c1
--- /dev/null
+++ b/lib/igt_msm.h
@@ -0,0 +1,142 @@
+/*
+ * Copyright © 2021 Google, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef IGT_MSM_H
+#define IGT_MSM_H
+
+#include "msm_drm.h"
+
+/**
+ * msm_device:
+ * @fd: the drm device file descriptor
+ * @gen: the device major generation (ie. 2 for a2xx, etc)
+ *
+ * Helper container for device and device related parameters used by tests.
+ */
+struct msm_device {
+	int fd;
+	unsigned gen;
+};
+
+struct msm_device *igt_msm_dev_open(void);
+void igt_msm_dev_close(struct msm_device *dev);
+
+/**
+ * msm_bo:
+ * @dev: the device the BO is allocated from
+ * @handle: the BO's GEM handle
+ * @size: the BO's size
+ * @map: the BO's memory mapping (if mapped)
+ *
+ * Helper wrapper for a GEM buffer object.
+ */
+struct msm_bo {
+	struct msm_device *dev;
+	int handle;
+	uint32_t size;
+	void *map;
+};
+
+struct msm_bo *igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags);
+void igt_msm_bo_free(struct msm_bo *bo);
+void *igt_msm_bo_map(struct msm_bo *bo);
+
+/**
+ * msm_pipe:
+ * @dev: the device the pipe is allocated from
+ * @pipe: the pipe id
+ * @submitqueue_id: the submitqueue id
+ *
+ * Helper wrapper for a submitqueue for cmdstream submission.
+ */
+struct msm_pipe {
+	struct msm_device *dev;
+	uint32_t pipe;
+	uint32_t submitqueue_id;
+};
+
+struct msm_pipe *igt_msm_pipe_open(struct msm_device *dev, uint32_t prio);
+void igt_msm_pipe_close(struct msm_pipe *pipe);
+
+/*
+ * Helpers for cmdstream building:
+ */
+
+enum adreno_pm4_packet_type {
+	CP_TYPE0_PKT = 0,
+	CP_TYPE1_PKT = 0x40000000,
+	CP_TYPE2_PKT = 0x80000000,
+	CP_TYPE3_PKT = 0xc0000000,
+	CP_TYPE4_PKT = 0x40000000,
+	CP_TYPE7_PKT = 0x70000000,
+};
+
+enum adreno_pm4_type3_packets {
+	CP_NOP = 16,
+};
+
+static inline unsigned
+pm4_odd_parity_bit(unsigned val)
+{
+	/* See: http://graphics.stanford.edu/~seander/bithacks.html#ParityParallel
+	 * note that we want odd parity so 0x6996 is inverted.
+	 */
+	val ^= val >> 16;
+	val ^= val >> 8;
+	val ^= val >> 4;
+	val &= 0xf;
+	return (~0x6996 >> val) & 1;
+}
+
+static inline uint32_t
+pm4_pkt0_hdr(uint16_t regindx, uint16_t cnt)
+{
+	return CP_TYPE0_PKT | ((cnt - 1) << 16) | (regindx & 0x7fff);
+}
+
+static inline uint32_t
+pm4_pkt3_hdr(uint8_t opcode, uint16_t cnt)
+{
+	return CP_TYPE3_PKT | ((cnt - 1) << 16) | ((opcode & 0xff) << 8);
+}
+
+static inline uint32_t
+pm4_pkt4_hdr(uint16_t regindx, uint16_t cnt)
+{
+	return CP_TYPE4_PKT | cnt | (pm4_odd_parity_bit(cnt) << 7) |
+			((regindx & 0x3ffff) << 8) |
+			((pm4_odd_parity_bit(regindx) << 27));
+}
+
+static inline uint32_t
+pm4_pkt7_hdr(uint8_t opcode, uint16_t cnt)
+{
+	return CP_TYPE7_PKT | cnt | (pm4_odd_parity_bit(cnt) << 15) |
+			((opcode & 0x7f) << 16) |
+			((pm4_odd_parity_bit(opcode) << 23));
+}
+
+#define U642VOID(x) ((void *)(uintptr_t)(x))
+#define VOID2U64(x) ((uint64_t)(uintptr_t)(x))
+
+#endif /* IGT_MSM_H */
diff --git a/lib/meson.build b/lib/meson.build
index 67d40512..c3080fc8 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -82,6 +82,7 @@ lib_sources = [
 	'igt_eld.c',
 	'igt_infoframe.c',
 	'veboxcopy_gen12.c',
+	'igt_msm.c',
 ]
 
 lib_deps = [
-- 
2.31.1

[PATCH igt v3 3/3] msm: Add submit ioctl tests

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Add an initial set of tests for the submit ioctl.

v2: Add NULL inits, igt_describe()

Signed-off-by: Rob Clark <robdclark@chromium.org>
---
 tests/meson.build  |   1 +
 tests/msm_submit.c | 194 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 195 insertions(+)
 create mode 100644 tests/msm_submit.c

diff --git a/tests/meson.build b/tests/meson.build
index 1bdfddbb..ff7c709a 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -107,6 +107,7 @@ test_progs = [
 	'vc4_wait_seqno',
 	'vgem_basic',
 	'vgem_slow',
+	'msm_submit',
 ]
 
 i915_progs = [
diff --git a/tests/msm_submit.c b/tests/msm_submit.c
new file mode 100644
index 00000000..95f8318f
--- /dev/null
+++ b/tests/msm_submit.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright © 2021 Google, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_msm.h"
+
+igt_main
+{
+	struct msm_device *dev = NULL;
+	struct msm_pipe *pipe = NULL;
+	struct msm_bo *a = NULL, *b = NULL;
+
+	igt_fixture {
+		dev = igt_msm_dev_open();
+		pipe = igt_msm_pipe_open(dev, 0);
+		a = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
+		b = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
+	}
+
+	igt_describe("Check that a valid empty submit succeeds");
+	igt_subtest("empty-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+		};
+		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
+	}
+
+	igt_describe("Check that submit with invalid submitqueue id fails");
+	igt_subtest("invalid-queue-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = 0x1234,
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, ENOENT);
+	}
+
+	igt_describe("Check that submit with invalid flags fails");
+	igt_subtest("invalid-flags-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = 0x1234,
+				.queueid = pipe->submitqueue_id,
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with invalid in-fence fd fails");
+	igt_subtest("invalid-in-fence-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe | MSM_SUBMIT_FENCE_FD_IN,
+				.queueid = pipe->submitqueue_id,
+				.fence_fd = dev->fd,  /* This is not a fence fd! */
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with duplicate bo fails");
+	igt_subtest("invalid-duplicate-bo-submit") {
+		struct drm_msm_gem_submit_bo bos[] = {
+			[0] = {
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+			[1] = {
+				.handle     = b->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+			[2] = {
+				/* this is invalid.. there should not be two entries
+				 * for the same bo, instead a single entry w/ all
+				 * usage flags OR'd together should be used.  Kernel
+				 * should catch this, and return an error code after
+				 * cleaning up properly (not leaking any bo's)
+				 */
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_WRITE,
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_bos  = ARRAY_SIZE(bos),
+				.bos     = VOID2U64(bos),
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with cmdstream referencing an invalid bo fails");
+	igt_subtest("invalid-cmd-idx-submit") {
+		struct drm_msm_gem_submit_cmd cmds[] = {
+			[0] = {
+				.type       = MSM_SUBMIT_CMD_BUF,
+				.submit_idx = 0,      /* bos[0] does not exist */
+				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_cmds    = ARRAY_SIZE(cmds),
+				.cmds       = VOID2U64(cmds),
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with invalid cmdstream type fails");
+	igt_subtest("invalid-cmd-type-submit") {
+		struct drm_msm_gem_submit_bo bos[] = {
+			[0] = {
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+		};
+		struct drm_msm_gem_submit_cmd cmds[] = {
+			[0] = {
+				.type       = 0x1234,
+				.submit_idx = 0,
+				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_cmds    = ARRAY_SIZE(cmds),
+				.cmds       = VOID2U64(cmds),
+				.nr_bos  = ARRAY_SIZE(bos),
+				.bos     = VOID2U64(bos),
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that a valid non-empty submit succeeds");
+	igt_subtest("valid-submit") {
+		struct drm_msm_gem_submit_bo bos[] = {
+			[0] = {
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+		};
+		struct drm_msm_gem_submit_cmd cmds[] = {
+			[0] = {
+				.type       = MSM_SUBMIT_CMD_BUF,
+				.submit_idx = 0,
+				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_cmds    = ARRAY_SIZE(cmds),
+				.cmds       = VOID2U64(cmds),
+				.nr_bos  = ARRAY_SIZE(bos),
+				.bos     = VOID2U64(bos),
+		};
+		uint32_t *cmdstream = igt_msm_bo_map(a);
+		if (dev->gen >= 5) {
+			*(cmdstream++) = pm4_pkt7_hdr(CP_NOP, 3);
+		} else {
+			*(cmdstream++) = pm4_pkt3_hdr(CP_NOP, 3);
+		}
+		*(cmdstream++) = 0;
+		*(cmdstream++) = 0;
+		*(cmdstream++) = 0;
+
+		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
+	}
+
+	igt_fixture {
+		igt_msm_bo_free(a);
+		igt_msm_bo_free(b);
+		igt_msm_pipe_close(pipe);
+		igt_msm_dev_close(dev);
+	}
+}
-- 
2.31.1

[igt-dev] [PATCH igt v3 3/3] msm: Add submit ioctl tests

[Rob Clark]

From: Rob Clark <robdclark@chromium.org>

Add an initial set of tests for the submit ioctl.

v2: Add NULL inits, igt_describe()

Signed-off-by: Rob Clark <robdclark@chromium.org>
---
 tests/meson.build  |   1 +
 tests/msm_submit.c | 194 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 195 insertions(+)
 create mode 100644 tests/msm_submit.c

diff --git a/tests/meson.build b/tests/meson.build
index 1bdfddbb..ff7c709a 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -107,6 +107,7 @@ test_progs = [
 	'vc4_wait_seqno',
 	'vgem_basic',
 	'vgem_slow',
+	'msm_submit',
 ]
 
 i915_progs = [
diff --git a/tests/msm_submit.c b/tests/msm_submit.c
new file mode 100644
index 00000000..95f8318f
--- /dev/null
+++ b/tests/msm_submit.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright © 2021 Google, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_msm.h"
+
+igt_main
+{
+	struct msm_device *dev = NULL;
+	struct msm_pipe *pipe = NULL;
+	struct msm_bo *a = NULL, *b = NULL;
+
+	igt_fixture {
+		dev = igt_msm_dev_open();
+		pipe = igt_msm_pipe_open(dev, 0);
+		a = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
+		b = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
+	}
+
+	igt_describe("Check that a valid empty submit succeeds");
+	igt_subtest("empty-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+		};
+		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
+	}
+
+	igt_describe("Check that submit with invalid submitqueue id fails");
+	igt_subtest("invalid-queue-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = 0x1234,
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, ENOENT);
+	}
+
+	igt_describe("Check that submit with invalid flags fails");
+	igt_subtest("invalid-flags-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = 0x1234,
+				.queueid = pipe->submitqueue_id,
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with invalid in-fence fd fails");
+	igt_subtest("invalid-in-fence-submit") {
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe | MSM_SUBMIT_FENCE_FD_IN,
+				.queueid = pipe->submitqueue_id,
+				.fence_fd = dev->fd,  /* This is not a fence fd! */
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with duplicate bo fails");
+	igt_subtest("invalid-duplicate-bo-submit") {
+		struct drm_msm_gem_submit_bo bos[] = {
+			[0] = {
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+			[1] = {
+				.handle     = b->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+			[2] = {
+				/* this is invalid.. there should not be two entries
+				 * for the same bo, instead a single entry w/ all
+				 * usage flags OR'd together should be used.  Kernel
+				 * should catch this, and return an error code after
+				 * cleaning up properly (not leaking any bo's)
+				 */
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_WRITE,
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_bos  = ARRAY_SIZE(bos),
+				.bos     = VOID2U64(bos),
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with cmdstream referencing an invalid bo fails");
+	igt_subtest("invalid-cmd-idx-submit") {
+		struct drm_msm_gem_submit_cmd cmds[] = {
+			[0] = {
+				.type       = MSM_SUBMIT_CMD_BUF,
+				.submit_idx = 0,      /* bos[0] does not exist */
+				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_cmds    = ARRAY_SIZE(cmds),
+				.cmds       = VOID2U64(cmds),
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that submit with invalid cmdstream type fails");
+	igt_subtest("invalid-cmd-type-submit") {
+		struct drm_msm_gem_submit_bo bos[] = {
+			[0] = {
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+		};
+		struct drm_msm_gem_submit_cmd cmds[] = {
+			[0] = {
+				.type       = 0x1234,
+				.submit_idx = 0,
+				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_cmds    = ARRAY_SIZE(cmds),
+				.cmds       = VOID2U64(cmds),
+				.nr_bos  = ARRAY_SIZE(bos),
+				.bos     = VOID2U64(bos),
+		};
+		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
+	}
+
+	igt_describe("Check that a valid non-empty submit succeeds");
+	igt_subtest("valid-submit") {
+		struct drm_msm_gem_submit_bo bos[] = {
+			[0] = {
+				.handle     = a->handle,
+				.flags      = MSM_SUBMIT_BO_READ,
+			},
+		};
+		struct drm_msm_gem_submit_cmd cmds[] = {
+			[0] = {
+				.type       = MSM_SUBMIT_CMD_BUF,
+				.submit_idx = 0,
+				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
+			},
+		};
+		struct drm_msm_gem_submit req = {
+				.flags   = pipe->pipe,
+				.queueid = pipe->submitqueue_id,
+				.nr_cmds    = ARRAY_SIZE(cmds),
+				.cmds       = VOID2U64(cmds),
+				.nr_bos  = ARRAY_SIZE(bos),
+				.bos     = VOID2U64(bos),
+		};
+		uint32_t *cmdstream = igt_msm_bo_map(a);
+		if (dev->gen >= 5) {
+			*(cmdstream++) = pm4_pkt7_hdr(CP_NOP, 3);
+		} else {
+			*(cmdstream++) = pm4_pkt3_hdr(CP_NOP, 3);
+		}
+		*(cmdstream++) = 0;
+		*(cmdstream++) = 0;
+		*(cmdstream++) = 0;
+
+		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
+	}
+
+	igt_fixture {
+		igt_msm_bo_free(a);
+		igt_msm_bo_free(b);
+		igt_msm_pipe_close(pipe);
+		igt_msm_dev_close(dev);
+	}
+}
-- 
2.31.1

[igt-dev] ✗ Fi.CI.BAT: failure for Initial igt tests for drm/msm ioctls (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3373 bytes --]

== Series Details ==

Series: Initial igt tests for drm/msm ioctls (rev3)
URL   : https://patchwork.freedesktop.org/series/93973/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10536 -> IGTPW_6173
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_6173 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_6173, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_6173:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - fi-tgl-1115g4:      [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-tgl-1115g4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-tgl-1115g4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  
Known issues
------------

  Here are the changes found in IGTPW_6173 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-snb-2600:        NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - fi-snb-2600:        [INCOMPLETE][4] ([i915#3921]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921


Participating hosts (44 -> 34)
------------------------------

  Missing    (10): fi-ilk-m540 fi-rkl-guc bat-adls-5 bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-bdw-samus bat-jsl-1 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6191 -> IGTPW_6173

  CI-20190529: 20190529
  CI_DRM_10536: b6d834a72c14ca22b2df32a607c1ee36e8629f1a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6173: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html
  IGT_6191: e9292b533691784f46eeb9bae522ca7a8710c920 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git



== Testlist changes ==

+igt@msm_submit@empty-submit
+igt@msm_submit@invalid-cmd-idx-submit
+igt@msm_submit@invalid-cmd-type-submit
+igt@msm_submit@invalid-duplicate-bo-submit
+igt@msm_submit@invalid-flags-submit
+igt@msm_submit@invalid-in-fence-submit
+igt@msm_submit@invalid-queue-submit
+igt@msm_submit@valid-submit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

[-- Attachment #2: Type: text/html, Size: 4016 bytes --]

Re: [igt-dev] ✗ Fi.CI.BAT: failure for Initial igt tests for drm/msm ioctls (rev3)

[Petri Latvala]

On Mon, Aug 30, 2021 at 05:04:53PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: Initial igt tests for drm/msm ioctls (rev3)
> URL   : https://patchwork.freedesktop.org/series/93973/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10536 -> IGTPW_6173
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with IGTPW_6173 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in IGTPW_6173, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in IGTPW_6173:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
>     - fi-tgl-1115g4:      [PASS][1] -> [FAIL][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-tgl-1115g4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-tgl-1115g4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html


Lakshmi, false positive here.


-- 
Petri Latvala



> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in IGTPW_6173 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
>     - fi-snb-2600:        NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@i915_selftest@live@hangcheck:
>     - fi-snb-2600:        [INCOMPLETE][4] ([i915#3921]) -> [PASS][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
>   [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
> 
> 
> Participating hosts (44 -> 34)
> ------------------------------
> 
>   Missing    (10): fi-ilk-m540 fi-rkl-guc bat-adls-5 bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-bdw-samus bat-jsl-1 
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * IGT: IGT_6191 -> IGTPW_6173
> 
>   CI-20190529: 20190529
>   CI_DRM_10536: b6d834a72c14ca22b2df32a607c1ee36e8629f1a @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_6173: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html
>   IGT_6191: e9292b533691784f46eeb9bae522ca7a8710c920 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> 
> 
> 
> == Testlist changes ==
> 
> +igt@msm_submit@empty-submit
> +igt@msm_submit@invalid-cmd-idx-submit
> +igt@msm_submit@invalid-cmd-type-submit
> +igt@msm_submit@invalid-duplicate-bo-submit
> +igt@msm_submit@invalid-flags-submit
> +igt@msm_submit@invalid-in-fence-submit
> +igt@msm_submit@invalid-queue-submit
> +igt@msm_submit@valid-submit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

Re: [PATCH igt v3 2/3] msm: Add helper library

[Petri Latvala]

On Mon, Aug 30, 2021 at 09:22:31AM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
> 
> Handle some of the boilerplate for tests.
> 
> v2: fix comment, drop unnecessary drm_open_driver_render() error
>     handling, docs fixes, drop igt_msm_pipe_get_param() (for now),
>     handle NULL in destructors
> 
> Signed-off-by: Rob Clark <robdclark@chromium.org>

Reviewed-by: Petri Latvala <petri.latvala@intel.com>

> ---
>  .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
>  lib/igt_msm.c                                 | 211 ++++++++++++++++++
>  lib/igt_msm.h                                 | 142 ++++++++++++
>  lib/meson.build                               |   1 +
>  4 files changed, 355 insertions(+)
>  create mode 100644 lib/igt_msm.c
>  create mode 100644 lib/igt_msm.h
> 
> diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> index 0f49b4a3..189597c6 100644
> --- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> +++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> @@ -34,6 +34,7 @@
>      <xi:include href="xml/igt_kms.xml"/>
>      <xi:include href="xml/igt_list.xml"/>
>      <xi:include href="xml/igt_map.xml"/>
> +    <xi:include href="xml/igt_msm.xml"/>
>      <xi:include href="xml/igt_pm.xml"/>
>      <xi:include href="xml/igt_primes.xml"/>
>      <xi:include href="xml/igt_rand.xml"/>
> diff --git a/lib/igt_msm.c b/lib/igt_msm.c
> new file mode 100644
> index 00000000..b9534164
> --- /dev/null
> +++ b/lib/igt_msm.c
> @@ -0,0 +1,211 @@
> +/*
> + * Copyright © 2021 Google, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include <assert.h>
> +#include <string.h>
> +#include <signal.h>
> +#include <errno.h>
> +#include <sys/mman.h>
> +#include <sys/types.h>
> +#include <sys/stat.h>
> +#include <sys/ioctl.h>
> +#include <fcntl.h>
> +
> +#include "drmtest.h"
> +#include "igt_aux.h"
> +#include "igt_core.h"
> +#include "igt_msm.h"
> +#include "ioctl_wrappers.h"
> +
> +/**
> + * SECTION:igt_msm
> + * @short_description: msm support library
> + * @title: msm
> + * @include: igt_msm.h
> + *
> + * This library provides various auxiliary helper functions for writing msm
> + * tests.
> + */
> +
> +static uint64_t
> +get_param(struct msm_device *dev, uint32_t pipe, uint32_t param)
> +{
> +	struct drm_msm_param req = {
> +			.pipe = pipe,
> +			.param = param,
> +	};
> +
> +	do_ioctl(dev->fd, DRM_IOCTL_MSM_GET_PARAM, &req);
> +
> +	return req.value;
> +}
> +
> +/**
> + * igt_msm_dev_open:
> + *
> + * Open the msm drm device.
> + */
> +struct msm_device *
> +igt_msm_dev_open(void)
> +{
> +	struct msm_device *dev = calloc(1, sizeof(*dev));
> +
> +	dev->fd = drm_open_driver_render(DRIVER_MSM);
> +	dev->gen = (get_param(dev, MSM_PIPE_3D0, MSM_PARAM_CHIP_ID) >> 24) & 0xff;
> +
> +	return dev;
> +}
> +
> +/**
> + * igt_msm_dev_close:
> + * @dev: the device to close
> + *
> + * Close the msm drm device.
> + */
> +void
> +igt_msm_dev_close(struct msm_device *dev)
> +{
> +	if (!dev)
> +		return;
> +	close(dev->fd);
> +	free(dev);
> +}
> +
> +/**
> + * igt_msm_bo_new:
> + * @dev: the device to allocate the BO from
> + * @size: the requested BO size in bytes
> + * @flags: bitmask of MSM_BO_x
> + *
> + * Allocate a buffer object of the requested size.
> + */
> +struct msm_bo *
> +igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags)
> +{
> +	struct msm_bo *bo = calloc(1, sizeof(*bo));
> +
> +	struct drm_msm_gem_new req = {
> +			.size = size,
> +			.flags = flags,
> +	};
> +
> +	bo->dev = dev;
> +	bo->size = size;
> +
> +	do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_NEW, &req);
> +
> +	bo->handle = req.handle;
> +
> +	return bo;
> +}
> +
> +/**
> + * igt_msm_bo_free:
> + * @bo: the BO to free
> + *
> + * Free a buffer object
> + */
> +void
> +igt_msm_bo_free(struct msm_bo *bo)
> +{
> +	if (!bo)
> +		return;
> +	if (bo->map)
> +		munmap(bo->map, bo->size);
> +	gem_close(bo->dev->fd, bo->handle);
> +	free(bo);
> +}
> +
> +/**
> + * igt_msm_bo_map:
> + * @bo: the BO to map
> + *
> + * Returns a pointer to mmap'd buffer.
> + */
> +void *
> +igt_msm_bo_map(struct msm_bo *bo)
> +{
> +	if (!bo->map) {
> +		struct drm_msm_gem_info req = {
> +				.handle = bo->handle,
> +				.info = MSM_INFO_GET_OFFSET,
> +		};
> +		void *ptr;
> +
> +		do_ioctl(bo->dev->fd, DRM_IOCTL_MSM_GEM_INFO, &req);
> +
> +		ptr = mmap(0, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,
> +				bo->dev->fd, req.value);
> +		if (ptr == MAP_FAILED)
> +			return NULL;
> +
> +		bo->map = ptr;
> +	}
> +	return bo->map;
> +}
> +
> +/**
> + * igt_msm_pipe_open:
> + * @dev: the device to create a submitqueue/pipe against
> + * @prio: the requested priority, from 0 (highest) to MSM_PARAM_PRIORITIES-1
> + *        (lowest)
> + *
> + * Allocate a pipe/submitqueue against which cmdstream may be submitted.
> + */
> +struct msm_pipe *
> +igt_msm_pipe_open(struct msm_device *dev, uint32_t prio)
> +{
> +	struct msm_pipe *pipe = calloc(1, sizeof(*pipe));
> +	struct drm_msm_submitqueue req = {
> +			.flags = 0,
> +			.prio = prio,
> +	};
> +
> +	pipe->dev = dev;
> +	pipe->pipe = MSM_PIPE_3D0;
> +
> +	/* Note that kernels prior to v4.15 did not support submitqueues.
> +	 * Mesa maintains support for older kernels, but IGT does not need
> +	 * to.
> +	 */
> +	do_ioctl(dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_NEW, &req);
> +
> +	pipe->submitqueue_id = req.id;
> +
> +	return pipe;
> +}
> +
> +/**
> + * igt_msm_pipe_close:
> + * @pipe: the pipe to close
> + *
> + * Close a pipe
> + */
> +void
> +igt_msm_pipe_close(struct msm_pipe *pipe)
> +{
> +	if (!pipe)
> +		return;
> +	do_ioctl(pipe->dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE, &pipe->submitqueue_id);
> +	free(pipe);
> +}
> diff --git a/lib/igt_msm.h b/lib/igt_msm.h
> new file mode 100644
> index 00000000..99a099c1
> --- /dev/null
> +++ b/lib/igt_msm.h
> @@ -0,0 +1,142 @@
> +/*
> + * Copyright © 2021 Google, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#ifndef IGT_MSM_H
> +#define IGT_MSM_H
> +
> +#include "msm_drm.h"
> +
> +/**
> + * msm_device:
> + * @fd: the drm device file descriptor
> + * @gen: the device major generation (ie. 2 for a2xx, etc)
> + *
> + * Helper container for device and device related parameters used by tests.
> + */
> +struct msm_device {
> +	int fd;
> +	unsigned gen;
> +};
> +
> +struct msm_device *igt_msm_dev_open(void);
> +void igt_msm_dev_close(struct msm_device *dev);
> +
> +/**
> + * msm_bo:
> + * @dev: the device the BO is allocated from
> + * @handle: the BO's GEM handle
> + * @size: the BO's size
> + * @map: the BO's memory mapping (if mapped)
> + *
> + * Helper wrapper for a GEM buffer object.
> + */
> +struct msm_bo {
> +	struct msm_device *dev;
> +	int handle;
> +	uint32_t size;
> +	void *map;
> +};
> +
> +struct msm_bo *igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags);
> +void igt_msm_bo_free(struct msm_bo *bo);
> +void *igt_msm_bo_map(struct msm_bo *bo);
> +
> +/**
> + * msm_pipe:
> + * @dev: the device the pipe is allocated from
> + * @pipe: the pipe id
> + * @submitqueue_id: the submitqueue id
> + *
> + * Helper wrapper for a submitqueue for cmdstream submission.
> + */
> +struct msm_pipe {
> +	struct msm_device *dev;
> +	uint32_t pipe;
> +	uint32_t submitqueue_id;
> +};
> +
> +struct msm_pipe *igt_msm_pipe_open(struct msm_device *dev, uint32_t prio);
> +void igt_msm_pipe_close(struct msm_pipe *pipe);
> +
> +/*
> + * Helpers for cmdstream building:
> + */
> +
> +enum adreno_pm4_packet_type {
> +	CP_TYPE0_PKT = 0,
> +	CP_TYPE1_PKT = 0x40000000,
> +	CP_TYPE2_PKT = 0x80000000,
> +	CP_TYPE3_PKT = 0xc0000000,
> +	CP_TYPE4_PKT = 0x40000000,
> +	CP_TYPE7_PKT = 0x70000000,
> +};
> +
> +enum adreno_pm4_type3_packets {
> +	CP_NOP = 16,
> +};
> +
> +static inline unsigned
> +pm4_odd_parity_bit(unsigned val)
> +{
> +	/* See: http://graphics.stanford.edu/~seander/bithacks.html#ParityParallel
> +	 * note that we want odd parity so 0x6996 is inverted.
> +	 */
> +	val ^= val >> 16;
> +	val ^= val >> 8;
> +	val ^= val >> 4;
> +	val &= 0xf;
> +	return (~0x6996 >> val) & 1;
> +}
> +
> +static inline uint32_t
> +pm4_pkt0_hdr(uint16_t regindx, uint16_t cnt)
> +{
> +	return CP_TYPE0_PKT | ((cnt - 1) << 16) | (regindx & 0x7fff);
> +}
> +
> +static inline uint32_t
> +pm4_pkt3_hdr(uint8_t opcode, uint16_t cnt)
> +{
> +	return CP_TYPE3_PKT | ((cnt - 1) << 16) | ((opcode & 0xff) << 8);
> +}
> +
> +static inline uint32_t
> +pm4_pkt4_hdr(uint16_t regindx, uint16_t cnt)
> +{
> +	return CP_TYPE4_PKT | cnt | (pm4_odd_parity_bit(cnt) << 7) |
> +			((regindx & 0x3ffff) << 8) |
> +			((pm4_odd_parity_bit(regindx) << 27));
> +}
> +
> +static inline uint32_t
> +pm4_pkt7_hdr(uint8_t opcode, uint16_t cnt)
> +{
> +	return CP_TYPE7_PKT | cnt | (pm4_odd_parity_bit(cnt) << 15) |
> +			((opcode & 0x7f) << 16) |
> +			((pm4_odd_parity_bit(opcode) << 23));
> +}
> +
> +#define U642VOID(x) ((void *)(uintptr_t)(x))
> +#define VOID2U64(x) ((uint64_t)(uintptr_t)(x))
> +
> +#endif /* IGT_MSM_H */
> diff --git a/lib/meson.build b/lib/meson.build
> index 67d40512..c3080fc8 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -82,6 +82,7 @@ lib_sources = [
>  	'igt_eld.c',
>  	'igt_infoframe.c',
>  	'veboxcopy_gen12.c',
> +	'igt_msm.c',
>  ]
>  
>  lib_deps = [
> -- 
> 2.31.1
> 

Re: [igt-dev] [PATCH igt v3 2/3] msm: Add helper library

[Petri Latvala]

On Mon, Aug 30, 2021 at 09:22:31AM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
> 
> Handle some of the boilerplate for tests.
> 
> v2: fix comment, drop unnecessary drm_open_driver_render() error
>     handling, docs fixes, drop igt_msm_pipe_get_param() (for now),
>     handle NULL in destructors
> 
> Signed-off-by: Rob Clark <robdclark@chromium.org>

Reviewed-by: Petri Latvala <petri.latvala@intel.com>

> ---
>  .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
>  lib/igt_msm.c                                 | 211 ++++++++++++++++++
>  lib/igt_msm.h                                 | 142 ++++++++++++
>  lib/meson.build                               |   1 +
>  4 files changed, 355 insertions(+)
>  create mode 100644 lib/igt_msm.c
>  create mode 100644 lib/igt_msm.h
> 
> diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> index 0f49b4a3..189597c6 100644
> --- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> +++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> @@ -34,6 +34,7 @@
>      <xi:include href="xml/igt_kms.xml"/>
>      <xi:include href="xml/igt_list.xml"/>
>      <xi:include href="xml/igt_map.xml"/>
> +    <xi:include href="xml/igt_msm.xml"/>
>      <xi:include href="xml/igt_pm.xml"/>
>      <xi:include href="xml/igt_primes.xml"/>
>      <xi:include href="xml/igt_rand.xml"/>
> diff --git a/lib/igt_msm.c b/lib/igt_msm.c
> new file mode 100644
> index 00000000..b9534164
> --- /dev/null
> +++ b/lib/igt_msm.c
> @@ -0,0 +1,211 @@
> +/*
> + * Copyright © 2021 Google, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include <assert.h>
> +#include <string.h>
> +#include <signal.h>
> +#include <errno.h>
> +#include <sys/mman.h>
> +#include <sys/types.h>
> +#include <sys/stat.h>
> +#include <sys/ioctl.h>
> +#include <fcntl.h>
> +
> +#include "drmtest.h"
> +#include "igt_aux.h"
> +#include "igt_core.h"
> +#include "igt_msm.h"
> +#include "ioctl_wrappers.h"
> +
> +/**
> + * SECTION:igt_msm
> + * @short_description: msm support library
> + * @title: msm
> + * @include: igt_msm.h
> + *
> + * This library provides various auxiliary helper functions for writing msm
> + * tests.
> + */
> +
> +static uint64_t
> +get_param(struct msm_device *dev, uint32_t pipe, uint32_t param)
> +{
> +	struct drm_msm_param req = {
> +			.pipe = pipe,
> +			.param = param,
> +	};
> +
> +	do_ioctl(dev->fd, DRM_IOCTL_MSM_GET_PARAM, &req);
> +
> +	return req.value;
> +}
> +
> +/**
> + * igt_msm_dev_open:
> + *
> + * Open the msm drm device.
> + */
> +struct msm_device *
> +igt_msm_dev_open(void)
> +{
> +	struct msm_device *dev = calloc(1, sizeof(*dev));
> +
> +	dev->fd = drm_open_driver_render(DRIVER_MSM);
> +	dev->gen = (get_param(dev, MSM_PIPE_3D0, MSM_PARAM_CHIP_ID) >> 24) & 0xff;
> +
> +	return dev;
> +}
> +
> +/**
> + * igt_msm_dev_close:
> + * @dev: the device to close
> + *
> + * Close the msm drm device.
> + */
> +void
> +igt_msm_dev_close(struct msm_device *dev)
> +{
> +	if (!dev)
> +		return;
> +	close(dev->fd);
> +	free(dev);
> +}
> +
> +/**
> + * igt_msm_bo_new:
> + * @dev: the device to allocate the BO from
> + * @size: the requested BO size in bytes
> + * @flags: bitmask of MSM_BO_x
> + *
> + * Allocate a buffer object of the requested size.
> + */
> +struct msm_bo *
> +igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags)
> +{
> +	struct msm_bo *bo = calloc(1, sizeof(*bo));
> +
> +	struct drm_msm_gem_new req = {
> +			.size = size,
> +			.flags = flags,
> +	};
> +
> +	bo->dev = dev;
> +	bo->size = size;
> +
> +	do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_NEW, &req);
> +
> +	bo->handle = req.handle;
> +
> +	return bo;
> +}
> +
> +/**
> + * igt_msm_bo_free:
> + * @bo: the BO to free
> + *
> + * Free a buffer object
> + */
> +void
> +igt_msm_bo_free(struct msm_bo *bo)
> +{
> +	if (!bo)
> +		return;
> +	if (bo->map)
> +		munmap(bo->map, bo->size);
> +	gem_close(bo->dev->fd, bo->handle);
> +	free(bo);
> +}
> +
> +/**
> + * igt_msm_bo_map:
> + * @bo: the BO to map
> + *
> + * Returns a pointer to mmap'd buffer.
> + */
> +void *
> +igt_msm_bo_map(struct msm_bo *bo)
> +{
> +	if (!bo->map) {
> +		struct drm_msm_gem_info req = {
> +				.handle = bo->handle,
> +				.info = MSM_INFO_GET_OFFSET,
> +		};
> +		void *ptr;
> +
> +		do_ioctl(bo->dev->fd, DRM_IOCTL_MSM_GEM_INFO, &req);
> +
> +		ptr = mmap(0, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,
> +				bo->dev->fd, req.value);
> +		if (ptr == MAP_FAILED)
> +			return NULL;
> +
> +		bo->map = ptr;
> +	}
> +	return bo->map;
> +}
> +
> +/**
> + * igt_msm_pipe_open:
> + * @dev: the device to create a submitqueue/pipe against
> + * @prio: the requested priority, from 0 (highest) to MSM_PARAM_PRIORITIES-1
> + *        (lowest)
> + *
> + * Allocate a pipe/submitqueue against which cmdstream may be submitted.
> + */
> +struct msm_pipe *
> +igt_msm_pipe_open(struct msm_device *dev, uint32_t prio)
> +{
> +	struct msm_pipe *pipe = calloc(1, sizeof(*pipe));
> +	struct drm_msm_submitqueue req = {
> +			.flags = 0,
> +			.prio = prio,
> +	};
> +
> +	pipe->dev = dev;
> +	pipe->pipe = MSM_PIPE_3D0;
> +
> +	/* Note that kernels prior to v4.15 did not support submitqueues.
> +	 * Mesa maintains support for older kernels, but IGT does not need
> +	 * to.
> +	 */
> +	do_ioctl(dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_NEW, &req);
> +
> +	pipe->submitqueue_id = req.id;
> +
> +	return pipe;
> +}
> +
> +/**
> + * igt_msm_pipe_close:
> + * @pipe: the pipe to close
> + *
> + * Close a pipe
> + */
> +void
> +igt_msm_pipe_close(struct msm_pipe *pipe)
> +{
> +	if (!pipe)
> +		return;
> +	do_ioctl(pipe->dev->fd, DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE, &pipe->submitqueue_id);
> +	free(pipe);
> +}
> diff --git a/lib/igt_msm.h b/lib/igt_msm.h
> new file mode 100644
> index 00000000..99a099c1
> --- /dev/null
> +++ b/lib/igt_msm.h
> @@ -0,0 +1,142 @@
> +/*
> + * Copyright © 2021 Google, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#ifndef IGT_MSM_H
> +#define IGT_MSM_H
> +
> +#include "msm_drm.h"
> +
> +/**
> + * msm_device:
> + * @fd: the drm device file descriptor
> + * @gen: the device major generation (ie. 2 for a2xx, etc)
> + *
> + * Helper container for device and device related parameters used by tests.
> + */
> +struct msm_device {
> +	int fd;
> +	unsigned gen;
> +};
> +
> +struct msm_device *igt_msm_dev_open(void);
> +void igt_msm_dev_close(struct msm_device *dev);
> +
> +/**
> + * msm_bo:
> + * @dev: the device the BO is allocated from
> + * @handle: the BO's GEM handle
> + * @size: the BO's size
> + * @map: the BO's memory mapping (if mapped)
> + *
> + * Helper wrapper for a GEM buffer object.
> + */
> +struct msm_bo {
> +	struct msm_device *dev;
> +	int handle;
> +	uint32_t size;
> +	void *map;
> +};
> +
> +struct msm_bo *igt_msm_bo_new(struct msm_device *dev, size_t size, uint32_t flags);
> +void igt_msm_bo_free(struct msm_bo *bo);
> +void *igt_msm_bo_map(struct msm_bo *bo);
> +
> +/**
> + * msm_pipe:
> + * @dev: the device the pipe is allocated from
> + * @pipe: the pipe id
> + * @submitqueue_id: the submitqueue id
> + *
> + * Helper wrapper for a submitqueue for cmdstream submission.
> + */
> +struct msm_pipe {
> +	struct msm_device *dev;
> +	uint32_t pipe;
> +	uint32_t submitqueue_id;
> +};
> +
> +struct msm_pipe *igt_msm_pipe_open(struct msm_device *dev, uint32_t prio);
> +void igt_msm_pipe_close(struct msm_pipe *pipe);
> +
> +/*
> + * Helpers for cmdstream building:
> + */
> +
> +enum adreno_pm4_packet_type {
> +	CP_TYPE0_PKT = 0,
> +	CP_TYPE1_PKT = 0x40000000,
> +	CP_TYPE2_PKT = 0x80000000,
> +	CP_TYPE3_PKT = 0xc0000000,
> +	CP_TYPE4_PKT = 0x40000000,
> +	CP_TYPE7_PKT = 0x70000000,
> +};
> +
> +enum adreno_pm4_type3_packets {
> +	CP_NOP = 16,
> +};
> +
> +static inline unsigned
> +pm4_odd_parity_bit(unsigned val)
> +{
> +	/* See: http://graphics.stanford.edu/~seander/bithacks.html#ParityParallel
> +	 * note that we want odd parity so 0x6996 is inverted.
> +	 */
> +	val ^= val >> 16;
> +	val ^= val >> 8;
> +	val ^= val >> 4;
> +	val &= 0xf;
> +	return (~0x6996 >> val) & 1;
> +}
> +
> +static inline uint32_t
> +pm4_pkt0_hdr(uint16_t regindx, uint16_t cnt)
> +{
> +	return CP_TYPE0_PKT | ((cnt - 1) << 16) | (regindx & 0x7fff);
> +}
> +
> +static inline uint32_t
> +pm4_pkt3_hdr(uint8_t opcode, uint16_t cnt)
> +{
> +	return CP_TYPE3_PKT | ((cnt - 1) << 16) | ((opcode & 0xff) << 8);
> +}
> +
> +static inline uint32_t
> +pm4_pkt4_hdr(uint16_t regindx, uint16_t cnt)
> +{
> +	return CP_TYPE4_PKT | cnt | (pm4_odd_parity_bit(cnt) << 7) |
> +			((regindx & 0x3ffff) << 8) |
> +			((pm4_odd_parity_bit(regindx) << 27));
> +}
> +
> +static inline uint32_t
> +pm4_pkt7_hdr(uint8_t opcode, uint16_t cnt)
> +{
> +	return CP_TYPE7_PKT | cnt | (pm4_odd_parity_bit(cnt) << 15) |
> +			((opcode & 0x7f) << 16) |
> +			((pm4_odd_parity_bit(opcode) << 23));
> +}
> +
> +#define U642VOID(x) ((void *)(uintptr_t)(x))
> +#define VOID2U64(x) ((uint64_t)(uintptr_t)(x))
> +
> +#endif /* IGT_MSM_H */
> diff --git a/lib/meson.build b/lib/meson.build
> index 67d40512..c3080fc8 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -82,6 +82,7 @@ lib_sources = [
>  	'igt_eld.c',
>  	'igt_infoframe.c',
>  	'veboxcopy_gen12.c',
> +	'igt_msm.c',
>  ]
>  
>  lib_deps = [
> -- 
> 2.31.1
> 

Re: [PATCH igt v3 3/3] msm: Add submit ioctl tests

[Petri Latvala]

On Mon, Aug 30, 2021 at 09:22:32AM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
> 
> Add an initial set of tests for the submit ioctl.
> 
> v2: Add NULL inits, igt_describe()
> 
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
>  tests/meson.build  |   1 +
>  tests/msm_submit.c | 194 +++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 195 insertions(+)
>  create mode 100644 tests/msm_submit.c
> 
> diff --git a/tests/meson.build b/tests/meson.build
> index 1bdfddbb..ff7c709a 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -107,6 +107,7 @@ test_progs = [
>  	'vc4_wait_seqno',
>  	'vgem_basic',
>  	'vgem_slow',
> +	'msm_submit',

Alphabetical order for this please.

When more msm-specific tests start appearing, consider an msm
subdirectory. Not needed for now.


Acked-by: Petri Latvala <petri.latvala@intel.com>



>  ]
>  
>  i915_progs = [
> diff --git a/tests/msm_submit.c b/tests/msm_submit.c
> new file mode 100644
> index 00000000..95f8318f
> --- /dev/null
> +++ b/tests/msm_submit.c
> @@ -0,0 +1,194 @@
> +/*
> + * Copyright © 2021 Google, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "igt_msm.h"
> +
> +igt_main
> +{
> +	struct msm_device *dev = NULL;
> +	struct msm_pipe *pipe = NULL;
> +	struct msm_bo *a = NULL, *b = NULL;
> +
> +	igt_fixture {
> +		dev = igt_msm_dev_open();
> +		pipe = igt_msm_pipe_open(dev, 0);
> +		a = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
> +		b = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
> +	}
> +
> +	igt_describe("Check that a valid empty submit succeeds");
> +	igt_subtest("empty-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +		};
> +		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
> +	}
> +
> +	igt_describe("Check that submit with invalid submitqueue id fails");
> +	igt_subtest("invalid-queue-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = 0x1234,
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, ENOENT);
> +	}
> +
> +	igt_describe("Check that submit with invalid flags fails");
> +	igt_subtest("invalid-flags-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = 0x1234,
> +				.queueid = pipe->submitqueue_id,
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with invalid in-fence fd fails");
> +	igt_subtest("invalid-in-fence-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe | MSM_SUBMIT_FENCE_FD_IN,
> +				.queueid = pipe->submitqueue_id,
> +				.fence_fd = dev->fd,  /* This is not a fence fd! */
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with duplicate bo fails");
> +	igt_subtest("invalid-duplicate-bo-submit") {
> +		struct drm_msm_gem_submit_bo bos[] = {
> +			[0] = {
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +			[1] = {
> +				.handle     = b->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +			[2] = {
> +				/* this is invalid.. there should not be two entries
> +				 * for the same bo, instead a single entry w/ all
> +				 * usage flags OR'd together should be used.  Kernel
> +				 * should catch this, and return an error code after
> +				 * cleaning up properly (not leaking any bo's)
> +				 */
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_WRITE,
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_bos  = ARRAY_SIZE(bos),
> +				.bos     = VOID2U64(bos),
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with cmdstream referencing an invalid bo fails");
> +	igt_subtest("invalid-cmd-idx-submit") {
> +		struct drm_msm_gem_submit_cmd cmds[] = {
> +			[0] = {
> +				.type       = MSM_SUBMIT_CMD_BUF,
> +				.submit_idx = 0,      /* bos[0] does not exist */
> +				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_cmds    = ARRAY_SIZE(cmds),
> +				.cmds       = VOID2U64(cmds),
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with invalid cmdstream type fails");
> +	igt_subtest("invalid-cmd-type-submit") {
> +		struct drm_msm_gem_submit_bo bos[] = {
> +			[0] = {
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +		};
> +		struct drm_msm_gem_submit_cmd cmds[] = {
> +			[0] = {
> +				.type       = 0x1234,
> +				.submit_idx = 0,
> +				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_cmds    = ARRAY_SIZE(cmds),
> +				.cmds       = VOID2U64(cmds),
> +				.nr_bos  = ARRAY_SIZE(bos),
> +				.bos     = VOID2U64(bos),
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that a valid non-empty submit succeeds");
> +	igt_subtest("valid-submit") {
> +		struct drm_msm_gem_submit_bo bos[] = {
> +			[0] = {
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +		};
> +		struct drm_msm_gem_submit_cmd cmds[] = {
> +			[0] = {
> +				.type       = MSM_SUBMIT_CMD_BUF,
> +				.submit_idx = 0,
> +				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_cmds    = ARRAY_SIZE(cmds),
> +				.cmds       = VOID2U64(cmds),
> +				.nr_bos  = ARRAY_SIZE(bos),
> +				.bos     = VOID2U64(bos),
> +		};
> +		uint32_t *cmdstream = igt_msm_bo_map(a);
> +		if (dev->gen >= 5) {
> +			*(cmdstream++) = pm4_pkt7_hdr(CP_NOP, 3);
> +		} else {
> +			*(cmdstream++) = pm4_pkt3_hdr(CP_NOP, 3);
> +		}
> +		*(cmdstream++) = 0;
> +		*(cmdstream++) = 0;
> +		*(cmdstream++) = 0;
> +
> +		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
> +	}
> +
> +	igt_fixture {
> +		igt_msm_bo_free(a);
> +		igt_msm_bo_free(b);
> +		igt_msm_pipe_close(pipe);
> +		igt_msm_dev_close(dev);
> +	}
> +}
> -- 
> 2.31.1
> 

Re: [igt-dev] [PATCH igt v3 3/3] msm: Add submit ioctl tests

[Petri Latvala]

On Mon, Aug 30, 2021 at 09:22:32AM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
> 
> Add an initial set of tests for the submit ioctl.
> 
> v2: Add NULL inits, igt_describe()
> 
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
>  tests/meson.build  |   1 +
>  tests/msm_submit.c | 194 +++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 195 insertions(+)
>  create mode 100644 tests/msm_submit.c
> 
> diff --git a/tests/meson.build b/tests/meson.build
> index 1bdfddbb..ff7c709a 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -107,6 +107,7 @@ test_progs = [
>  	'vc4_wait_seqno',
>  	'vgem_basic',
>  	'vgem_slow',
> +	'msm_submit',

Alphabetical order for this please.

When more msm-specific tests start appearing, consider an msm
subdirectory. Not needed for now.


Acked-by: Petri Latvala <petri.latvala@intel.com>



>  ]
>  
>  i915_progs = [
> diff --git a/tests/msm_submit.c b/tests/msm_submit.c
> new file mode 100644
> index 00000000..95f8318f
> --- /dev/null
> +++ b/tests/msm_submit.c
> @@ -0,0 +1,194 @@
> +/*
> + * Copyright © 2021 Google, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "igt_msm.h"
> +
> +igt_main
> +{
> +	struct msm_device *dev = NULL;
> +	struct msm_pipe *pipe = NULL;
> +	struct msm_bo *a = NULL, *b = NULL;
> +
> +	igt_fixture {
> +		dev = igt_msm_dev_open();
> +		pipe = igt_msm_pipe_open(dev, 0);
> +		a = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
> +		b = igt_msm_bo_new(dev, 0x1000, MSM_BO_WC);
> +	}
> +
> +	igt_describe("Check that a valid empty submit succeeds");
> +	igt_subtest("empty-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +		};
> +		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
> +	}
> +
> +	igt_describe("Check that submit with invalid submitqueue id fails");
> +	igt_subtest("invalid-queue-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = 0x1234,
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, ENOENT);
> +	}
> +
> +	igt_describe("Check that submit with invalid flags fails");
> +	igt_subtest("invalid-flags-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = 0x1234,
> +				.queueid = pipe->submitqueue_id,
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with invalid in-fence fd fails");
> +	igt_subtest("invalid-in-fence-submit") {
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe | MSM_SUBMIT_FENCE_FD_IN,
> +				.queueid = pipe->submitqueue_id,
> +				.fence_fd = dev->fd,  /* This is not a fence fd! */
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with duplicate bo fails");
> +	igt_subtest("invalid-duplicate-bo-submit") {
> +		struct drm_msm_gem_submit_bo bos[] = {
> +			[0] = {
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +			[1] = {
> +				.handle     = b->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +			[2] = {
> +				/* this is invalid.. there should not be two entries
> +				 * for the same bo, instead a single entry w/ all
> +				 * usage flags OR'd together should be used.  Kernel
> +				 * should catch this, and return an error code after
> +				 * cleaning up properly (not leaking any bo's)
> +				 */
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_WRITE,
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_bos  = ARRAY_SIZE(bos),
> +				.bos     = VOID2U64(bos),
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with cmdstream referencing an invalid bo fails");
> +	igt_subtest("invalid-cmd-idx-submit") {
> +		struct drm_msm_gem_submit_cmd cmds[] = {
> +			[0] = {
> +				.type       = MSM_SUBMIT_CMD_BUF,
> +				.submit_idx = 0,      /* bos[0] does not exist */
> +				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_cmds    = ARRAY_SIZE(cmds),
> +				.cmds       = VOID2U64(cmds),
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that submit with invalid cmdstream type fails");
> +	igt_subtest("invalid-cmd-type-submit") {
> +		struct drm_msm_gem_submit_bo bos[] = {
> +			[0] = {
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +		};
> +		struct drm_msm_gem_submit_cmd cmds[] = {
> +			[0] = {
> +				.type       = 0x1234,
> +				.submit_idx = 0,
> +				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_cmds    = ARRAY_SIZE(cmds),
> +				.cmds       = VOID2U64(cmds),
> +				.nr_bos  = ARRAY_SIZE(bos),
> +				.bos     = VOID2U64(bos),
> +		};
> +		do_ioctl_err(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req, EINVAL);
> +	}
> +
> +	igt_describe("Check that a valid non-empty submit succeeds");
> +	igt_subtest("valid-submit") {
> +		struct drm_msm_gem_submit_bo bos[] = {
> +			[0] = {
> +				.handle     = a->handle,
> +				.flags      = MSM_SUBMIT_BO_READ,
> +			},
> +		};
> +		struct drm_msm_gem_submit_cmd cmds[] = {
> +			[0] = {
> +				.type       = MSM_SUBMIT_CMD_BUF,
> +				.submit_idx = 0,
> +				.size       = 4 * 4,  /* 4 dwords in cmdbuf */
> +			},
> +		};
> +		struct drm_msm_gem_submit req = {
> +				.flags   = pipe->pipe,
> +				.queueid = pipe->submitqueue_id,
> +				.nr_cmds    = ARRAY_SIZE(cmds),
> +				.cmds       = VOID2U64(cmds),
> +				.nr_bos  = ARRAY_SIZE(bos),
> +				.bos     = VOID2U64(bos),
> +		};
> +		uint32_t *cmdstream = igt_msm_bo_map(a);
> +		if (dev->gen >= 5) {
> +			*(cmdstream++) = pm4_pkt7_hdr(CP_NOP, 3);
> +		} else {
> +			*(cmdstream++) = pm4_pkt3_hdr(CP_NOP, 3);
> +		}
> +		*(cmdstream++) = 0;
> +		*(cmdstream++) = 0;
> +		*(cmdstream++) = 0;
> +
> +		do_ioctl(dev->fd, DRM_IOCTL_MSM_GEM_SUBMIT, &req);
> +	}
> +
> +	igt_fixture {
> +		igt_msm_bo_free(a);
> +		igt_msm_bo_free(b);
> +		igt_msm_pipe_close(pipe);
> +		igt_msm_dev_close(dev);
> +	}
> +}
> -- 
> 2.31.1
> 

[igt-dev] ✓ Fi.CI.BAT: success for Initial igt tests for drm/msm ioctls (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2990 bytes --]

== Series Details ==

Series: Initial igt tests for drm/msm ioctls (rev3)
URL   : https://patchwork.freedesktop.org/series/93973/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10536 -> IGTPW_6173
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

Known issues
------------

  Here are the changes found in IGTPW_6173 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-snb-2600:        NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - fi-tgl-1115g4:      [PASS][2] -> [FAIL][3] ([i915#4048])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-tgl-1115g4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-tgl-1115g4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - fi-snb-2600:        [INCOMPLETE][4] ([i915#3921]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4048]: https://gitlab.freedesktop.org/drm/intel/issues/4048


Participating hosts (44 -> 34)
------------------------------

  Missing    (10): fi-ilk-m540 fi-rkl-guc bat-adls-5 bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-bdw-samus bat-jsl-1 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6191 -> IGTPW_6173

  CI-20190529: 20190529
  CI_DRM_10536: b6d834a72c14ca22b2df32a607c1ee36e8629f1a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6173: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html
  IGT_6191: e9292b533691784f46eeb9bae522ca7a8710c920 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git



== Testlist changes ==

+igt@msm_submit@empty-submit
+igt@msm_submit@invalid-cmd-idx-submit
+igt@msm_submit@invalid-cmd-type-submit
+igt@msm_submit@invalid-duplicate-bo-submit
+igt@msm_submit@invalid-flags-submit
+igt@msm_submit@invalid-in-fence-submit
+igt@msm_submit@invalid-queue-submit
+igt@msm_submit@valid-submit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

[-- Attachment #2: Type: text/html, Size: 3630 bytes --]

Re: [igt-dev] ✗ Fi.CI.BAT: failure for Initial igt tests for drm/msm ioctls (rev3)

[Vudum, Lakshminarayana]

Filed a new issue https://gitlab.freedesktop.org/drm/intel/-/issues/4048 and re-reproted.
igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c - fail - Failed assertion: igt_ioctl(.*), Last errno: 22, Invalid argument, error: -1 != 0

Thanks,
Lakshmi.

-----Original Message-----
From: Latvala, Petri <petri.latvala@intel.com> 
Sent: Monday, August 30, 2021 11:06 PM
To: igt-dev@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Cc: Rob Clark <robdclark@gmail.com>
Subject: Re: [igt-dev] ✗ Fi.CI.BAT: failure for Initial igt tests for drm/msm ioctls (rev3)

On Mon, Aug 30, 2021 at 05:04:53PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: Initial igt tests for drm/msm ioctls (rev3)
> URL   : https://patchwork.freedesktop.org/series/93973/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10536 -> IGTPW_6173 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with IGTPW_6173 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in IGTPW_6173, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in IGTPW_6173:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
>     - fi-tgl-1115g4:      [PASS][1] -> [FAIL][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-tgl-1115g4/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-tgl-1115g4/igt@
> kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html


Lakshmi, false positive here.


--
Petri Latvala



> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in IGTPW_6173 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
>     - fi-snb-2600:        NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@i915_selftest@live@hangcheck:
>     - fi-snb-2600:        [INCOMPLETE][4] ([i915#3921]) -> [PASS][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
>   [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
> 
> 
> Participating hosts (44 -> 34)
> ------------------------------
> 
>   Missing    (10): fi-ilk-m540 fi-rkl-guc bat-adls-5 bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-bdw-samus bat-jsl-1 
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * IGT: IGT_6191 -> IGTPW_6173
> 
>   CI-20190529: 20190529
>   CI_DRM_10536: b6d834a72c14ca22b2df32a607c1ee36e8629f1a @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_6173: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html
>   IGT_6191: e9292b533691784f46eeb9bae522ca7a8710c920 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> 
> 
> 
> == Testlist changes ==
> 
> +igt@msm_submit@empty-submit
> +igt@msm_submit@invalid-cmd-idx-submit
> +igt@msm_submit@invalid-cmd-type-submit
> +igt@msm_submit@invalid-duplicate-bo-submit
> +igt@msm_submit@invalid-flags-submit
> +igt@msm_submit@invalid-in-fence-submit
> +igt@msm_submit@invalid-queue-submit
> +igt@msm_submit@valid-submit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

[igt-dev] ✓ Fi.CI.IGT: success for Initial igt tests for drm/msm ioctls (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30261 bytes --]

== Series Details ==

Series: Initial igt tests for drm/msm ioctls (rev3)
URL   : https://patchwork.freedesktop.org/series/93973/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10536_full -> IGTPW_6173_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

New tests
---------

  New tests have been introduced between CI_DRM_10536_full and IGTPW_6173_full:

### New IGT tests (8) ###

  * igt@msm_submit@empty-submit:
    - Statuses : 6 skip(s)
    - Exec time: [0.0] s

  * igt@msm_submit@invalid-cmd-idx-submit:
    - Statuses : 5 skip(s)
    - Exec time: [0.0] s

  * igt@msm_submit@invalid-cmd-type-submit:
    - Statuses : 4 skip(s)
    - Exec time: [0.0] s

  * igt@msm_submit@invalid-duplicate-bo-submit:
    - Statuses : 5 skip(s)
    - Exec time: [0.0] s

  * igt@msm_submit@invalid-flags-submit:
    - Statuses : 5 skip(s)
    - Exec time: [0.0] s

  * igt@msm_submit@invalid-in-fence-submit:
    - Statuses : 6 skip(s)
    - Exec time: [0.0] s

  * igt@msm_submit@invalid-queue-submit:
    - Statuses : 4 skip(s)
    - Exec time: [0.0] s

  * igt@msm_submit@valid-submit:
    - Statuses : 5 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in IGTPW_6173_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-massive:
    - shard-snb:          NOTRUN -> [DMESG-WARN][1] ([i915#3002])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-snb5/igt@gem_create@create-massive.html

  * igt@gem_ctx_persistence@legacy-engines-persistence:
    - shard-snb:          NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) +2 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-snb6/igt@gem_ctx_persistence@legacy-engines-persistence.html

  * igt@gem_exec_endless@dispatch@rcs0:
    - shard-iclb:         [PASS][3] -> [INCOMPLETE][4] ([i915#3778])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-iclb8/igt@gem_exec_endless@dispatch@rcs0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb4/igt@gem_exec_endless@dispatch@rcs0.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][5] ([i915#2842])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk1/igt@gem_exec_fair@basic-none-rrul@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-kbl:          [PASS][6] -> [SKIP][7] ([fdo#109271])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-kbl3/igt@gem_exec_fair@basic-none-share@rcs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl6/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [PASS][8] -> [FAIL][9] ([i915#2842])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-glk6/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-tglb:         [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs0.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb7/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][12] ([i915#2842])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_params@secure-non-root:
    - shard-tglb:         NOTRUN -> [SKIP][13] ([fdo#112283]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb3/igt@gem_exec_params@secure-non-root.html

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
    - shard-iclb:         [PASS][14] -> [FAIL][15] ([i915#2428]) +1 similar issue
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-iclb8/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-odd.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-snb:          NOTRUN -> [WARN][16] ([i915#2658])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-snb2/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_softpin@evict-snoop:
    - shard-iclb:         NOTRUN -> [SKIP][17] ([fdo#109312])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb2/igt@gem_softpin@evict-snoop.html
    - shard-tglb:         NOTRUN -> [SKIP][18] ([fdo#109312])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@gem_softpin@evict-snoop.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-glk:          NOTRUN -> [FAIL][19] ([i915#3318])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk7/igt@gem_userptr_blits@vma-merge.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-snb:          NOTRUN -> [SKIP][20] ([fdo#109271]) +365 similar issues
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-snb7/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-iclb:         NOTRUN -> [SKIP][21] ([i915#2856])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb5/igt@gen9_exec_parse@unaligned-jump.html
    - shard-tglb:         NOTRUN -> [SKIP][22] ([i915#2856])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb8/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-apl:          [PASS][23] -> [DMESG-WARN][24] ([i915#180])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-apl2/igt@i915_suspend@fence-restore-untiled.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl3/igt@i915_suspend@fence-restore-untiled.html

  * igt@i915_suspend@forcewake:
    - shard-apl:          NOTRUN -> [DMESG-WARN][25] ([i915#180])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl6/igt@i915_suspend@forcewake.html

  * igt@kms_big_fb@linear-32bpp-rotate-180:
    - shard-glk:          [PASS][26] -> [DMESG-WARN][27] ([i915#118] / [i915#95]) +2 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-glk9/igt@kms_big_fb@linear-32bpp-rotate-180.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk5/igt@kms_big_fb@linear-32bpp-rotate-180.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][28] ([fdo#111614])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@kms_big_fb@linear-8bpp-rotate-270.html
    - shard-iclb:         NOTRUN -> [SKIP][29] ([fdo#110725] / [fdo#111614])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb5/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#3777]) +1 similar issue
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-glk:          [PASS][31] -> [DMESG-WARN][32] ([i915#118] / [i915#1982] / [i915#95])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-glk7/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk6/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3777]) +3 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
    - shard-glk:          NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3777]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-tglb:         NOTRUN -> [SKIP][35] ([fdo#111615]) +2 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][36] ([i915#3689] / [i915#3886]) +2 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb5/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3886]) +6 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886]) +6 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl4/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +13 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl3/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][40] ([fdo#109278] / [i915#3886]) +1 similar issue
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb8/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][41] ([i915#3689]) +4 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb3/igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-apl:          NOTRUN -> [SKIP][42] ([fdo#109271]) +231 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl1/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@plane-scaling:
    - shard-iclb:         NOTRUN -> [SKIP][43] ([i915#3742]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb6/igt@kms_cdclk@plane-scaling.html
    - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#3742]) +1 similar issue
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb3/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium@hdmi-aspect-ratio:
    - shard-glk:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +12 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk7/igt@kms_chamelium@hdmi-aspect-ratio.html

  * igt@kms_chamelium@vga-hpd-without-ddc:
    - shard-kbl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl4/igt@kms_chamelium@vga-hpd-without-ddc.html
    - shard-iclb:         NOTRUN -> [SKIP][47] ([fdo#109284] / [fdo#111827]) +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb1/igt@kms_chamelium@vga-hpd-without-ddc.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-snb:          NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +19 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-snb7/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-c-ctm-0-25:
    - shard-apl:          NOTRUN -> [SKIP][49] ([fdo#109271] / [fdo#111827]) +20 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl3/igt@kms_color_chamelium@pipe-c-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-d-ctm-limited-range:
    - shard-tglb:         NOTRUN -> [SKIP][50] ([fdo#109284] / [fdo#111827]) +6 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb3/igt@kms_color_chamelium@pipe-d-ctm-limited-range.html
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109278] / [fdo#109284] / [fdo#111827])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb6/igt@kms_color_chamelium@pipe-d-ctm-limited-range.html

  * igt@kms_content_protection@atomic:
    - shard-apl:          NOTRUN -> [TIMEOUT][52] ([i915#1319]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl1/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@content_type_change:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([fdo#111828]) +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb8/igt@kms_content_protection@content_type_change.html

  * igt@kms_content_protection@lic:
    - shard-kbl:          NOTRUN -> [TIMEOUT][54] ([i915#1319])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl4/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@type1:
    - shard-iclb:         NOTRUN -> [SKIP][55] ([fdo#109300] / [fdo#111066])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb8/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent:
    - shard-apl:          NOTRUN -> [FAIL][56] ([i915#2105])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl7/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-random:
    - shard-tglb:         NOTRUN -> [SKIP][57] ([i915#3319])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb6/igt@kms_cursor_crc@pipe-c-cursor-32x32-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-512x512-random:
    - shard-tglb:         NOTRUN -> [SKIP][58] ([fdo#109279] / [i915#3359])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-512x512-random.html
    - shard-iclb:         NOTRUN -> [SKIP][59] ([fdo#109278] / [fdo#109279])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb8/igt@kms_cursor_crc@pipe-c-cursor-512x512-random.html

  * igt@kms_cursor_crc@pipe-d-cursor-32x10-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][60] ([i915#3359]) +4 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-32x10-onscreen.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +16 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
    - shard-iclb:         NOTRUN -> [SKIP][62] ([fdo#109274] / [fdo#109278])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html

  * igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
    - shard-glk:          [PASS][63] -> [DMESG-FAIL][64] ([i915#118] / [i915#1888] / [i915#95])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk8/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html

  * igt@kms_dsc@basic-dsc-enable@edp-1-pipe-c:
    - shard-iclb:         NOTRUN -> [DMESG-WARN][65] ([i915#1226]) +2 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb2/igt@kms_dsc@basic-dsc-enable@edp-1-pipe-c.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [PASS][66] -> [INCOMPLETE][67] ([i915#155] / [i915#180] / [i915#636])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-plain-flip:
    - shard-iclb:         NOTRUN -> [SKIP][68] ([fdo#109274])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb1/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-kbl:          [PASS][69] -> [INCOMPLETE][70] ([i915#636])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-kbl4/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl4/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
    - shard-kbl:          NOTRUN -> [SKIP][71] ([fdo#109271]) +107 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt:
    - shard-iclb:         NOTRUN -> [SKIP][72] ([fdo#109280]) +9 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu:
    - shard-glk:          NOTRUN -> [SKIP][73] ([fdo#109271]) +143 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk3/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu.html

  * igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
    - shard-tglb:         NOTRUN -> [SKIP][74] ([fdo#109289])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html
    - shard-iclb:         NOTRUN -> [SKIP][75] ([fdo#109289])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb2/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-glk:          NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#533])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk3/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
    - shard-kbl:          [PASS][77] -> [DMESG-WARN][78] ([i915#180]) +9 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][79] ([fdo#108145] / [i915#265]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-glk:          NOTRUN -> [FAIL][80] ([fdo#108145] / [i915#265])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
    - shard-kbl:          NOTRUN -> [FAIL][81] ([i915#265])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html

  * igt@kms_plane_lowres@pipe-b-tiling-yf:
    - shard-tglb:         NOTRUN -> [SKIP][82] ([fdo#112054])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb7/igt@kms_plane_lowres@pipe-b-tiling-yf.html
    - shard-iclb:         NOTRUN -> [SKIP][83] ([i915#3536])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb2/igt@kms_plane_lowres@pipe-b-tiling-yf.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#658]) +3 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
    - shard-tglb:         NOTRUN -> [SKIP][85] ([i915#2920]) +1 similar issue
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
    - shard-iclb:         NOTRUN -> [SKIP][86] ([i915#658])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb4/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area-1:
    - shard-kbl:          NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#658]) +2 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl1/igt@kms_psr2_sf@plane-move-sf-dmg-area-1.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-glk:          NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#658]) +3 similar issues
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@kms_psr@psr2_basic:
    - shard-tglb:         NOTRUN -> [FAIL][89] ([i915#132] / [i915#3467])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@kms_psr@psr2_basic.html
    - shard-iclb:         NOTRUN -> [SKIP][90] ([fdo#109441])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb8/igt@kms_psr@psr2_basic.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [PASS][91] -> [SKIP][92] ([fdo#109441]) +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb5/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_vblank@pipe-a-query-forked-busy-hang:
    - shard-snb:          [PASS][93] -> [SKIP][94] ([fdo#109271])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-snb7/igt@kms_vblank@pipe-a-query-forked-busy-hang.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-snb7/igt@kms_vblank@pipe-a-query-forked-busy-hang.html

  * igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm:
    - shard-iclb:         NOTRUN -> [SKIP][95] ([fdo#109278]) +13 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb7/igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-apl:          NOTRUN -> [SKIP][96] ([fdo#109271] / [i915#2437])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl2/igt@kms_writeback@writeback-pixel-formats.html

  * {igt@msm_submit@invalid-in-fence-submit} (NEW):
    - shard-tglb:         NOTRUN -> [SKIP][97] ([fdo#109315] / [i915#2575]) +7 similar issues
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@msm_submit@invalid-in-fence-submit.html

  * {igt@msm_submit@valid-submit} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][98] ([fdo#109315]) +7 similar issues
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb6/igt@msm_submit@valid-submit.html

  * igt@nouveau_crc@pipe-a-source-rg:
    - shard-iclb:         NOTRUN -> [SKIP][99] ([i915#2530]) +1 similar issue
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb8/igt@nouveau_crc@pipe-a-source-rg.html

  * igt@nouveau_crc@pipe-c-source-outp-complete:
    - shard-tglb:         NOTRUN -> [SKIP][100] ([i915#2530]) +1 similar issue
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb1/igt@nouveau_crc@pipe-c-source-outp-complete.html

  * igt@perf_pmu@event-wait@rcs0:
    - shard-iclb:         NOTRUN -> [SKIP][101] ([fdo#112283]) +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb4/igt@perf_pmu@event-wait@rcs0.html

  * igt@perf_pmu@rc6-suspend:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][102] ([i915#180])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl7/igt@perf_pmu@rc6-suspend.html

  * igt@prime_nv_pcopy@test1_micro:
    - shard-tglb:         NOTRUN -> [SKIP][103] ([fdo#109291]) +1 similar issue
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb6/igt@prime_nv_pcopy@test1_micro.html
    - shard-iclb:         NOTRUN -> [SKIP][104] ([fdo#109291])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb1/igt@prime_nv_pcopy@test1_micro.html

  * igt@sysfs_clients@busy:
    - shard-glk:          NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#2994])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk5/igt@sysfs_clients@busy.html

  * igt@sysfs_clients@fair-0:
    - shard-apl:          NOTRUN -> [SKIP][106] ([fdo#109271] / [i915#2994]) +1 similar issue
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl2/igt@sysfs_clients@fair-0.html

  * igt@sysfs_clients@recycle:
    - shard-kbl:          NOTRUN -> [SKIP][107] ([fdo#109271] / [i915#2994])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl4/igt@sysfs_clients@recycle.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
    - shard-kbl:          [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +3 similar issues
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-kbl7/igt@gem_ctx_isolation@preservation-s3@bcs0.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@bcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [FAIL][110] ([i915#2842]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@rcs0:
    - shard-kbl:          [FAIL][112] ([i915#2842]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-kbl7/igt@gem_exec_fair@basic-none@rcs0.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl3/igt@gem_exec_fair@basic-none@rcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
    - shard-iclb:         [FAIL][114] ([i915#2842]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-iclb3/igt@gem_exec_fair@basic-pace@bcs0.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb2/igt@gem_exec_fair@basic-pace@bcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-glk:          [FAIL][116] ([i915#2842]) -> [PASS][117] +3 similar issues
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-glk3/igt@gem_exec_fair@basic-throttle@rcs0.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk4/igt@gem_exec_fair@basic-throttle@rcs0.html
    - shard-iclb:         [FAIL][118] ([i915#2849]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-iclb3/igt@gem_exec_fair@basic-throttle@rcs0.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-apl:          [SKIP][120] ([fdo#109271]) -> [PASS][121]
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-apl6/igt@i915_pm_dc@dc9-dpms.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl8/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_selftest@live@gt_heartbeat:
    - shard-tglb:         [DMESG-FAIL][122] ([i915#2291] / [i915#541]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-tglb2/igt@i915_selftest@live@gt_heartbeat.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-tglb2/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_cursor_crc@pipe-b-cursor-size-change:
    - shard-snb:          [FAIL][124] ([i915#4024]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-snb5/igt@kms_cursor_crc@pipe-b-cursor-size-change.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-snb6/igt@kms_cursor_crc@pipe-b-cursor-size-change.html
    - shard-apl:          [FAIL][126] ([i915#3444]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-size-change.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-apl1/igt@kms_cursor_crc@pipe-b-cursor-size-change.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-kbl:          [INCOMPLETE][128] ([i915#155]) -> [PASS][129]
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-glk:          [FAIL][130] ([i915#72]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][132] ([i915#2122]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/shard-glk4/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][134] ([fdo#109441]) -> [PASS][135] +2 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10536/shard-iclb3/igt@kms_psr@psr2_primary_mmap_cpu.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6173/index.html

[-- Attachment #2: Type: text/html, Size: 33970 bytes --]

Re: [PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Rob Clark]

On Mon, Aug 30, 2021 at 9:18 AM Rob Clark <robdclark@gmail.com> wrote:
>
> From: Rob Clark <robdclark@chromium.org>
>
> Add an initial set of tests for the gpu SUBMIT ioctl.  There is
> plenty more we can add, but need to start somewhere.
>
> Rob Clark (3):
>   drmtest: Add DRIVER_MSM support
>   msm: Add helper library
>   msm: Add submit ioctl tests

If there are no more comments on this series, could somebody push it?

BR,
-R

>  .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
>  lib/drmtest.c                                 |   3 +
>  lib/drmtest.h                                 |   1 +
>  lib/igt_msm.c                                 | 211 ++++++++++++++++++
>  lib/igt_msm.h                                 | 142 ++++++++++++
>  lib/meson.build                               |   1 +
>  tests/meson.build                             |   1 +
>  tests/msm_submit.c                            | 194 ++++++++++++++++
>  8 files changed, 554 insertions(+)
>  create mode 100644 lib/igt_msm.c
>  create mode 100644 lib/igt_msm.h
>  create mode 100644 tests/msm_submit.c
>
> --
> 2.31.1
>

Re: [igt-dev] [PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Rob Clark]

On Mon, Aug 30, 2021 at 9:18 AM Rob Clark <robdclark@gmail.com> wrote:
>
> From: Rob Clark <robdclark@chromium.org>
>
> Add an initial set of tests for the gpu SUBMIT ioctl.  There is
> plenty more we can add, but need to start somewhere.
>
> Rob Clark (3):
>   drmtest: Add DRIVER_MSM support
>   msm: Add helper library
>   msm: Add submit ioctl tests

If there are no more comments on this series, could somebody push it?

BR,
-R

>  .../igt-gpu-tools/igt-gpu-tools-docs.xml      |   1 +
>  lib/drmtest.c                                 |   3 +
>  lib/drmtest.h                                 |   1 +
>  lib/igt_msm.c                                 | 211 ++++++++++++++++++
>  lib/igt_msm.h                                 | 142 ++++++++++++
>  lib/meson.build                               |   1 +
>  tests/meson.build                             |   1 +
>  tests/msm_submit.c                            | 194 ++++++++++++++++
>  8 files changed, 554 insertions(+)
>  create mode 100644 lib/igt_msm.c
>  create mode 100644 lib/igt_msm.h
>  create mode 100644 tests/msm_submit.c
>
> --
> 2.31.1
>

Re: [PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Petri Latvala]

On Wed, Sep 08, 2021 at 11:02:42AM -0700, Rob Clark wrote:
> On Mon, Aug 30, 2021 at 9:18 AM Rob Clark <robdclark@gmail.com> wrote:
> >
> > From: Rob Clark <robdclark@chromium.org>
> >
> > Add an initial set of tests for the gpu SUBMIT ioctl.  There is
> > plenty more we can add, but need to start somewhere.
> >
> > Rob Clark (3):
> >   drmtest: Add DRIVER_MSM support
> >   msm: Add helper library
> >   msm: Add submit ioctl tests
> 
> If there are no more comments on this series, could somebody push it?

Ah, I was expecting you to do it yourself. Merged now.


-- 
Petri Latvala

Re: [igt-dev] [PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Petri Latvala]

On Wed, Sep 08, 2021 at 11:02:42AM -0700, Rob Clark wrote:
> On Mon, Aug 30, 2021 at 9:18 AM Rob Clark <robdclark@gmail.com> wrote:
> >
> > From: Rob Clark <robdclark@chromium.org>
> >
> > Add an initial set of tests for the gpu SUBMIT ioctl.  There is
> > plenty more we can add, but need to start somewhere.
> >
> > Rob Clark (3):
> >   drmtest: Add DRIVER_MSM support
> >   msm: Add helper library
> >   msm: Add submit ioctl tests
> 
> If there are no more comments on this series, could somebody push it?

Ah, I was expecting you to do it yourself. Merged now.


-- 
Petri Latvala

Re: [PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Rob Clark]

On Wed, Sep 8, 2021 at 10:27 PM Petri Latvala <petri.latvala@intel.com> wrote:
>
> On Wed, Sep 08, 2021 at 11:02:42AM -0700, Rob Clark wrote:
> > On Mon, Aug 30, 2021 at 9:18 AM Rob Clark <robdclark@gmail.com> wrote:
> > >
> > > From: Rob Clark <robdclark@chromium.org>
> > >
> > > Add an initial set of tests for the gpu SUBMIT ioctl.  There is
> > > plenty more we can add, but need to start somewhere.
> > >
> > > Rob Clark (3):
> > >   drmtest: Add DRIVER_MSM support
> > >   msm: Add helper library
> > >   msm: Add submit ioctl tests
> >
> > If there are no more comments on this series, could somebody push it?
>
> Ah, I was expecting you to do it yourself. Merged now.
>

Thanks.. and actually now that I've checked, I realized I had
developer access to push.  Sorry, I didn't realize that before

BR,
-R

Re: [igt-dev] [PATCH igt v3 0/3] Initial igt tests for drm/msm ioctls

[Rob Clark]

On Wed, Sep 8, 2021 at 10:27 PM Petri Latvala <petri.latvala@intel.com> wrote:
>
> On Wed, Sep 08, 2021 at 11:02:42AM -0700, Rob Clark wrote:
> > On Mon, Aug 30, 2021 at 9:18 AM Rob Clark <robdclark@gmail.com> wrote:
> > >
> > > From: Rob Clark <robdclark@chromium.org>
> > >
> > > Add an initial set of tests for the gpu SUBMIT ioctl.  There is
> > > plenty more we can add, but need to start somewhere.
> > >
> > > Rob Clark (3):
> > >   drmtest: Add DRIVER_MSM support
> > >   msm: Add helper library
> > >   msm: Add submit ioctl tests
> >
> > If there are no more comments on this series, could somebody push it?
>
> Ah, I was expecting you to do it yourself. Merged now.
>

Thanks.. and actually now that I've checked, I realized I had
developer access to push.  Sorry, I didn't realize that before

BR,
-R