From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BB9EC433F5 for ; Wed, 15 Sep 2021 20:34:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7E3F86113E for ; Wed, 15 Sep 2021 20:34:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231535AbhIOUf4 (ORCPT ); Wed, 15 Sep 2021 16:35:56 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:43062 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231490AbhIOUf4 (ORCPT ); Wed, 15 Sep 2021 16:35:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=I695fxV3rtoEGJmyLVEw/GhpWuvfSF9OuM8iMImSHYo=; b=5t90GtYm5tUxm8nTNSUJ3Dbw68 9E5egFeviFEI9sj4iImH6TEAR4s3fMvz6oLqF3idlbRSjY3Cv51Ca5J6DZ8SyMG2q+Z7QhgLww5lj UhdKryWxuj4rEBxMb5mLicwLF3gXuqCzzWhC+72MVhBcmoG3kZ6aMLU/Dn8FHJSBRcD4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1mQbc2-006nuf-4S; Wed, 15 Sep 2021 22:34:34 +0200 Date: Wed, 15 Sep 2021 22:34:34 +0200 From: Andrew Lunn To: Daniel Palmer Cc: DTML , Rob Herring , Marc Zyngier , Thomas Gleixner , linux-arm-kernel , Romain Perier Subject: Re: [PATCH 0/3] SigmaStar SSD20XD GPIO interrupt controller Message-ID: References: <20210914100415.1549208-1-daniel@0x0f.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, Sep 15, 2021 at 06:06:52PM +0900, Daniel Palmer wrote: > Hi Andrew, > > On Wed, 15 Sept 2021 at 00:59, Andrew Lunn wrote: > > How are the GPIOs mapped to the interrupts? Is it a simple 1:1? > > Unfortunately, no. > I wanted to add the GPIO controller part of this to this same series > but there are some patches in flight for that so it would have been > messy. > You can see that here though: > https://github.com/linux-chenxing/linux/commit/88345dc470bf07d36aa1ddab09551ed33a1cfb22 > > They've really made a mess of this. Their whole GPIO thing is a mess > with no clear logic between the pin names and the register locations > etc. > This IRQ part is no exception. IRQ 0 from this thing isn't for the pin > called GPIO0 or anything sane like that. O.K. Then it sounds like splitting GPIO and the IRQ makes sense. This is the sort of thing which is good to put in the cover letter, explaining why you decided to do it this way. Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5AE9C433F5 for ; Wed, 15 Sep 2021 20:37:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AE69160724 for ; Wed, 15 Sep 2021 20:37:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org AE69160724 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lunn.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vMFeG30u+M7pDwsGneDbBmv0zP0qW1QVvwwF4ifSKU0=; b=AOcqpJSKOKnQiV lvRY/nlhQ6antxZuJiEYS9sowpcjDY5vn6fVEtBlwbjhdp2mJkymmmja/WOhNrYgPYWuGw9cncSMQ G9dupq/xTysaN6cU0xvjB6GlOI1FCx+vBQocCrYp9FV+DNRMkxHOHCbqV/wDrMgmHyQBr5OYBXNi/ rrXpeB+kiWs9C+dlMXQMfWUM3vx4SK7EviHWI6Zhgk5GbJo21+isDSsH6swypAPYsbI2SYn9Ng8aH 2GKxliVWfRFIYC8zMJWrkZ4UJIdmuQiBNY7IGdYOmBlvSpAFZlgHqhoIvcgdg011hmWKk4farlDZ+ MzO4LqXVD15I+5AXHm6A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mQbcF-009uDa-CK; Wed, 15 Sep 2021 20:34:47 +0000 Received: from vps0.lunn.ch ([185.16.172.187]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mQbcA-009uCM-TX for linux-arm-kernel@lists.infradead.org; Wed, 15 Sep 2021 20:34:45 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=I695fxV3rtoEGJmyLVEw/GhpWuvfSF9OuM8iMImSHYo=; b=5t90GtYm5tUxm8nTNSUJ3Dbw68 9E5egFeviFEI9sj4iImH6TEAR4s3fMvz6oLqF3idlbRSjY3Cv51Ca5J6DZ8SyMG2q+Z7QhgLww5lj UhdKryWxuj4rEBxMb5mLicwLF3gXuqCzzWhC+72MVhBcmoG3kZ6aMLU/Dn8FHJSBRcD4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1mQbc2-006nuf-4S; Wed, 15 Sep 2021 22:34:34 +0200 Date: Wed, 15 Sep 2021 22:34:34 +0200 From: Andrew Lunn To: Daniel Palmer Cc: DTML , Rob Herring , Marc Zyngier , Thomas Gleixner , linux-arm-kernel , Romain Perier Subject: Re: [PATCH 0/3] SigmaStar SSD20XD GPIO interrupt controller Message-ID: References: <20210914100415.1549208-1-daniel@0x0f.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210915_133442_994105_A6557E7D X-CRM114-Status: GOOD ( 16.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 15, 2021 at 06:06:52PM +0900, Daniel Palmer wrote: > Hi Andrew, > > On Wed, 15 Sept 2021 at 00:59, Andrew Lunn wrote: > > How are the GPIOs mapped to the interrupts? Is it a simple 1:1? > > Unfortunately, no. > I wanted to add the GPIO controller part of this to this same series > but there are some patches in flight for that so it would have been > messy. > You can see that here though: > https://github.com/linux-chenxing/linux/commit/88345dc470bf07d36aa1ddab09551ed33a1cfb22 > > They've really made a mess of this. Their whole GPIO thing is a mess > with no clear logic between the pin names and the register locations > etc. > This IRQ part is no exception. IRQ 0 from this thing isn't for the pin > called GPIO0 or anything sane like that. O.K. Then it sounds like splitting GPIO and the IRQ makes sense. This is the sort of thing which is good to put in the cover letter, explaining why you decided to do it this way. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel