From: "Krzysztof Wilczyński" <kw@linux.com> To: Dongdong Liu <liudongdong3@huawei.com> Cc: helgaas@kernel.org, hch@infradead.org, logang@deltatee.com, leon@kernel.org, linux-pci@vger.kernel.org, rajur@chelsio.com, hverkuil-cisco@xs4all.nl, linux-media@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH V9 4/8] PCI/sysfs: Add a 10-Bit Tag sysfs file PCIe Endpoint devices Date: Thu, 23 Sep 2021 06:21:57 +0200 [thread overview] Message-ID: <YUwA5eC7wiDoHy0F@rocinante> (raw) In-Reply-To: <20210922133655.51811-5-liudongdong3@huawei.com> Hi, Thank you for sending the patch over! A few small comments below. [...] > +static ssize_t pci_10bit_tag_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, size_t count) > +{ > + struct pci_dev *pdev = to_pci_dev(dev); > + bool enable; Would you mind adding the following capabilities check here? if (!capable(CAP_SYS_ADMIN)) return -EPERM; This is so we make sure that whatever user is going to use this sysfs attribute actually has enough permissions to update this value safely. > + if (kstrtobool(buf, &enable) < 0) > + return -EINVAL; > + > + if (pdev->driver) > + return -EBUSY; > + > + if (enable) { > + if (!pcie_rp_10bit_tag_cmp_supported(pdev)) > + return -EPERM; Would it make sense to also verify 10-Bit Tag Completer support on the "disable" path too? We won't be able to set a value if there is no support, but nothing will stop us from clearing it regardless - unless this would be safe to do? What do you think? > + pcie_capability_set_word(pdev, PCI_EXP_DEVCTL2, > + PCI_EXP_DEVCTL2_10BIT_TAG_REQ_EN); > + } else { > + pcie_capability_clear_word(pdev, PCI_EXP_DEVCTL2, > + PCI_EXP_DEVCTL2_10BIT_TAG_REQ_EN); > + } > + > + return count; > +} [...] > +> +static umode_t pcie_dev_10bit_tag_attrs_are_visible(struct kobject *kobj, > + struct attribute *a, int n) The preferred function name for the .is_visible() callback in a case when there is only a single sysfs attribute being added would be: pcie_dev_10bit_tag_attr_is_visible() Albeit, I appreciate that you followed the existing naming pattern. Krzysztof
next prev parent reply other threads:[~2021-09-23 4:22 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-22 13:36 [PATCH V9 0/8] PCI: Enable 10-Bit tag support for PCIe devices Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 1/8] PCI: Use cached devcap in more places Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 2/8] PCI: Cache Device Capabilities 2 Register Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 3/8] PCI: Add 10-Bit Tag register definitions Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 4/8] PCI/sysfs: Add a 10-Bit Tag sysfs file PCIe Endpoint devices Dongdong Liu 2021-09-23 4:21 ` Krzysztof Wilczyński [this message] 2021-09-23 11:06 ` Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 5/8] PCI/IOV: Add 10-Bit Tag sysfs files for VF devices Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 6/8] PCI/P2PDMA: Add a 10-Bit Tag check in P2PDMA Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 7/8] PCI: Enable 10-Bit Tag support for PCIe Endpoint device Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 8/8] PCI/IOV: Enable 10-Bit Tag support for PCIe VF devices Dongdong Liu
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