From: Stafford Horne <shorne@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: alex.bennee@linaro.org, qemu-devel@nongnu.org, laurent@vivier.eu
Subject: Re: [PATCH v4 32/41] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE
Date: Thu, 7 Oct 2021 05:52:21 +0900 [thread overview]
Message-ID: <YV4Mhaa3RbPl8O3o@antec> (raw)
In-Reply-To: <20211006172307.780893-33-richard.henderson@linaro.org>
On Wed, Oct 06, 2021 at 10:22:58AM -0700, Richard Henderson wrote:
> The kernel vectors both of these through unhandled_exception, which
> results in force_sig(SIGSEGV). This isn't very useful for userland
> when enabling overflow traps or fpu traps, but c'est la vie.
Thanks for looking into it. I am happy to accept kernel patches ;), otherwise
these are now on my todo list. The FPU support is already something I am
looking to take care of as mentioned before, but that is after I finish getting
the glibc port upstreamed.
That said,
Reviewed-by: Stafford Horne <shorne@gmail.com>
> Cc: Stafford Horne <shorne@gmail.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> linux-user/openrisc/cpu_loop.c | 13 +++++--------
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c
> index f6360db47c..de5417a262 100644
> --- a/linux-user/openrisc/cpu_loop.c
> +++ b/linux-user/openrisc/cpu_loop.c
> @@ -56,13 +56,17 @@ void cpu_loop(CPUOpenRISCState *env)
> break;
> case EXCP_DPF:
> case EXCP_IPF:
> - case EXCP_RANGE:
> info.si_signo = TARGET_SIGSEGV;
> info.si_errno = 0;
> info.si_code = TARGET_SEGV_MAPERR;
> info._sifields._sigfault._addr = env->pc;
> queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
> break;
> + case EXCP_RANGE:
> + case EXCP_FPE:
> + /* ??? The kernel vectors both of these to unhandled_exception. */
> + force_sig(TARGET_SIGSEGV);
> + break;
> case EXCP_ALIGN:
> info.si_signo = TARGET_SIGBUS;
> info.si_errno = 0;
> @@ -77,13 +81,6 @@ void cpu_loop(CPUOpenRISCState *env)
> info._sifields._sigfault._addr = env->pc;
> queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
> break;
> - case EXCP_FPE:
> - info.si_signo = TARGET_SIGFPE;
> - info.si_errno = 0;
> - info.si_code = 0;
> - info._sifields._sigfault._addr = env->pc;
> - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
> - break;
> case EXCP_INTERRUPT:
> /* We processed the pending cpu work above. */
> break;
> --
> 2.25.1
>
next prev parent reply other threads:[~2021-10-06 20:53 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-06 17:22 [PATCH v4 00/41] linux-user: Streamline handling of SIGSEGV Richard Henderson
2021-10-06 17:22 ` [PATCH v4 01/41] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-10-06 17:22 ` [PATCH v4 02/41] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-10-06 17:22 ` [PATCH v4 03/41] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-10-06 17:22 ` [PATCH v4 04/41] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-10-06 17:22 ` [PATCH v4 05/41] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-10-06 17:22 ` [PATCH v4 06/41] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-10-06 17:22 ` [PATCH v4 07/41] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-10-06 17:22 ` [PATCH v4 08/41] linux-user/host/ppc: " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 09/41] linux-user/host/alpha: " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 10/41] linux-user/host/sparc: " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 11/41] linux-user/host/arm: " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 12/41] linux-user/host/aarch64: " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 13/41] linux-user/host/s390: " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 14/41] linux-user/host/mips: " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 15/41] linux-user/host/riscv: " Richard Henderson
2021-10-06 17:22 ` Richard Henderson
2021-10-06 21:33 ` Alistair Francis
2021-10-06 21:33 ` Alistair Francis
2021-10-06 17:22 ` [PATCH v4 16/41] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-10-06 17:22 ` [PATCH v4 17/41] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-10-06 17:22 ` Richard Henderson
2021-10-06 21:35 ` Alistair Francis
2021-10-06 21:35 ` Alistair Francis
2021-10-06 17:22 ` [PATCH v4 18/41] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-10-06 17:22 ` [PATCH v4 19/41] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-10-06 17:22 ` [PATCH v4 20/41] linux-user: Add cpu_loop_exit_sigsegv Richard Henderson
2021-10-06 17:22 ` [PATCH v4 21/41] target/alpha: Implement alpha_cpu_record_sigsegv Richard Henderson
2021-10-06 17:22 ` [PATCH v4 22/41] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup Richard Henderson
2021-10-06 17:22 ` [PATCH v4 23/41] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-10-06 17:22 ` [PATCH v4 24/41] target/cris: Make cris_cpu_tlb_fill sysemu only Richard Henderson
2021-10-06 17:22 ` [PATCH v4 25/41] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-10-06 17:22 ` [PATCH v4 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-10-06 17:22 ` [PATCH v4 27/41] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-10-06 17:22 ` [PATCH v4 28/41] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-10-06 17:22 ` [PATCH v4 29/41] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 30/41] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-10-06 17:22 ` [PATCH v4 31/41] target/nios2: Implement nios2_cpu_record_sigsegv Richard Henderson
2021-10-06 17:22 ` [PATCH v4 32/41] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-10-06 20:52 ` Stafford Horne [this message]
2021-10-06 17:22 ` [PATCH v4 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-10-06 17:23 ` [PATCH v4 34/41] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-10-06 17:23 ` [PATCH v4 35/41] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-10-06 17:23 ` Richard Henderson
2021-10-06 21:36 ` Alistair Francis
2021-10-06 21:36 ` Alistair Francis
2021-10-06 17:23 ` [PATCH v4 36/41] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-10-06 17:23 ` [PATCH v4 37/41] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-10-06 17:23 ` [PATCH v4 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-10-06 17:23 ` [PATCH v4 39/41] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-10-06 17:23 ` [PATCH v4 40/41] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-10-06 17:23 ` [PATCH v4 41/41] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
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