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From: Lee Jones <lee.jones@linaro.org>
To: Greg KH <gregkh@linuxfoundation.org>
Cc: "David E. Box" <david.e.box@linux.intel.com>,
	bhelgaas@google.com, andy.shevchenko@gmail.com,
	mgross@linux.intel.com, srinivas.pandruvada@intel.com,
	linux-kernel@vger.kernel.org,
	platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 2/5] MFD: intel_pmt: Support non-PMT capabilities
Date: Tue, 28 Sep 2021 11:03:13 +0100	[thread overview]
Message-ID: <YVLoYZQ1fYLeEYXt@google.com> (raw)
In-Reply-To: <YVLb/GrePEKNDdtb@kroah.com>

On Tue, 28 Sep 2021, Greg KH wrote:

> On Tue, Sep 28, 2021 at 08:54:45AM +0100, Lee Jones wrote:
> > On Mon, 27 Sep 2021, David E. Box wrote:
> > 
> > > On Mon, 2021-09-27 at 19:36 +0200, Greg KH wrote:
> > > > On Wed, Sep 22, 2021 at 02:30:04PM -0700, David E. Box wrote:
> > > > > Intel Platform Monitoring Technology (PMT) support is indicated by presence
> > > > > of an Intel defined PCIe DVSEC structure with a PMT ID. However DVSEC
> > > > > structures may also be used by Intel to indicate support for other
> > > > > capabilities unrelated to PMT.  OOBMSM is a device that can have both PMT
> > > > > and non-PMT capabilities. In order to support these capabilities it is
> > > > > necessary to modify the intel_pmt driver to handle the creation of platform
> > > > > devices more generically.
> > > > 
> > > > I said this on your other driver submission, but why are you turning a
> > > > PCIe device into a set of platform devices and craming it into the MFD
> > > > subsystem?
> > > > 
> > > > PCIe devices are NOT platform devices.
> > > 
> > > But they *are* used to create platform devices when the PCIe device is multi-functional, which is
> > > what intel_pmt is.
> > > 
> > > > 
> > > > Why not use the auxiliary bus for this thing if you have individual
> > > > drivers that need to "bind" to the different attributes that this single
> > > > PCIe device is exporting.
> > > 
> > > It wasn't clear in the beginning how this would evolve. MFD made sense for the PMT (platform
> > > monitoring technology) driver. PMT has 3 related but individually enumerable devices on the same IP,
> > > like lpss. But the same IP is now being used for other features too like SDSi. We could work on
> > > converting this to the auxiliary bus and then covert the cell drivers.
> > 
> > I see this as subsequent work.  It should not affect this submission.
> > 
> > FWIW, I still plan to review this set for inclusion into MFD.
> 
> That's fine, but as the add-on submission that builds on top of this is
> a broken mess (which is what caused me to have to review this series), I
> can't recommend that be taken yet as it needs work to prevent systems
> from doing bad things.

Understood.  Deferred.

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog

  reply	other threads:[~2021-09-28 10:03 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-22 21:30 [PATCH v3 0/5] Add general DVSEC/VSEC support David E. Box
2021-09-22 21:30 ` [PATCH v3 1/5] PCI: Add #defines for accessing PCIE DVSEC fields David E. Box
2021-09-27 17:30   ` Bjorn Helgaas
2021-09-22 21:30 ` [PATCH v3 2/5] MFD: intel_pmt: Support non-PMT capabilities David E. Box
2021-09-27 17:36   ` Greg KH
2021-09-27 18:40     ` David E. Box
2021-09-28  5:01       ` Greg KH
2021-09-28  7:54       ` Lee Jones
2021-09-28  9:10         ` Greg KH
2021-09-28 10:03           ` Lee Jones [this message]
2021-09-22 21:30 ` [PATCH v3 3/5] MFD: intel_pmt: Add support for PCIe VSEC structures David E. Box
2021-09-22 21:30 ` [PATCH v3 4/5] MFD: intel_pmt: Add DG2 support David E. Box
2021-09-22 21:30 ` [PATCH v3 5/5] MFD: intel_extended_cap: Add support for Intel SDSi David E. Box
2021-09-23  9:04 ` [PATCH v3 0/5] Add general DVSEC/VSEC support Hans de Goede
2021-09-23 15:44   ` David E. Box

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