From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23D33C433F5 for ; Tue, 28 Sep 2021 10:03:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01A5C610E5 for ; Tue, 28 Sep 2021 10:03:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240144AbhI1KFA (ORCPT ); Tue, 28 Sep 2021 06:05:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240127AbhI1KE4 (ORCPT ); Tue, 28 Sep 2021 06:04:56 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E7AE5C061765 for ; Tue, 28 Sep 2021 03:03:16 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id s24so2977254wmh.4 for ; Tue, 28 Sep 2021 03:03:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to; bh=yz7OSxKrs5tDs3iPjdQ84SnbqujRTE3B+86PcByyECI=; b=ccy5lOzpyBKsENGgU3HIS0chBhX6A/t8rSbAwK/u0Rx6pM6GJWJb+0Oubyy7wlqtpT kR7Z4v5O/T/JAUPSWWCQmkMP0SKtpsgzbjmaA6fdvlzAQjzV4FWxgSyENfxXl4IcJD4p 509+WTfEDbHXYTADcotWB6cacZbX4m/gaLI5q83CDkKWNZcCa1VSpJZYKTYCXbiAnPzh q378NkglDcDVIzPny7hgwXkw+pjtvygClmArk3YCWvKY0h9nvuQGElefYNrf93rL510u Hc52apND0kR6oeHAy3EWI3QPQCLKEu9ThHJfOaDIQ/Y1YoQO8a5Z7QIlZbi5qX9sEPMi v4AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=yz7OSxKrs5tDs3iPjdQ84SnbqujRTE3B+86PcByyECI=; b=ObY75kLrMq9WKC0+dz6PEMYlRO9U6RlVCH5ZwXV8J3ISospFzNTZFxmYIACetXuQg7 QtGOykYE+tJr3HSj4rnnPGvGWqGHciSt0vsXVv9lieTFO6v23y8LtRYRO7PP58UqxuL9 3gx/2QMqi/Tskd8vgSEQfaV/91Di8YDgv1azeo6MANPaMsI6Ggqy/1L4BaZvOyBw+1Oj 9gXCqG3W4ReGjJ720ExUHk3zeB6u82ChlIaIVg0DwBKGL0/H9J/dSEhI5LhPNtFFk4Pf Gd7s6kZSBr7KZKc1HA9GQwbRZRP/PI96zG0o3gVbby+4wMjOMG34DBXH6J/UAIw8eSnl EI6Q== X-Gm-Message-State: AOAM530jKLubQD2Otkp7q2ynlwosflBH4Ac0Vp3lv4TwaQ1C/zRZ4rEl /Ahz3U8Z3pUauH/jivwnUA7sSw== X-Google-Smtp-Source: ABdhPJwdbB0131GO5e9RXgw7jZajpVoD+s7BqbYj4LRTMgnSJC90hHj+bS2xwaNZ7M3DVBRF0okusQ== X-Received: by 2002:a1c:22d5:: with SMTP id i204mr3680039wmi.145.1632823395493; Tue, 28 Sep 2021 03:03:15 -0700 (PDT) Received: from google.com ([95.148.6.233]) by smtp.gmail.com with ESMTPSA id 8sm2139893wmj.18.2021.09.28.03.03.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 03:03:15 -0700 (PDT) Date: Tue, 28 Sep 2021 11:03:13 +0100 From: Lee Jones To: Greg KH Cc: "David E. Box" , bhelgaas@google.com, andy.shevchenko@gmail.com, mgross@linux.intel.com, srinivas.pandruvada@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH v3 2/5] MFD: intel_pmt: Support non-PMT capabilities Message-ID: References: <20210922213007.2738388-1-david.e.box@linux.intel.com> <20210922213007.2738388-3-david.e.box@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 28 Sep 2021, Greg KH wrote: > On Tue, Sep 28, 2021 at 08:54:45AM +0100, Lee Jones wrote: > > On Mon, 27 Sep 2021, David E. Box wrote: > > > > > On Mon, 2021-09-27 at 19:36 +0200, Greg KH wrote: > > > > On Wed, Sep 22, 2021 at 02:30:04PM -0700, David E. Box wrote: > > > > > Intel Platform Monitoring Technology (PMT) support is indicated by presence > > > > > of an Intel defined PCIe DVSEC structure with a PMT ID. However DVSEC > > > > > structures may also be used by Intel to indicate support for other > > > > > capabilities unrelated to PMT.  OOBMSM is a device that can have both PMT > > > > > and non-PMT capabilities. In order to support these capabilities it is > > > > > necessary to modify the intel_pmt driver to handle the creation of platform > > > > > devices more generically. > > > > > > > > I said this on your other driver submission, but why are you turning a > > > > PCIe device into a set of platform devices and craming it into the MFD > > > > subsystem? > > > > > > > > PCIe devices are NOT platform devices. > > > > > > But they *are* used to create platform devices when the PCIe device is multi-functional, which is > > > what intel_pmt is. > > > > > > > > > > > Why not use the auxiliary bus for this thing if you have individual > > > > drivers that need to "bind" to the different attributes that this single > > > > PCIe device is exporting. > > > > > > It wasn't clear in the beginning how this would evolve. MFD made sense for the PMT (platform > > > monitoring technology) driver. PMT has 3 related but individually enumerable devices on the same IP, > > > like lpss. But the same IP is now being used for other features too like SDSi. We could work on > > > converting this to the auxiliary bus and then covert the cell drivers. > > > > I see this as subsequent work. It should not affect this submission. > > > > FWIW, I still plan to review this set for inclusion into MFD. > > That's fine, but as the add-on submission that builds on top of this is > a broken mess (which is what caused me to have to review this series), I > can't recommend that be taken yet as it needs work to prevent systems > from doing bad things. Understood. Deferred. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog