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* [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
@ 2021-10-05 17:56 Jani Nikula
  2021-10-05 18:06 ` Ville Syrjälä
                   ` (3 more replies)
  0 siblings, 4 replies; 10+ messages in thread
From: Jani Nikula @ 2021-10-05 17:56 UTC (permalink / raw)
  To: intel-gfx
  Cc: jani.nikula, José Roberto de Souza, Uma Shankar,
	Ville Syrjälä,
	Swati Sharma

For the time being, neither the power sequencer nor the backlight code
properly support two eDP panels simultaneously. While the software
states will be independent, the same sets of registers will be used for
both eDP panels, clobbering the hardware state and leading to errors.

Gracefully disable dual eDP until proper support has been added.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index f9776ca85de3..b99907c656bb 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
 	}
 }
 
+static enum port get_edp_port(struct drm_i915_private *i915)
+{
+	const struct intel_bios_encoder_data *devdata;
+	enum port port;
+
+	for_each_port(port) {
+		devdata = i915->vbt.ports[port];
+
+		if (devdata && intel_bios_encoder_supports_edp(devdata))
+			return port;
+	}
+
+	return PORT_NONE;
+}
+
+/*
+ * FIXME: The power sequencer and backlight code currently do not support more
+ * than one set registers, at least not on anything other than VLV/CHV. It will
+ * clobber the registers. As a temporary workaround, gracefully prevent more
+ * than one eDP from being registered.
+ */
+static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
+			      enum port port)
+{
+	struct drm_i915_private *i915 = devdata->i915;
+	struct child_device_config *child = &devdata->child;
+	enum port p;
+
+	/* CHV might not clobber PPS registers. */
+	if (IS_CHERRYVIEW(i915))
+		return;
+
+	p = get_edp_port(i915);
+	if (p == PORT_NONE)
+		return;
+
+	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
+		    "disabling port %c eDP\n", port_name(p), port_name(port),
+		    port_name(port));
+
+	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
+	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
+}
+
 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
 {
 	/*
@@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 		    supports_typec_usb, supports_tbt,
 		    devdata->dsc != NULL);
 
+	if (is_edp)
+		sanitize_dual_edp(devdata, port);
+
 	if (is_dvi)
 		sanitize_ddc_pin(devdata, port);
 
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 17:56 [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now Jani Nikula
@ 2021-10-05 18:06 ` Ville Syrjälä
  2021-10-05 19:30   ` Jani Nikula
  2021-10-05 20:21 ` Souza, Jose
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 10+ messages in thread
From: Ville Syrjälä @ 2021-10-05 18:06 UTC (permalink / raw)
  To: Jani Nikula
  Cc: intel-gfx, José Roberto de Souza, Uma Shankar, Swati Sharma

On Tue, Oct 05, 2021 at 08:56:36PM +0300, Jani Nikula wrote:
> For the time being, neither the power sequencer nor the backlight code
> properly support two eDP panels simultaneously. While the software
> states will be independent, the same sets of registers will be used for
> both eDP panels, clobbering the hardware state and leading to errors.
> 
> Gracefully disable dual eDP until proper support has been added.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Swati Sharma <swati2.sharma@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index f9776ca85de3..b99907c656bb 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
>  	}
>  }
>  
> +static enum port get_edp_port(struct drm_i915_private *i915)
> +{
> +	const struct intel_bios_encoder_data *devdata;
> +	enum port port;
> +
> +	for_each_port(port) {
> +		devdata = i915->vbt.ports[port];
> +
> +		if (devdata && intel_bios_encoder_supports_edp(devdata))
> +			return port;
> +	}
> +
> +	return PORT_NONE;
> +}
> +
> +/*
> + * FIXME: The power sequencer and backlight code currently do not support more
> + * than one set registers, at least not on anything other than VLV/CHV. It will
> + * clobber the registers. As a temporary workaround, gracefully prevent more
> + * than one eDP from being registered.
> + */
> +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
> +			      enum port port)
> +{
> +	struct drm_i915_private *i915 = devdata->i915;
> +	struct child_device_config *child = &devdata->child;
> +	enum port p;
> +
> +	/* CHV might not clobber PPS registers. */
> +	if (IS_CHERRYVIEW(i915))

vlv and chv should both behave identically. At least I don't remember
any single eDP assumptions in the code for either.

Hmm. Quick glance suggest bxt/glk should handle this correctly
as well? But the more recent platforms are certainly borked.
Well, that's assuming the vbt related bits are correct for bxt/glk.

> +		return;
> +
> +	p = get_edp_port(i915);
> +	if (p == PORT_NONE)
> +		return;
> +
> +	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
> +		    "disabling port %c eDP\n", port_name(p), port_name(port),
> +		    port_name(port));
> +
> +	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
> +	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
> +}
> +
>  static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>  {
>  	/*
> @@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>  		    supports_typec_usb, supports_tbt,
>  		    devdata->dsc != NULL);
>  
> +	if (is_edp)
> +		sanitize_dual_edp(devdata, port);
> +
>  	if (is_dvi)
>  		sanitize_ddc_pin(devdata, port);
>  
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 18:06 ` Ville Syrjälä
@ 2021-10-05 19:30   ` Jani Nikula
  2021-10-06  9:01     ` Ville Syrjälä
  0 siblings, 1 reply; 10+ messages in thread
From: Jani Nikula @ 2021-10-05 19:30 UTC (permalink / raw)
  To: Ville Syrjälä
  Cc: intel-gfx, José Roberto de Souza, Uma Shankar, Swati Sharma

On Tue, 05 Oct 2021, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Oct 05, 2021 at 08:56:36PM +0300, Jani Nikula wrote:
>> For the time being, neither the power sequencer nor the backlight code
>> properly support two eDP panels simultaneously. While the software
>> states will be independent, the same sets of registers will be used for
>> both eDP panels, clobbering the hardware state and leading to errors.
>> 
>> Gracefully disable dual eDP until proper support has been added.
>> 
>> Cc: José Roberto de Souza <jose.souza@intel.com>
>> Cc: Uma Shankar <uma.shankar@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Swati Sharma <swati2.sharma@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
>>  1 file changed, 47 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
>> index f9776ca85de3..b99907c656bb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
>>  	}
>>  }
>>  
>> +static enum port get_edp_port(struct drm_i915_private *i915)
>> +{
>> +	const struct intel_bios_encoder_data *devdata;
>> +	enum port port;
>> +
>> +	for_each_port(port) {
>> +		devdata = i915->vbt.ports[port];
>> +
>> +		if (devdata && intel_bios_encoder_supports_edp(devdata))
>> +			return port;
>> +	}
>> +
>> +	return PORT_NONE;
>> +}
>> +
>> +/*
>> + * FIXME: The power sequencer and backlight code currently do not support more
>> + * than one set registers, at least not on anything other than VLV/CHV. It will
>> + * clobber the registers. As a temporary workaround, gracefully prevent more
>> + * than one eDP from being registered.
>> + */
>> +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
>> +			      enum port port)
>> +{
>> +	struct drm_i915_private *i915 = devdata->i915;
>> +	struct child_device_config *child = &devdata->child;
>> +	enum port p;
>> +
>> +	/* CHV might not clobber PPS registers. */
>> +	if (IS_CHERRYVIEW(i915))
>
> vlv and chv should both behave identically. At least I don't remember
> any single eDP assumptions in the code for either.

This bit of code is not run on VLV, only CHV and DDI. It's subtle.

> Hmm. Quick glance suggest bxt/glk should handle this correctly
> as well? But the more recent platforms are certainly borked.
> Well, that's assuming the vbt related bits are correct for bxt/glk.

VLV/CHV figure out the PPS in a complicated manner, and use pipe
specific backlight. They might work.

BXT/GLK look at VBT for the pps/backlight index, but that's just the
*one* number. All the structures are set up nicely, but then they use
the same set of registers for all panels.

The recent failure mode was a really weird looking VDD warn, and it just
turned out to be two intel_pps instances using the same registers and
getting royally confused about the sw/hw states.

We'd need to figure out the per-panel pps/backlight to use from VBT, for
each panel, and then set that up.


BR,
Jani.


>
>> +		return;
>> +
>> +	p = get_edp_port(i915);
>> +	if (p == PORT_NONE)
>> +		return;
>> +
>> +	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
>> +		    "disabling port %c eDP\n", port_name(p), port_name(port),
>> +		    port_name(port));
>> +
>> +	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
>> +	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
>> +}
>> +
>>  static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>>  {
>>  	/*
>> @@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>>  		    supports_typec_usb, supports_tbt,
>>  		    devdata->dsc != NULL);
>>  
>> +	if (is_edp)
>> +		sanitize_dual_edp(devdata, port);
>> +
>>  	if (is_dvi)
>>  		sanitize_ddc_pin(devdata, port);
>>  
>> -- 
>> 2.30.2

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 17:56 [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now Jani Nikula
  2021-10-05 18:06 ` Ville Syrjälä
@ 2021-10-05 20:21 ` Souza, Jose
  2021-10-05 20:38   ` Jani Nikula
  2021-10-05 23:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
  2021-10-06  4:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  3 siblings, 1 reply; 10+ messages in thread
From: Souza, Jose @ 2021-10-05 20:21 UTC (permalink / raw)
  To: Nikula, Jani, intel-gfx; +Cc: Shankar, Uma, ville.syrjala, Sharma, Swati2

On Tue, 2021-10-05 at 20:56 +0300, Jani Nikula wrote:
> For the time being, neither the power sequencer nor the backlight code
> properly support two eDP panels simultaneously. While the software
> states will be independent, the same sets of registers will be used for
> both eDP panels, clobbering the hardware state and leading to errors.
> 
> Gracefully disable dual eDP until proper support has been added.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Swati Sharma <swati2.sharma@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index f9776ca85de3..b99907c656bb 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
>  	}
>  }
>  
> +static enum port get_edp_port(struct drm_i915_private *i915)
> +{
> +	const struct intel_bios_encoder_data *devdata;
> +	enum port port;
> +
> +	for_each_port(port) {
> +		devdata = i915->vbt.ports[port];
> +
> +		if (devdata && intel_bios_encoder_supports_edp(devdata))
> +			return port;
> +	}
> +
> +	return PORT_NONE;
> +}
> +
> +/*
> + * FIXME: The power sequencer and backlight code currently do not support more
> + * than one set registers, at least not on anything other than VLV/CHV. It will
> + * clobber the registers. As a temporary workaround, gracefully prevent more
> + * than one eDP from being registered.
> + */
> +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
> +			      enum port port)
> +{
> +	struct drm_i915_private *i915 = devdata->i915;
> +	struct child_device_config *child = &devdata->child;
> +	enum port p;
> +
> +	/* CHV might not clobber PPS registers. */
> +	if (IS_CHERRYVIEW(i915))
> +		return;
> +
> +	p = get_edp_port(i915);
> +	if (p == PORT_NONE)
> +		return;
> +
> +	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
> +		    "disabling port %c eDP\n", port_name(p), port_name(port),
> +		    port_name(port));
> +
> +	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;

Why also cleaning the DEVICE_TYPE_DISPLAYPORT_OUTPUT bit? The rest lgtm.

> +	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
> +}
> +
>  static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>  {
>  	/*
> @@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>  		    supports_typec_usb, supports_tbt,
>  		    devdata->dsc != NULL);
>  
> +	if (is_edp)
> +		sanitize_dual_edp(devdata, port);
> +
>  	if (is_dvi)
>  		sanitize_ddc_pin(devdata, port);
>  


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 20:21 ` Souza, Jose
@ 2021-10-05 20:38   ` Jani Nikula
  2021-10-05 20:41     ` Souza, Jose
  0 siblings, 1 reply; 10+ messages in thread
From: Jani Nikula @ 2021-10-05 20:38 UTC (permalink / raw)
  To: Souza, Jose, intel-gfx; +Cc: Shankar, Uma, ville.syrjala, Sharma, Swati2

On Tue, 05 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
> On Tue, 2021-10-05 at 20:56 +0300, Jani Nikula wrote:
>> For the time being, neither the power sequencer nor the backlight code
>> properly support two eDP panels simultaneously. While the software
>> states will be independent, the same sets of registers will be used for
>> both eDP panels, clobbering the hardware state and leading to errors.
>> 
>> Gracefully disable dual eDP until proper support has been added.
>> 
>> Cc: José Roberto de Souza <jose.souza@intel.com>
>> Cc: Uma Shankar <uma.shankar@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Swati Sharma <swati2.sharma@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
>>  1 file changed, 47 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
>> index f9776ca85de3..b99907c656bb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
>>  	}
>>  }
>>  
>> +static enum port get_edp_port(struct drm_i915_private *i915)
>> +{
>> +	const struct intel_bios_encoder_data *devdata;
>> +	enum port port;
>> +
>> +	for_each_port(port) {
>> +		devdata = i915->vbt.ports[port];
>> +
>> +		if (devdata && intel_bios_encoder_supports_edp(devdata))
>> +			return port;
>> +	}
>> +
>> +	return PORT_NONE;
>> +}
>> +
>> +/*
>> + * FIXME: The power sequencer and backlight code currently do not support more
>> + * than one set registers, at least not on anything other than VLV/CHV. It will
>> + * clobber the registers. As a temporary workaround, gracefully prevent more
>> + * than one eDP from being registered.
>> + */
>> +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
>> +			      enum port port)
>> +{
>> +	struct drm_i915_private *i915 = devdata->i915;
>> +	struct child_device_config *child = &devdata->child;
>> +	enum port p;
>> +
>> +	/* CHV might not clobber PPS registers. */
>> +	if (IS_CHERRYVIEW(i915))
>> +		return;
>> +
>> +	p = get_edp_port(i915);
>> +	if (p == PORT_NONE)
>> +		return;
>> +
>> +	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
>> +		    "disabling port %c eDP\n", port_name(p), port_name(port),
>> +		    port_name(port));
>> +
>> +	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
>
> Why also cleaning the DEVICE_TYPE_DISPLAYPORT_OUTPUT bit? The rest lgtm.

Could've leaned one way or the other, but do we really want to
initialize a regular DP on the port?

BR,
Jani.

>
>> +	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
>> +}
>> +
>>  static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>>  {
>>  	/*
>> @@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>>  		    supports_typec_usb, supports_tbt,
>>  		    devdata->dsc != NULL);
>>  
>> +	if (is_edp)
>> +		sanitize_dual_edp(devdata, port);
>> +
>>  	if (is_dvi)
>>  		sanitize_ddc_pin(devdata, port);
>>  
>

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 20:38   ` Jani Nikula
@ 2021-10-05 20:41     ` Souza, Jose
  2021-10-14 13:31       ` Jani Nikula
  0 siblings, 1 reply; 10+ messages in thread
From: Souza, Jose @ 2021-10-05 20:41 UTC (permalink / raw)
  To: Nikula, Jani, intel-gfx; +Cc: Shankar, Uma, ville.syrjala, Sharma, Swati2

On Tue, 2021-10-05 at 23:38 +0300, Jani Nikula wrote:
> On Tue, 05 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
> > On Tue, 2021-10-05 at 20:56 +0300, Jani Nikula wrote:
> > > For the time being, neither the power sequencer nor the backlight code
> > > properly support two eDP panels simultaneously. While the software
> > > states will be independent, the same sets of registers will be used for
> > > both eDP panels, clobbering the hardware state and leading to errors.
> > > 
> > > Gracefully disable dual eDP until proper support has been added.
> > > 
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Cc: Uma Shankar <uma.shankar@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Cc: Swati Sharma <swati2.sharma@intel.com>
> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
> > >  1 file changed, 47 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> > > index f9776ca85de3..b99907c656bb 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_bios.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> > > @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
> > >  	}
> > >  }
> > >  
> > > +static enum port get_edp_port(struct drm_i915_private *i915)
> > > +{
> > > +	const struct intel_bios_encoder_data *devdata;
> > > +	enum port port;
> > > +
> > > +	for_each_port(port) {
> > > +		devdata = i915->vbt.ports[port];
> > > +
> > > +		if (devdata && intel_bios_encoder_supports_edp(devdata))
> > > +			return port;
> > > +	}
> > > +
> > > +	return PORT_NONE;
> > > +}
> > > +
> > > +/*
> > > + * FIXME: The power sequencer and backlight code currently do not support more
> > > + * than one set registers, at least not on anything other than VLV/CHV. It will
> > > + * clobber the registers. As a temporary workaround, gracefully prevent more
> > > + * than one eDP from being registered.
> > > + */
> > > +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
> > > +			      enum port port)
> > > +{
> > > +	struct drm_i915_private *i915 = devdata->i915;
> > > +	struct child_device_config *child = &devdata->child;
> > > +	enum port p;
> > > +
> > > +	/* CHV might not clobber PPS registers. */
> > > +	if (IS_CHERRYVIEW(i915))
> > > +		return;
> > > +
> > > +	p = get_edp_port(i915);
> > > +	if (p == PORT_NONE)
> > > +		return;
> > > +
> > > +	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
> > > +		    "disabling port %c eDP\n", port_name(p), port_name(port),
> > > +		    port_name(port));
> > > +
> > > +	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
> > 
> > Why also cleaning the DEVICE_TYPE_DISPLAYPORT_OUTPUT bit? The rest lgtm.
> 
> Could've leaned one way or the other, but do we really want to
> initialize a regular DP on the port?

Yeah, lets go without.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> BR,
> Jani.
> 
> > 
> > > +	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
> > > +}
> > > +
> > >  static bool is_port_valid(struct drm_i915_private *i915, enum port port)
> > >  {
> > >  	/*
> > > @@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
> > >  		    supports_typec_usb, supports_tbt,
> > >  		    devdata->dsc != NULL);
> > >  
> > > +	if (is_edp)
> > > +		sanitize_dual_edp(devdata, port);
> > > +
> > >  	if (is_dvi)
> > >  		sanitize_ddc_pin(devdata, port);
> > >  
> > 
> 


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 17:56 [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now Jani Nikula
  2021-10-05 18:06 ` Ville Syrjälä
  2021-10-05 20:21 ` Souza, Jose
@ 2021-10-05 23:52 ` Patchwork
  2021-10-06  4:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  3 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2021-10-05 23:52 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 6594 bytes --]

== Series Details ==

Series: drm/i915/bios: gracefully disable dual eDP for now
URL   : https://patchwork.freedesktop.org/series/95475/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10685 -> Patchwork_21255
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/index.html

Known issues
------------

  Here are the changes found in Patchwork_21255 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][1] ([fdo#109271]) +12 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@i915_selftest@live@execlists:
    - fi-bsw-kefka:       [PASS][3] -> [INCOMPLETE][4] ([i915#2940])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-bsw-kefka/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][5] ([i915#1886] / [i915#2291])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_flip@basic-plain-flip@c-dp1:
    - fi-cfl-8109u:       [PASS][7] -> [FAIL][8] ([i915#4165])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-cfl-8109u/igt@kms_flip@basic-plain-flip@c-dp1.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-cfl-8109u/igt@kms_flip@basic-plain-flip@c-dp1.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
    - fi-cfl-8109u:       [PASS][9] -> [DMESG-WARN][10] ([i915#295]) +13 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#533])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@runner@aborted:
    - fi-bsw-kefka:       NOTRUN -> [FAIL][12] ([fdo#109271] / [i915#1436] / [i915#3428])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-bsw-kefka/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-tgl-u2:          [INCOMPLETE][13] -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_exec_suspend@basic-s0:
    - fi-kbl-soraka:      [INCOMPLETE][15] ([i915#155]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-tgl-u2:          [FAIL][17] ([i915#1888]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html

  * igt@kms_flip@basic-flip-vs-modeset@c-dp1:
    - fi-cfl-8109u:       [FAIL][19] ([i915#4165]) -> [PASS][20] +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-cfl-8109u/igt@kms_flip@basic-flip-vs-modeset@c-dp1.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-cfl-8109u/igt@kms_flip@basic-flip-vs-modeset@c-dp1.html

  
#### Warnings ####

  * igt@kms_frontbuffer_tracking@basic:
    - fi-cfl-8109u:       [FAIL][21] ([i915#2546]) -> [DMESG-WARN][22] ([i915#295])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/fi-cfl-8109u/igt@kms_frontbuffer_tracking@basic.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/fi-cfl-8109u/igt@kms_frontbuffer_tracking@basic.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2546]: https://gitlab.freedesktop.org/drm/intel/issues/2546
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
  [i915#4165]: https://gitlab.freedesktop.org/drm/intel/issues/4165
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Participating hosts (41 -> 33)
------------------------------

  Missing    (8): fi-ilk-m540 bat-dg1-6 fi-bsw-n3050 fi-hsw-4200u fi-bsw-cyan bat-adlp-4 fi-ctg-p8600 bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10685 -> Patchwork_21255

  CI-20190529: 20190529
  CI_DRM_10685: 36c3656c997b07f326d6b967efb1b75e01713773 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6232: effad6af5678be711a2c3e58e182319de784de54 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21255: bbb41e6f3153b6af3300afb56e55620c88d4ca67 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

bbb41e6f3153 drm/i915/bios: gracefully disable dual eDP for now

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/index.html

[-- Attachment #2: Type: text/html, Size: 7929 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 17:56 [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now Jani Nikula
                   ` (2 preceding siblings ...)
  2021-10-05 23:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2021-10-06  4:28 ` Patchwork
  3 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2021-10-06  4:28 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30273 bytes --]

== Series Details ==

Series: drm/i915/bios: gracefully disable dual eDP for now
URL   : https://patchwork.freedesktop.org/series/95475/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10685_full -> Patchwork_21255_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_21255_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@feature_discovery@display-2x:
    - shard-tglb:         NOTRUN -> [SKIP][1] ([i915#1839])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@feature_discovery@display-2x.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-apl:          NOTRUN -> [DMESG-WARN][2] ([i915#180])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl8/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_ctx_persistence@legacy-engines-queued:
    - shard-snb:          NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-snb7/igt@gem_ctx_persistence@legacy-engines-queued.html

  * igt@gem_ctx_shared@q-in-order:
    - shard-snb:          NOTRUN -> [SKIP][4] ([fdo#109271]) +373 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-snb2/igt@gem_ctx_shared@q-in-order.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][5] -> [FAIL][6] ([i915#2846])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-glk9/igt@gem_exec_fair@basic-deadline.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-glk6/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [PASS][7] -> [FAIL][8] ([i915#2842])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb6/igt@gem_exec_fair@basic-none-share@rcs0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-kbl:          [PASS][9] -> [FAIL][10] ([i915#2842]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl3/igt@gem_exec_fair@basic-none@vcs0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl3/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][11] ([i915#2842])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb4/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [PASS][12] -> [SKIP][13] ([i915#2190])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-tglb8/igt@gem_huc_copy@huc-copy.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb6/igt@gem_huc_copy@huc-copy.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs:
    - shard-iclb:         NOTRUN -> [SKIP][14] ([i915#768])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-iclb:         NOTRUN -> [SKIP][15] ([i915#3297])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-snb:          NOTRUN -> [FAIL][16] ([i915#2724])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-snb2/igt@gem_userptr_blits@vma-merge.html

  * igt@gen3_render_tiledy_blits:
    - shard-tglb:         NOTRUN -> [SKIP][17] ([fdo#109289]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@gen3_render_tiledy_blits.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][18] -> [DMESG-WARN][19] ([i915#1436] / [i915#716])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl5/igt@gen9_exec_parse@allowed-single.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl10/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@batch-zero-length:
    - shard-tglb:         NOTRUN -> [SKIP][20] ([i915#2856])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@gen9_exec_parse@batch-zero-length.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][21] -> [FAIL][22] ([i915#454])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rc6_residency@media-rc6-accuracy:
    - shard-tglb:         NOTRUN -> [SKIP][23] ([fdo#109289] / [fdo#111719])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@i915_pm_rc6_residency@media-rc6-accuracy.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][24] ([fdo#111614])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb3/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3777]) +5 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
    - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#111615]) +1 similar issue
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][27] ([fdo#109278] / [i915#3886])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#3886]) +5 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#3886]) +11 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl6/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
    - shard-tglb:         NOTRUN -> [SKIP][30] ([i915#3689] / [i915#3886]) +1 similar issue
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][31] ([fdo#109271]) +40 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl4/igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs.html

  * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][32] ([i915#3689]) +3 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb3/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html

  * igt@kms_chamelium@hdmi-edid-read:
    - shard-tglb:         NOTRUN -> [SKIP][33] ([fdo#109284] / [fdo#111827]) +4 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb3/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_chamelium@vga-frame-dump:
    - shard-kbl:          NOTRUN -> [SKIP][34] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@kms_chamelium@vga-frame-dump.html

  * igt@kms_chamelium@vga-hpd:
    - shard-apl:          NOTRUN -> [SKIP][35] ([fdo#109271] / [fdo#111827]) +20 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl1/igt@kms_chamelium@vga-hpd.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-snb:          NOTRUN -> [SKIP][36] ([fdo#109271] / [fdo#111827]) +19 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-snb2/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-apl:          NOTRUN -> [TIMEOUT][37] ([i915#1319])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl1/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@srm:
    - shard-kbl:          NOTRUN -> [TIMEOUT][38] ([i915#1319])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@pipe-a-cursor-max-size-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][39] ([i915#3359]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_cursor_crc@pipe-a-cursor-max-size-offscreen.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][40] ([fdo#109279] / [i915#3359])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-32x32-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][41] ([i915#3319])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_cursor_crc@pipe-d-cursor-32x32-rapid-movement.html

  * igt@kms_cursor_edge_walk@pipe-d-64x64-right-edge:
    - shard-skl:          NOTRUN -> [SKIP][42] ([fdo#109271]) +4 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl3/igt@kms_cursor_edge_walk@pipe-d-64x64-right-edge.html

  * igt@kms_cursor_legacy@pipe-d-torture-move:
    - shard-iclb:         NOTRUN -> [SKIP][43] ([fdo#109278]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@kms_cursor_legacy@pipe-d-torture-move.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-iclb:         NOTRUN -> [SKIP][44] ([fdo#109274])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@flip-vs-suspend@a-dp1:
    - shard-apl:          NOTRUN -> [DMESG-WARN][45] ([i915#180] / [i915#1982])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl8/igt@kms_flip@flip-vs-suspend@a-dp1.html

  * igt@kms_flip@plain-flip-fb-recreate@a-edp1:
    - shard-skl:          [PASS][46] -> [FAIL][47] ([i915#2122])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl9/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl4/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
    - shard-iclb:         [PASS][48] -> [SKIP][49] ([i915#3701])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-kbl:          NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#2672])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109280]) +2 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-apl:          NOTRUN -> [SKIP][52] ([fdo#109271]) +242 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([fdo#111825]) +13 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [PASS][54] -> [FAIL][55] ([i915#1188])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-kbl:          [PASS][56] -> [DMESG-WARN][57] ([i915#180]) +6 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl1/igt@kms_hdr@bpc-switch-suspend.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@static-toggle:
    - shard-tglb:         NOTRUN -> [SKIP][58] ([i915#1187])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb8/igt@kms_hdr@static-toggle.html

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][59] ([fdo#109271] / [i915#533])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl7/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-tglb:         [PASS][60] -> [INCOMPLETE][61] ([i915#456]) +4 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-tglb1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane@pixel-format-source-clamping@pipe-a-planes:
    - shard-skl:          [PASS][62] -> [DMESG-WARN][63] ([i915#1982]) +3 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl6/igt@kms_plane@pixel-format-source-clamping@pipe-a-planes.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl3/igt@kms_plane@pixel-format-source-clamping@pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][64] ([fdo#108145] / [i915#265]) +1 similar issue
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl8/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][65] ([i915#265])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl7/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html

  * igt@kms_plane_lowres@pipe-a-tiling-none:
    - shard-tglb:         NOTRUN -> [SKIP][66] ([i915#3536]) +1 similar issue
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_plane_lowres@pipe-a-tiling-none.html

  * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
    - shard-apl:          NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#2733])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl7/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-kbl:          NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#658]) +1 similar issue
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#658]) +5 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area-3:
    - shard-tglb:         NOTRUN -> [SKIP][70] ([i915#2920])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_psr2_sf@plane-move-sf-dmg-area-3.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][71] -> [SKIP][72] ([fdo#109642] / [fdo#111068] / [i915#658])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb5/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][73] -> [SKIP][74] ([fdo#109441]) +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb5/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-apl:          NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#2437])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl8/igt@kms_writeback@writeback-fb-id.html

  * igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame:
    - shard-tglb:         NOTRUN -> [SKIP][76] ([i915#2530]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame.html

  * igt@perf@polling:
    - shard-skl:          [PASS][77] -> [FAIL][78] ([i915#1542])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl7/igt@perf@polling.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl6/igt@perf@polling.html

  * igt@prime_nv_test@i915_blt_fill_nv_read:
    - shard-iclb:         NOTRUN -> [SKIP][79] ([fdo#109291])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb3/igt@prime_nv_test@i915_blt_fill_nv_read.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-tglb:         NOTRUN -> [SKIP][80] ([fdo#109295])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@prime_vgem@fence-flip-hang.html

  * igt@sysfs_clients@create:
    - shard-apl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#2994]) +3 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl7/igt@sysfs_clients@create.html

  * igt@sysfs_clients@fair-0:
    - shard-tglb:         NOTRUN -> [SKIP][82] ([i915#2994]) +2 similar issues
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@sysfs_clients@fair-0.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-tglb:         [TIMEOUT][83] ([i915#3063]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-tglb5/igt@gem_eio@in-flight-contexts-1us.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb6/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-kbl:          [FAIL][85] ([i915#2846]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl3/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][87] ([i915#2842]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-glk3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
    - shard-kbl:          [FAIL][89] ([i915#2842]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl3/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-tglb:         [FAIL][91] ([i915#2842]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-tglb2/igt@gem_exec_fair@basic-pace@vcs0.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_exec_whisper@basic-fds-priority:
    - shard-glk:          [DMESG-WARN][93] ([i915#118] / [i915#95]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-glk9/igt@gem_exec_whisper@basic-fds-priority.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-glk7/igt@gem_exec_whisper@basic-fds-priority.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-skl:          [FAIL][95] ([i915#79]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-tglb:         [INCOMPLETE][97] ([i915#2411] / [i915#456]) -> [PASS][98] +1 similar issue
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-tglb5/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
    - shard-apl:          [DMESG-WARN][99] ([i915#180]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][101] ([fdo#108145] / [i915#265]) -> [PASS][102] +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_prop_blob@blob-multiple:
    - shard-skl:          [DMESG-WARN][103] ([i915#1982]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl5/igt@kms_prop_blob@blob-multiple.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl10/igt@kms_prop_blob@blob-multiple.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][105] ([fdo#109441]) -> [PASS][106] +2 similar issues
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb7/igt@kms_psr@psr2_sprite_plane_move.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@perf@short-reads:
    - shard-skl:          [FAIL][107] ([i915#51]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl1/igt@perf@short-reads.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl10/igt@perf@short-reads.html

  * igt@perf_pmu@rc6-suspend:
    - shard-kbl:          [DMESG-WARN][109] ([i915#180]) -> [PASS][110] +1 similar issue
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl1/igt@perf_pmu@rc6-suspend.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@perf_pmu@rc6-suspend.html

  
#### Warnings ####

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
    - shard-iclb:         [SKIP][111] ([i915#658]) -> [SKIP][112] ([i915#2920]) +1 similar issue
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb5/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area-3:
    - shard-iclb:         [SKIP][113] ([i915#2920]) -> [SKIP][114] ([i915#658]) +1 similar issue
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area-3.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-iclb7/igt@kms_psr2_sf@plane-move-sf-dmg-area-3.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][115], [FAIL][116], [FAIL][117], [FAIL][118], [FAIL][119], [FAIL][120], [FAIL][121], [FAIL][122], [FAIL][123]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602] / [i915#92]) -> ([FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127], [FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134], [FAIL][135]) ([fdo#109271] / [i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#92])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl1/igt@runner@aborted.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl1/igt@runner@aborted.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl1/igt@runner@aborted.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl6/igt@runner@aborted.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl6/igt@runner@aborted.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl4/igt@runner@aborted.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl3/igt@runner@aborted.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl4/igt@runner@aborted.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-kbl4/igt@runner@aborted.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl2/igt@runner@aborted.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@runner@aborted.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@runner@aborted.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@runner@aborted.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl6/igt@runner@aborted.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl1/igt@runner@aborted.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl7/igt@runner@aborted.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl3/igt@runner@aborted.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl1/igt@runner@aborted.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl4/igt@runner@aborted.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl1/igt@runner@aborted.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-kbl1/igt@runner@aborted.html
    - shard-apl:          ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144]) ([i915#180] / [i915#3002] / [i915#3363])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-apl6/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-apl8/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-apl3/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-apl1/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-apl1/igt@runner@aborted.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl7/igt@runner@aborted.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl8/igt@runner@aborted.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl8/igt@runner@aborted.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-apl1/igt@runner@aborted.html
    - shard-skl:          ([FAIL][145], [FAIL][146]) ([i915#3002] / [i915#3363]) -> ([FAIL][147], [FAIL][148], [FAIL][149]) ([i915#1436] / [i915#3002] / [i915#3363])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl10/igt@runner@aborted.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10685/shard-skl10/igt@runner@aborted.html
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl2/igt@runner@aborted.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl2/igt@runner@aborted.html
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/shard-skl10/igt@runner@aborted.html

  
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bu

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21255/index.html

[-- Attachment #2: Type: text/html, Size: 35100 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 19:30   ` Jani Nikula
@ 2021-10-06  9:01     ` Ville Syrjälä
  0 siblings, 0 replies; 10+ messages in thread
From: Ville Syrjälä @ 2021-10-06  9:01 UTC (permalink / raw)
  To: Jani Nikula
  Cc: intel-gfx, José Roberto de Souza, Uma Shankar, Swati Sharma

On Tue, Oct 05, 2021 at 10:30:04PM +0300, Jani Nikula wrote:
> On Tue, 05 Oct 2021, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Tue, Oct 05, 2021 at 08:56:36PM +0300, Jani Nikula wrote:
> >> For the time being, neither the power sequencer nor the backlight code
> >> properly support two eDP panels simultaneously. While the software
> >> states will be independent, the same sets of registers will be used for
> >> both eDP panels, clobbering the hardware state and leading to errors.
> >> 
> >> Gracefully disable dual eDP until proper support has been added.
> >> 
> >> Cc: José Roberto de Souza <jose.souza@intel.com>
> >> Cc: Uma Shankar <uma.shankar@intel.com>
> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> Cc: Swati Sharma <swati2.sharma@intel.com>
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
> >>  1 file changed, 47 insertions(+)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> >> index f9776ca85de3..b99907c656bb 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> >> @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
> >>  	}
> >>  }
> >>  
> >> +static enum port get_edp_port(struct drm_i915_private *i915)
> >> +{
> >> +	const struct intel_bios_encoder_data *devdata;
> >> +	enum port port;
> >> +
> >> +	for_each_port(port) {
> >> +		devdata = i915->vbt.ports[port];
> >> +
> >> +		if (devdata && intel_bios_encoder_supports_edp(devdata))
> >> +			return port;
> >> +	}
> >> +
> >> +	return PORT_NONE;
> >> +}
> >> +
> >> +/*
> >> + * FIXME: The power sequencer and backlight code currently do not support more
> >> + * than one set registers, at least not on anything other than VLV/CHV. It will
> >> + * clobber the registers. As a temporary workaround, gracefully prevent more
> >> + * than one eDP from being registered.
> >> + */
> >> +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
> >> +			      enum port port)
> >> +{
> >> +	struct drm_i915_private *i915 = devdata->i915;
> >> +	struct child_device_config *child = &devdata->child;
> >> +	enum port p;
> >> +
> >> +	/* CHV might not clobber PPS registers. */
> >> +	if (IS_CHERRYVIEW(i915))
> >
> > vlv and chv should both behave identically. At least I don't remember
> > any single eDP assumptions in the code for either.
> 
> This bit of code is not run on VLV, only CHV and DDI. It's subtle.

Oh right. Maybe we should just flip the switch for VLV. VLV and
HSW did come out around the same time I think, and I have some
vbt specs which are labeled as VLV/HSW. So if it works for HSW
and CHV then I think there's a fair chance VLV will be fine.

> 
> > Hmm. Quick glance suggest bxt/glk should handle this correctly
> > as well? But the more recent platforms are certainly borked.
> > Well, that's assuming the vbt related bits are correct for bxt/glk.
> 
> VLV/CHV figure out the PPS in a complicated manner, and use pipe
> specific backlight. They might work.

Yeah, the assignment only depends on the current pipe driving the port.
Which is a horrible design, but kinda works after you deal with all
the madness (the pps kick stuff).

> 
> BXT/GLK look at VBT for the pps/backlight index, but that's just the
> *one* number. All the structures are set up nicely, but then they use
> the same set of registers for all panels.

Ah, right. So the low level mechanism is there, just not utilized.

> The recent failure mode was a really weird looking VDD warn, and it just
> turned out to be two intel_pps instances using the same registers and
> getting royally confused about the sw/hw states.
> 
> We'd need to figure out the per-panel pps/backlight to use from VBT, for
> each panel, and then set that up.

I guess one concern is which of the listed eDP ports we're going to
nuke, and does the port that is left have some chance of working.
Hard to know I guess. But at least the bug report should be a clear
"my display isn't lighting up!" type of thing.

Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now
  2021-10-05 20:41     ` Souza, Jose
@ 2021-10-14 13:31       ` Jani Nikula
  0 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2021-10-14 13:31 UTC (permalink / raw)
  To: Souza, Jose, intel-gfx; +Cc: Shankar, Uma, ville.syrjala, Sharma, Swati2

On Tue, 05 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
> On Tue, 2021-10-05 at 23:38 +0300, Jani Nikula wrote:
>> On Tue, 05 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
>> > On Tue, 2021-10-05 at 20:56 +0300, Jani Nikula wrote:
>> > > For the time being, neither the power sequencer nor the backlight code
>> > > properly support two eDP panels simultaneously. While the software
>> > > states will be independent, the same sets of registers will be used for
>> > > both eDP panels, clobbering the hardware state and leading to errors.
>> > > 
>> > > Gracefully disable dual eDP until proper support has been added.
>> > > 
>> > > Cc: José Roberto de Souza <jose.souza@intel.com>
>> > > Cc: Uma Shankar <uma.shankar@intel.com>
>> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > > Cc: Swati Sharma <swati2.sharma@intel.com>
>> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> > > ---
>> > >  drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
>> > >  1 file changed, 47 insertions(+)
>> > > 
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
>> > > index f9776ca85de3..b99907c656bb 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> > > +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> > > @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
>> > >  	}
>> > >  }
>> > >  
>> > > +static enum port get_edp_port(struct drm_i915_private *i915)
>> > > +{
>> > > +	const struct intel_bios_encoder_data *devdata;
>> > > +	enum port port;
>> > > +
>> > > +	for_each_port(port) {
>> > > +		devdata = i915->vbt.ports[port];
>> > > +
>> > > +		if (devdata && intel_bios_encoder_supports_edp(devdata))
>> > > +			return port;
>> > > +	}
>> > > +
>> > > +	return PORT_NONE;
>> > > +}
>> > > +
>> > > +/*
>> > > + * FIXME: The power sequencer and backlight code currently do not support more
>> > > + * than one set registers, at least not on anything other than VLV/CHV. It will
>> > > + * clobber the registers. As a temporary workaround, gracefully prevent more
>> > > + * than one eDP from being registered.
>> > > + */
>> > > +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
>> > > +			      enum port port)
>> > > +{
>> > > +	struct drm_i915_private *i915 = devdata->i915;
>> > > +	struct child_device_config *child = &devdata->child;
>> > > +	enum port p;
>> > > +
>> > > +	/* CHV might not clobber PPS registers. */
>> > > +	if (IS_CHERRYVIEW(i915))
>> > > +		return;
>> > > +
>> > > +	p = get_edp_port(i915);
>> > > +	if (p == PORT_NONE)
>> > > +		return;
>> > > +
>> > > +	drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
>> > > +		    "disabling port %c eDP\n", port_name(p), port_name(port),
>> > > +		    port_name(port));
>> > > +
>> > > +	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
>> > 
>> > Why also cleaning the DEVICE_TYPE_DISPLAYPORT_OUTPUT bit? The rest lgtm.
>> 
>> Could've leaned one way or the other, but do we really want to
>> initialize a regular DP on the port?
>
> Yeah, lets go without.
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

Thanks, pushed with Swati's Tested-by.

BR,
Jani.


>
>> 
>> BR,
>> Jani.
>> 
>> > 
>> > > +	child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
>> > > +}
>> > > +
>> > >  static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>> > >  {
>> > >  	/*
>> > > @@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>> > >  		    supports_typec_usb, supports_tbt,
>> > >  		    devdata->dsc != NULL);
>> > >  
>> > > +	if (is_edp)
>> > > +		sanitize_dual_edp(devdata, port);
>> > > +
>> > >  	if (is_dvi)
>> > >  		sanitize_ddc_pin(devdata, port);
>> > >  
>> > 
>> 
>

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-10-14 13:31 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-05 17:56 [Intel-gfx] [PATCH] drm/i915/bios: gracefully disable dual eDP for now Jani Nikula
2021-10-05 18:06 ` Ville Syrjälä
2021-10-05 19:30   ` Jani Nikula
2021-10-06  9:01     ` Ville Syrjälä
2021-10-05 20:21 ` Souza, Jose
2021-10-05 20:38   ` Jani Nikula
2021-10-05 20:41     ` Souza, Jose
2021-10-14 13:31       ` Jani Nikula
2021-10-05 23:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-10-06  4:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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