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From: Andrew Lunn <andrew@lunn.ch>
To: Jie Luo <quic_luoj@quicinc.com>
Cc: Luo Jie <luoj@codeaurora.org>,
	hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net,
	kuba@kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, sricharan@codeaurora.org
Subject: Re: [PATCH v3 06/13] net: phy: add qca8081 read_status
Date: Tue, 19 Oct 2021 14:31:57 +0200	[thread overview]
Message-ID: <YW66vT1HQsVfjZDz@lunn.ch> (raw)
In-Reply-To: <0472b75b-9fd7-55e3-dc1b-f33786643103@quicinc.com>

On Tue, Oct 19, 2021 at 08:10:15PM +0800, Jie Luo wrote:
> 
> On 10/19/2021 5:42 AM, Andrew Lunn wrote:
> > > +static int qca808x_read_status(struct phy_device *phydev)
> > > +{
> > > +	int ret;
> > > +
> > > +	ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
> > > +	if (ret < 0)
> > > +		return ret;
> > > +
> > > +	linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->lp_advertising,
> > > +			ret & MDIO_AN_10GBT_STAT_LP2_5G);
> > > +
> > Could genphy_c45_read_lpa() be used here?
> > 
> >        Andrew
> 
> Hi Andrew,
> 
> Thanks for the comments,  the MDIO_STAT1 of PHY does not follow the
> standard, bit0~bit6 of MDIO_STAT1 are
> 
> always 0, genphy_c45_read_lpa can't be used.

O.K. It is a shame the hardware partially follow the standard, but
breaks it as well. Why go to the effort of partially following it,
when you don't gain anything from it because you need custom code
anyway?

	Andrew

  reply	other threads:[~2021-10-19 12:32 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18  3:33 [PATCH v3 0/13] net: phy: Add qca8081 ethernet phy driver Luo Jie
2021-10-18  3:33 ` [PATCH v3 01/13] net: phy: at803x: replace AT803X_DEVICE_ADDR with MDIO_MMD_PCS Luo Jie
2021-10-18 18:33   ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 02/13] net: phy: at803x: use phy_modify() Luo Jie
2021-10-18 18:34   ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 03/13] net: phy: at803x: improve the WOL feature Luo Jie
2021-10-18 18:41   ` Andrew Lunn
2021-10-19 11:46     ` Jie Luo
2021-10-19 12:29       ` Andrew Lunn
2021-10-19 12:42         ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 04/13] net: phy: at803x: use GENMASK() for speed status Luo Jie
2021-10-18 18:41   ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 05/13] net: phy: add qca8081 ethernet phy driver Luo Jie
2021-10-18 18:47   ` Andrew Lunn
2021-10-19 11:48     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 06/13] net: phy: add qca8081 read_status Luo Jie
2021-10-18 21:42   ` Andrew Lunn
2021-10-19 12:10     ` Jie Luo
2021-10-19 12:31       ` Andrew Lunn [this message]
2021-10-19 12:48         ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 07/13] net: phy: add qca8081 get_features Luo Jie
2021-10-18 21:44   ` Andrew Lunn
2021-10-20  6:39     ` Jie Luo
2021-10-20 12:20       ` Andrew Lunn
2021-10-18  3:33 ` [PATCH v3 08/13] net: phy: add qca8081 config_aneg Luo Jie
2021-10-18 21:37   ` Andrew Lunn
2021-10-19 12:12     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 09/13] net: phy: add constants for fast retrain related register Luo Jie
2021-10-18  3:33 ` [PATCH v3 10/13] net: phy: add qca8081 config_init Luo Jie
2021-10-18 21:47   ` Andrew Lunn
2021-10-20  7:07     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 11/13] net: phy: add qca8081 soft_reset and enable master/slave seed Luo Jie
2021-10-18  3:33 ` [PATCH v3 12/13] net: phy: adjust qca8081 master/slave seed value if link down Luo Jie
2021-10-18 22:04   ` Andrew Lunn
2021-10-20 13:27     ` Jie Luo
2021-10-18  3:33 ` [PATCH v3 13/13] net: phy: add qca8081 cdt feature Luo Jie

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