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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id y2sm3095745pjl.6.2021.10.14.11.47.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Oct 2021 11:47:36 -0700 (PDT) Date: Thu, 14 Oct 2021 18:47:32 +0000 From: Sean Christopherson To: Lai Jiangshan Cc: linux-kernel@vger.kernel.org, Paolo Bonzini , Vitaly Kuznetsov , kvm@vger.kernel.org, Lai Jiangshan , Wanpeng Li , Jim Mattson , Joerg Roedel , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" Subject: Re: [PATCH 1/2] KVM: X86: Don't reset mmu context when X86_CR4_PCIDE 1->0 Message-ID: References: <20210919024246.89230-1-jiangshanlai@gmail.com> <20210919024246.89230-2-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210919024246.89230-2-jiangshanlai@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Sep 19, 2021, Lai Jiangshan wrote: > From: Lai Jiangshan > > X86_CR4_PCIDE doesn't participate in kvm_mmu_role, so the mmu context > doesn't need to be reset. It is only required to flush all the guest > tlb. > > Signed-off-by: Lai Jiangshan > --- > arch/x86/kvm/x86.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 86539c1686fa..7494ea0e7922 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -116,6 +116,7 @@ static void enter_smm(struct kvm_vcpu *vcpu); > static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); > static void store_regs(struct kvm_vcpu *vcpu); > static int sync_regs(struct kvm_vcpu *vcpu); > +static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu); > > static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2); > static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2); > @@ -1042,9 +1043,10 @@ EXPORT_SYMBOL_GPL(kvm_is_valid_cr4); > > void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4) > { > - if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) || > - (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE))) > + if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) > kvm_mmu_reset_context(vcpu); > + else if (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)) > + kvm_vcpu_flush_tlb_guest(vcpu); Unless there's a corner case I'm missing, I would prefer this to use kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu) instead of calling kvm_vcpu_flush_tlb_guest() directly. The odds of flushes actually being batched is low, it's more to document that kvm_post_set_cr4() _isn't_ special.