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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Oleksandr Andrushchenko <Oleksandr_Andrushchenko@epam.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	"julien@xen.org" <julien@xen.org>,
	"sstabellini@kernel.org" <sstabellini@kernel.org>,
	Oleksandr Tyshchenko <Oleksandr_Tyshchenko@epam.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	Artem Mygaiev <Artem_Mygaiev@epam.com>,
	"jbeulich@suse.com" <jbeulich@suse.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"george.dunlap@citrix.com" <george.dunlap@citrix.com>,
	"paul@xen.org" <paul@xen.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Rahul Singh <rahul.singh@arm.com>
Subject: Re: [PATCH v5 08/10] xen/arm: Setup MMIO range trap handlers for hardware domain
Date: Mon, 25 Oct 2021 15:40:36 +0200	[thread overview]
Message-ID: <YXaz1G1mvHzZHdxM@MacBook-Air-de-Roger.local> (raw)
In-Reply-To: <7f2a5875-69c9-b40b-287b-1355698598e5@epam.com>

On Mon, Oct 25, 2021 at 09:38:00AM +0000, Oleksandr Andrushchenko wrote:
> Hi, Roger!
> 
> On 13.10.21 13:11, Roger Pau Monné wrote:
> > On Fri, Oct 08, 2021 at 08:55:33AM +0300, Oleksandr Andrushchenko wrote:
> >> From: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
> >>
> >> In order for vPCI to work it needs to maintain guest and hardware
> >> domain's views of the configuration space. For example, BARs and
> >> COMMAND registers require emulation for guests and the guest view
> >> of the registers needs to be in sync with the real contents of the
> >> relevant registers. For that ECAM address space needs to also be
> >> trapped for the hardware domain, so we need to implement PCI host
> >> bridge specific callbacks to properly setup MMIO handlers for those
> >> ranges depending on particular host bridge implementation.
> >>
> >> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
> >> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> >> Reviewed-by: Rahul Singh <rahul.singh@arm.com>
> >> Tested-by: Rahul Singh <rahul.singh@arm.com>
> >> ---
> >> Since v3:
> >> - fixed comment formatting
> >> Since v2:
> >> - removed unneeded assignment (count = 0)
> >> - removed unneeded header inclusion
> >> - update commit message
> >> Since v1:
> >>   - Dynamically calculate the number of MMIO handlers required for vPCI
> >>     and update the total number accordingly
> >>   - s/clb/cb
> >>   - Do not introduce a new callback for MMIO handler setup
> >> ---
> >>   xen/arch/arm/domain.c              |  2 ++
> >>   xen/arch/arm/pci/pci-host-common.c | 28 ++++++++++++++++++++++++
> >>   xen/arch/arm/vpci.c                | 34 ++++++++++++++++++++++++++++++
> >>   xen/arch/arm/vpci.h                |  6 ++++++
> >>   xen/include/asm-arm/pci.h          |  5 +++++
> >>   5 files changed, 75 insertions(+)
> >>
> >> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> >> index 79012bf77757..fa6fcc5e467c 100644
> >> --- a/xen/arch/arm/domain.c
> >> +++ b/xen/arch/arm/domain.c
> >> @@ -733,6 +733,8 @@ int arch_domain_create(struct domain *d,
> >>       if ( (rc = domain_vgic_register(d, &count)) != 0 )
> >>           goto fail;
> >>   
> >> +    count += domain_vpci_get_num_mmio_handlers(d);
> >> +
> >>       if ( (rc = domain_io_init(d, count + MAX_IO_HANDLER)) != 0 )
> > IMO it might be better to convert the fixed array into a linked list,
> > I guess this made sense when Arm had a very limited number of mmio
> > trap handlers, but having to do all this accounting seems quite
> > tedious every time you want to add new handlers.
> Yes, I think we need to do so, but this improvement was not meant
> to be in this patch.

Ack, just wanted to raise that this model seems to be getting more
complex than just setting up a list.

> >> diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
> >> index 76c12b92814f..6e179cd3010b 100644
> >> --- a/xen/arch/arm/vpci.c
> >> +++ b/xen/arch/arm/vpci.c
> >> @@ -80,17 +80,51 @@ static const struct mmio_handler_ops vpci_mmio_handler = {
> >>       .write = vpci_mmio_write,
> >>   };
> >>   
> >> +static int vpci_setup_mmio_handler(struct domain *d,
> >> +                                   struct pci_host_bridge *bridge)
> >> +{
> >> +    struct pci_config_window *cfg = bridge->cfg;
> >> +
> >> +    register_mmio_handler(d, &vpci_mmio_handler,
> >> +                          cfg->phys_addr, cfg->size, NULL);
> > I'm confused here, don't you need to use a slightly different handler
> > for dom0 so that you can differentiate between the segments of the
> > host bridges?
> >
> > AFAICT the translation done by vpci_mmio_handler using MMCFG_BDF
> > always assume segment 0.
> You are absolutely right here: I can set up hwdom specific
> handlers, so I can properly translate the segment.
> On the other hand, when virtual bus topology added, the SBDF
> translation from virtual to physical SBDF resides in the Arm's
> vpci_mmio_{read|write}, like the below:
>      if ( priv->is_virt_ecam &&
>           !vpci_translate_virtual_device(v->domain, &sbdf) )
>              return 1;
> (BTW Jan asked in some other comment why it is Arm specific:
> I tend to keep it Arm specific until the point when x86 wants that
> as well. Until that point the code, if moved to common, will be
> unneeded and as Jan calls that "dead")
> So, I think that I can extend vpci_mmio_{read|write} to account
> on the hwdom like (virtual bus code is the future code):
> 
> static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
>                            register_t *r, void *p)
> {
> ...
>      struct vpci_mmio_priv *priv = (struct vpci_mmio_priv *)p;
> 
>      if ( priv->is_virt_ecam )
>          sbdf.sbdf = MMCFG_BDF(info->gpa); /* For virtual bus topology the segment is always 0. */
>      else
>      {
>          sbdf.sbdf = MMCFG_BDF(info->gpa);
>          sbdf.seg = priv->segment;
>      }
>      reg = REGISTER_OFFSET(info->gpa);
> 
> ...
>      /*
>       * For the passed through devices we need to map their virtual SBDF
>       * to the physical PCI device being passed through.
>       */
>      if ( priv->is_virt_ecam &&
>           !vpci_translate_virtual_device(v->domain, &sbdf) )
>              return 1;
> 
> Will it work for you?

Right, I guess it could work as long as the differences between the
hardware domain and the unprivileged ones are not too big.

The nice part about having different handlers is that you avoid a
bunch of conditionals (ie: no need to check for is_virt_ecam) which
makes the code easier to follow. OTOH it could introduce more code
duplication.

Thanks, Roger.


  reply	other threads:[~2021-10-25 13:41 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-08  5:55 [PATCH v5 00/10] PCI devices passthrough on Arm, part 2 Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 01/10] xen/arm: Add new device type for PCI Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 02/10] xen/arm: Introduce pci_find_host_bridge_node helper Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 03/10] xen/device-tree: Make dt_find_node_by_phandle global Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 04/10] xen/arm: Mark device as PCI while creating one Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 05/10] xen/domain: Call pci_release_devices() when releasing domain resources Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 06/10] libxl: Allow removing PCI devices for all types of domains Oleksandr Andrushchenko
2021-10-11 16:11   ` Anthony PERARD
2021-10-11 16:16     ` Oleksandr Andrushchenko
2021-10-25 13:14   ` Roger Pau Monné
2021-10-25 13:17     ` Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 07/10] libxl: Only map legacy PCI IRQs if they are supported Oleksandr Andrushchenko
2021-10-11 16:37   ` Anthony PERARD
2021-10-12  1:32     ` Stefano Stabellini
2021-10-25 13:22   ` Roger Pau Monné
2021-10-25 13:38     ` Oleksandr Andrushchenko
2021-10-25 13:46       ` Roger Pau Monné
2021-11-02 11:32       ` Jan Beulich
2021-11-02 11:37         ` Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 08/10] xen/arm: Setup MMIO range trap handlers for hardware domain Oleksandr Andrushchenko
2021-10-13 10:11   ` Roger Pau Monné
2021-10-25  9:38     ` Oleksandr Andrushchenko
2021-10-25 13:40       ` Roger Pau Monné [this message]
2021-10-25 13:47         ` Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 09/10] xen/arm: Do not map PCI ECAM and MMIO space to Domain-0's p2m Oleksandr Andrushchenko
2021-10-08 23:00   ` Stefano Stabellini
2021-10-13 16:17   ` Julien Grall
2021-10-25 11:37     ` Oleksandr Andrushchenko
2021-10-28 11:13       ` Julien Grall
2021-10-28 11:20         ` Oleksandr Andrushchenko
2021-10-08  5:55 ` [PATCH v5 10/10] xen/arm: Process pending vPCI map/unmap operations Oleksandr Andrushchenko
2021-10-13 15:30   ` Julien Grall
2021-10-25 11:24     ` Oleksandr Andrushchenko
2021-10-08 22:54 ` [PATCH v5 00/10] PCI devices passthrough on Arm, part 2 Stefano Stabellini

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