From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB336C433EF for ; Wed, 27 Oct 2021 14:26:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C0A8760F38 for ; Wed, 27 Oct 2021 14:26:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238066AbhJ0O3Q (ORCPT ); Wed, 27 Oct 2021 10:29:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238191AbhJ0O3J (ORCPT ); Wed, 27 Oct 2021 10:29:09 -0400 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB584C061767 for ; Wed, 27 Oct 2021 07:26:43 -0700 (PDT) Received: by mail-pj1-x1029.google.com with SMTP id oa12-20020a17090b1bcc00b0019f715462a8so2209471pjb.3 for ; Wed, 27 Oct 2021 07:26:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=iWwrbnSH9Fky5OxBApAzRFVpTKOaMHDs7Xrzkqa4bfHRvpB9pNrmqtwX5XStYSbIol NG6pr6of1LmRK/X8yeBvBQ0Fz8uYI6sCKWIvgmckbalOjA8rZIStxifaaVVG+5EdlLz8 2ckfTI/AHFWKc1rHQsrwcPVdrkLnqwK/drtGVgppY9agtMGjOEk436kI8PMz0SqSkGNT dkWDCvrzCBVDPIbGEr6AdGS2sCg8RuoXUFOHg6zS7uI1OSE10fKTNRuuwKsMoNZNiFkf iPVMGJAgypYBjZDhK8mjFm7rCt98R0DWG7pkzdEiPhkk3mMy819HFjaZfkrakLKQ8KAR Wy0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=1DYvrWlKccH0vZ/cqOvMevPhljgCXOQSLHrqfvdp4JCgeBtI+bqTUsmwvOwjMAlP0q 5c9qDQ3f07jj2E84rcHOS7tUG68MRh0r5TZlbIMAqzP1HTCiU2XnyACoFevQVubP/fAP MmWLvCfZ/2dlLspV1r90+w5MOcCECHYQQXM38q5r1lwi/Y8jZTdgyCcnNw0hk8lwB2a0 FOBKR/57QFYXls9tqKQiQuy3BfdO8PiX1Dt0gpGmUGdbo17di/c8HGjq88T+1ubvuL0L JiUi0fuXDnCV8iI4P3/rlcNC4+g27Ba3nA7/orMJks4bXfCO58ejwY78NzSCs8CbMt5k fSmg== X-Gm-Message-State: AOAM532BiqTsS6HYqXCoMgyNGjm33hmmKIpjTuh+MWnhWuUV1fNlbeLF o5WqFvxyz1G/8JjyGNZXHfOGSA== X-Google-Smtp-Source: ABdhPJzNj2nhULmp/RR7LS0ShzDRkQdxHUhFj7X33pr1fS/jZmoi4Y5oDiGoEdEWKdZH8tXcKWxvmw== X-Received: by 2002:a17:90b:11c2:: with SMTP id gv2mr5997881pjb.133.1635344802985; Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id n12sm37080pgh.55.2021.10.27.07.26.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Date: Wed, 27 Oct 2021 14:26:38 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Subject: Re: [PATCH v2 24/43] KVM: VMX: Drop pointless PI.NDST update when blocking Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-25-seanjc@google.com> <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 25, 2021, Paolo Bonzini wrote: > On 09/10/21 04:12, Sean Christopherson wrote: > > Don't update Posted Interrupt's NDST, a.k.a. the target pCPU, in the > > pre-block path, as NDST is guaranteed to be up-to-date. The comment > > about the vCPU being preempted during the update is simply wrong, as the > > update path runs with IRQs disabled (from before snapshotting vcpu->cpu, > > until after the update completes). > > Right, it didn't as of commit bf9f6ac8d74969690df1485b33b7c238ca9f2269 (when > VT-d posted interrupts were introduced). > > The interrupt disable/enable pair was added in the same commit that > motivated the introduction of the sanity checks: Ya, I found that commit when digging around for different commit in the series and forgot to come back to this changelog. I'll incorporate this info into the next version. > commit 8b306e2f3c41939ea528e6174c88cfbfff893ce1 > Author: Paolo Bonzini > Date: Tue Jun 6 12:57:05 2017 +0200 > > KVM: VMX: avoid double list add with VT-d posted interrupts > > In some cases, for example involving hot-unplug of assigned > devices, pi_post_block can forget to remove the vCPU from the > blocked_vcpu_list. When this happens, the next call to > pi_pre_block corrupts the list. > > Fix this in two ways. First, check vcpu->pre_pcpu in pi_pre_block > and WARN instead of adding the element twice in the list. Second, > always do the list removal in pi_post_block if vcpu->pre_pcpu is > set (not -1). > > The new code keeps interrupts disabled for the whole duration of > pi_pre_block/pi_post_block. This is not strictly necessary, but > easier to follow. For the same reason, PI.ON is checked only > after the cmpxchg, and to handle it we just call the post-block > code. This removes duplication of the list removal code. > > At the time, I didn't notice the now useless NDST update. > > Paolo > > > The vCPU can get preempted_before_ the update starts, but not during. > > And if the vCPU is preempted before, vmx_vcpu_pi_load() is responsible > > for updating NDST when the vCPU is scheduled back in. In that case, the > > check against the wakeup vector in vmx_vcpu_pi_load() cannot be true as > > that would require the notification vector to have been set to the wakeup > > vector_before_ blocking. > > > > Opportunistically switch to using vcpu->cpu for the list/lock lookups, > > which presumably used pre_pcpu only for some phantom preemption logic. > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16F04C433EF for ; Wed, 27 Oct 2021 14:27:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CEF8460E75 for ; Wed, 27 Oct 2021 14:27:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org CEF8460E75 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NIOlSfqK8ElFGACFhxxzMMGiM0GOU0Ecv59JBROMRB4=; b=oF6aE9gKe4Gsve r2XQAgmHarHTG38gF8jhbK2FE+AMlbTsX8iJ5hR5Kjzyt9SoIfAOv/cVOUT32FnPyBiZoYvQGBz8J WAM2V6zICWNfOMRedGX1p5dZ37Rv93LMdk3q0hmfEULkmSO9N+ujPaX06cf0Nv1LSa/1x3KjO9Sjb QJ5MUJ9AxdXGwJEC3pP0zCO/zJBeZHgHizGZG2S/K6VFRDAH0VovkJhPmX8f4oAqWcrzehKwb9fMA BmWRgfpwEBKyklgUksREFYnv91uLEY2/B8+EQs2euhONtVie+ly71emMNTTgS3EG9ZYaTEr4Tww/g +kpKXlftJTWN408tQF8Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfjtJ-0056tW-VP; Wed, 27 Oct 2021 14:26:58 +0000 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfjt6-0056q8-BA for linux-riscv@lists.infradead.org; Wed, 27 Oct 2021 14:26:45 +0000 Received: by mail-pl1-x631.google.com with SMTP id r5so2144647pls.1 for ; Wed, 27 Oct 2021 07:26:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=iWwrbnSH9Fky5OxBApAzRFVpTKOaMHDs7Xrzkqa4bfHRvpB9pNrmqtwX5XStYSbIol NG6pr6of1LmRK/X8yeBvBQ0Fz8uYI6sCKWIvgmckbalOjA8rZIStxifaaVVG+5EdlLz8 2ckfTI/AHFWKc1rHQsrwcPVdrkLnqwK/drtGVgppY9agtMGjOEk436kI8PMz0SqSkGNT dkWDCvrzCBVDPIbGEr6AdGS2sCg8RuoXUFOHg6zS7uI1OSE10fKTNRuuwKsMoNZNiFkf iPVMGJAgypYBjZDhK8mjFm7rCt98R0DWG7pkzdEiPhkk3mMy819HFjaZfkrakLKQ8KAR Wy0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=D4/umAHs5Mv5uf4RZFTJUsc3zrSOALHZ38aLAh4r2hu73LK2szhMycvuLOn3/OQSxR gsECMX6su/MKDpH1dsXWFUtofi6PXk1/yOIlsYDJDZdohD2uz6yEP3vvbtgJ3tp7Z0nb ytX5Sha+rasrPFbsEBOoDDnu4qijSGApR9c2Gyz9IRh3NfLHwIDkNSh6JNjGWZ70LdgK Yufk0Nq/EKIL1ASLbxI9n0TRi/vyFuyQxI+ShrIbEiSxGPpKUqrRoJaC4rAafZzyZMxo KU3UZv8X03g6Rf0/7WCwRT/d2+axuv2rxHvY5K/kBVfHY4rQ2kgovlQD4uZxJtIa7s9Z Dhdw== X-Gm-Message-State: AOAM531nQeC+7Kj34yZslqJZW5D427A4gvlSQDQ32LOA5N/36B3azPoP /MkhSO5qIC+uYJc2XtFqr0BxBg== X-Google-Smtp-Source: ABdhPJzNj2nhULmp/RR7LS0ShzDRkQdxHUhFj7X33pr1fS/jZmoi4Y5oDiGoEdEWKdZH8tXcKWxvmw== X-Received: by 2002:a17:90b:11c2:: with SMTP id gv2mr5997881pjb.133.1635344802985; Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id n12sm37080pgh.55.2021.10.27.07.26.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Date: Wed, 27 Oct 2021 14:26:38 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Subject: Re: [PATCH v2 24/43] KVM: VMX: Drop pointless PI.NDST update when blocking Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-25-seanjc@google.com> <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211027_072644_421005_C270D091 X-CRM114-Status: GOOD ( 26.77 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Oct 25, 2021, Paolo Bonzini wrote: > On 09/10/21 04:12, Sean Christopherson wrote: > > Don't update Posted Interrupt's NDST, a.k.a. the target pCPU, in the > > pre-block path, as NDST is guaranteed to be up-to-date. The comment > > about the vCPU being preempted during the update is simply wrong, as the > > update path runs with IRQs disabled (from before snapshotting vcpu->cpu, > > until after the update completes). > > Right, it didn't as of commit bf9f6ac8d74969690df1485b33b7c238ca9f2269 (when > VT-d posted interrupts were introduced). > > The interrupt disable/enable pair was added in the same commit that > motivated the introduction of the sanity checks: Ya, I found that commit when digging around for different commit in the series and forgot to come back to this changelog. I'll incorporate this info into the next version. > commit 8b306e2f3c41939ea528e6174c88cfbfff893ce1 > Author: Paolo Bonzini > Date: Tue Jun 6 12:57:05 2017 +0200 > > KVM: VMX: avoid double list add with VT-d posted interrupts > > In some cases, for example involving hot-unplug of assigned > devices, pi_post_block can forget to remove the vCPU from the > blocked_vcpu_list. When this happens, the next call to > pi_pre_block corrupts the list. > > Fix this in two ways. First, check vcpu->pre_pcpu in pi_pre_block > and WARN instead of adding the element twice in the list. Second, > always do the list removal in pi_post_block if vcpu->pre_pcpu is > set (not -1). > > The new code keeps interrupts disabled for the whole duration of > pi_pre_block/pi_post_block. This is not strictly necessary, but > easier to follow. For the same reason, PI.ON is checked only > after the cmpxchg, and to handle it we just call the post-block > code. This removes duplication of the list removal code. > > At the time, I didn't notice the now useless NDST update. > > Paolo > > > The vCPU can get preempted_before_ the update starts, but not during. > > And if the vCPU is preempted before, vmx_vcpu_pi_load() is responsible > > for updating NDST when the vCPU is scheduled back in. In that case, the > > check against the wakeup vector in vmx_vcpu_pi_load() cannot be true as > > that would require the notification vector to have been set to the wakeup > > vector_before_ blocking. > > > > Opportunistically switch to using vcpu->cpu for the list/lock lookups, > > which presumably used pre_pcpu only for some phantom preemption logic. > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC097C433FE for ; Wed, 27 Oct 2021 14:26:49 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 3B20260F9B for ; Wed, 27 Oct 2021 14:26:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3B20260F9B Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 8A0444B1A0; Wed, 27 Oct 2021 10:26:48 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Authentication-Results: mm01.cs.columbia.edu (amavisd-new); dkim=softfail (fail, message has been altered) header.i=@google.com Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Q9ztcA51miUK; Wed, 27 Oct 2021 10:26:47 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 009C24B15A; Wed, 27 Oct 2021 10:26:47 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 2FE1C4B154 for ; Wed, 27 Oct 2021 10:26:45 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ggSjUklmBFzD for ; Wed, 27 Oct 2021 10:26:44 -0400 (EDT) Received: from mail-pl1-f173.google.com (mail-pl1-f173.google.com [209.85.214.173]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 0CD9B4B136 for ; Wed, 27 Oct 2021 10:26:44 -0400 (EDT) Received: by mail-pl1-f173.google.com with SMTP id v20so2114824plo.7 for ; Wed, 27 Oct 2021 07:26:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=iWwrbnSH9Fky5OxBApAzRFVpTKOaMHDs7Xrzkqa4bfHRvpB9pNrmqtwX5XStYSbIol NG6pr6of1LmRK/X8yeBvBQ0Fz8uYI6sCKWIvgmckbalOjA8rZIStxifaaVVG+5EdlLz8 2ckfTI/AHFWKc1rHQsrwcPVdrkLnqwK/drtGVgppY9agtMGjOEk436kI8PMz0SqSkGNT dkWDCvrzCBVDPIbGEr6AdGS2sCg8RuoXUFOHg6zS7uI1OSE10fKTNRuuwKsMoNZNiFkf iPVMGJAgypYBjZDhK8mjFm7rCt98R0DWG7pkzdEiPhkk3mMy819HFjaZfkrakLKQ8KAR Wy0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=cajBOknmmaOQiEd2AmoQqKc8jg89If9Eha9Dg5Is6sC6CrY3dS1DR8+mU2Pw3HfMrw SL1o6hKso21U6DPOxEvQH+xSsEGVvif/G00T3iUIpE4HbJys5HXexpdBwazlAfv/68iD ZYGTFGkickJik7AuMJYolRZ8T3QftDSah3AJZSftdNes58c8kHItk/rNtGLharlN89+k 7kvNaQrvUSjWFT4S3U6r8CgC7ov7a9fXjFX+ZXemHG99YDvXeoYBAPXuvRDm01JehpMQ A2POBFWFNknxGnBiieEFVuXW0Eoy5riibMXNU6UPMbnTP+PIsp0XBxLOg69YIzdfy0Cp MiFg== X-Gm-Message-State: AOAM5301+3M6AUjyWRnXIJxBdawhMo0SyKpx1nw5wM6o/D/0T0lklgS5 gyo+n3+CSF8mFORyrK8qoHxQ/w== X-Google-Smtp-Source: ABdhPJzNj2nhULmp/RR7LS0ShzDRkQdxHUhFj7X33pr1fS/jZmoi4Y5oDiGoEdEWKdZH8tXcKWxvmw== X-Received: by 2002:a17:90b:11c2:: with SMTP id gv2mr5997881pjb.133.1635344802985; Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id n12sm37080pgh.55.2021.10.27.07.26.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Date: Wed, 27 Oct 2021 14:26:38 +0000 From: Sean Christopherson To: Paolo Bonzini Subject: Re: [PATCH v2 24/43] KVM: VMX: Drop pointless PI.NDST update when blocking Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-25-seanjc@google.com> <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> Cc: Cornelia Huck , Wanpeng Li , kvm@vger.kernel.org, David Hildenbrand , linux-kernel@vger.kernel.org, Paul Mackerras , Atish Patra , linux-riscv@lists.infradead.org, Claudio Imbrenda , kvmarm@lists.cs.columbia.edu, Janosch Frank , Marc Zyngier , Joerg Roedel , Huacai Chen , Christian Borntraeger , Aleksandar Markovic , Albert Ou , kvm-ppc@vger.kernel.org, Paul Walmsley , David Matlack , linux-arm-kernel@lists.infradead.org, Jim Mattson , Anup Patel , linux-mips@vger.kernel.org, Palmer Dabbelt , kvm-riscv@lists.infradead.org, Vitaly Kuznetsov X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Mon, Oct 25, 2021, Paolo Bonzini wrote: > On 09/10/21 04:12, Sean Christopherson wrote: > > Don't update Posted Interrupt's NDST, a.k.a. the target pCPU, in the > > pre-block path, as NDST is guaranteed to be up-to-date. The comment > > about the vCPU being preempted during the update is simply wrong, as the > > update path runs with IRQs disabled (from before snapshotting vcpu->cpu, > > until after the update completes). > > Right, it didn't as of commit bf9f6ac8d74969690df1485b33b7c238ca9f2269 (when > VT-d posted interrupts were introduced). > > The interrupt disable/enable pair was added in the same commit that > motivated the introduction of the sanity checks: Ya, I found that commit when digging around for different commit in the series and forgot to come back to this changelog. I'll incorporate this info into the next version. > commit 8b306e2f3c41939ea528e6174c88cfbfff893ce1 > Author: Paolo Bonzini > Date: Tue Jun 6 12:57:05 2017 +0200 > > KVM: VMX: avoid double list add with VT-d posted interrupts > > In some cases, for example involving hot-unplug of assigned > devices, pi_post_block can forget to remove the vCPU from the > blocked_vcpu_list. When this happens, the next call to > pi_pre_block corrupts the list. > > Fix this in two ways. First, check vcpu->pre_pcpu in pi_pre_block > and WARN instead of adding the element twice in the list. Second, > always do the list removal in pi_post_block if vcpu->pre_pcpu is > set (not -1). > > The new code keeps interrupts disabled for the whole duration of > pi_pre_block/pi_post_block. This is not strictly necessary, but > easier to follow. For the same reason, PI.ON is checked only > after the cmpxchg, and to handle it we just call the post-block > code. This removes duplication of the list removal code. > > At the time, I didn't notice the now useless NDST update. > > Paolo > > > The vCPU can get preempted_before_ the update starts, but not during. > > And if the vCPU is preempted before, vmx_vcpu_pi_load() is responsible > > for updating NDST when the vCPU is scheduled back in. In that case, the > > check against the wakeup vector in vmx_vcpu_pi_load() cannot be true as > > that would require the notification vector to have been set to the wakeup > > vector_before_ blocking. > > > > Opportunistically switch to using vcpu->cpu for the list/lock lookups, > > which presumably used pre_pcpu only for some phantom preemption logic. > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA878C433EF for ; Wed, 27 Oct 2021 14:28:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A9A1B603E5 for ; Wed, 27 Oct 2021 14:28:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org A9A1B603E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zdNvVYXP+aGI3VYPaDHtJKCU6dJUQ5iqqWFYYw8RBTo=; b=YfCUIHv91s2aCc KJ1B64NjFj16lyIdJIgN7j37+l5qRmp+EnM6vqaArLVJxd1bVVrao/dbWKt7L5QrAGYX4EEqZ1SSR 5ELLFw+abGkMdZRvW0x/MSCP967ruBhqU625EmElUKSovqExHI/3zYQMYQQl+JsHvs7YrIspMbB3X IPwLPs20Nr02jtGPOKwoNkYd8CF5lSO0f+S57NARE4Q9ZRVWp8Ipi73ZTXLBhvmx12E1Re23yP561 CNPXQLrt2k9BY86uzf4M6HiedEENQ3Ehq/t5ylkwPsAlXmR+eyKa0ye8GK4Pjuu8KWJ9l+YY8845x SDoqIMItZT/NATrIvclQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfjt9-0056rB-Tt; Wed, 27 Oct 2021 14:26:48 +0000 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfjt6-0056qB-CX for linux-arm-kernel@lists.infradead.org; Wed, 27 Oct 2021 14:26:45 +0000 Received: by mail-pl1-x635.google.com with SMTP id c4so2096310plg.13 for ; Wed, 27 Oct 2021 07:26:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=iWwrbnSH9Fky5OxBApAzRFVpTKOaMHDs7Xrzkqa4bfHRvpB9pNrmqtwX5XStYSbIol NG6pr6of1LmRK/X8yeBvBQ0Fz8uYI6sCKWIvgmckbalOjA8rZIStxifaaVVG+5EdlLz8 2ckfTI/AHFWKc1rHQsrwcPVdrkLnqwK/drtGVgppY9agtMGjOEk436kI8PMz0SqSkGNT dkWDCvrzCBVDPIbGEr6AdGS2sCg8RuoXUFOHg6zS7uI1OSE10fKTNRuuwKsMoNZNiFkf iPVMGJAgypYBjZDhK8mjFm7rCt98R0DWG7pkzdEiPhkk3mMy819HFjaZfkrakLKQ8KAR Wy0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=LMqODRZlF8nHhJs02sWnsNzJB8DCwjwV772Lcvk4X9o=; b=nJXS3O1SENDHlpz7bgU+7Ldzu+phcz/a5JHWSnWcsvXxd8VlS+eUULeosUF579Y6Wj pFx10QLQND/msiPXr2ymjpzHJl7VLiRQTVSyByn6EKiHykzdatBlLZxO9OWxsA7+JyRs KQzjC6GkglihG/jORfVvspKMeviO9hYfzGA4IJjPPn8q5LVAXs5v44d8x6s+A4tu/kzi 26DNi/D6zji5tjpAMu8oB9uaJ9ZGWLQWF6qhQNCOlOTirFjTUhc9sb23TKA6UcaOmEGp /kRxKc9rOsOVRIA+iUCYfp0dtH6tChWe5pMuTTfYRr735b9ChxtRrS8yGHvclt0pRiW6 Qahg== X-Gm-Message-State: AOAM533n79aKT2txyHJ9cJUS7P3GqAjLTdMjG6eAf8eWHZXOEsyvccrv iNmxbNU+GffBIfWr9Cw1/edLnw== X-Google-Smtp-Source: ABdhPJzNj2nhULmp/RR7LS0ShzDRkQdxHUhFj7X33pr1fS/jZmoi4Y5oDiGoEdEWKdZH8tXcKWxvmw== X-Received: by 2002:a17:90b:11c2:: with SMTP id gv2mr5997881pjb.133.1635344802985; Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id n12sm37080pgh.55.2021.10.27.07.26.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Oct 2021 07:26:42 -0700 (PDT) Date: Wed, 27 Oct 2021 14:26:38 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Subject: Re: [PATCH v2 24/43] KVM: VMX: Drop pointless PI.NDST update when blocking Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-25-seanjc@google.com> <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <18e6a656-f583-0ad4-6770-9678be3f5cf4@redhat.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211027_072644_442897_81014A87 X-CRM114-Status: GOOD ( 28.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Oct 25, 2021, Paolo Bonzini wrote: > On 09/10/21 04:12, Sean Christopherson wrote: > > Don't update Posted Interrupt's NDST, a.k.a. the target pCPU, in the > > pre-block path, as NDST is guaranteed to be up-to-date. The comment > > about the vCPU being preempted during the update is simply wrong, as the > > update path runs with IRQs disabled (from before snapshotting vcpu->cpu, > > until after the update completes). > > Right, it didn't as of commit bf9f6ac8d74969690df1485b33b7c238ca9f2269 (when > VT-d posted interrupts were introduced). > > The interrupt disable/enable pair was added in the same commit that > motivated the introduction of the sanity checks: Ya, I found that commit when digging around for different commit in the series and forgot to come back to this changelog. I'll incorporate this info into the next version. > commit 8b306e2f3c41939ea528e6174c88cfbfff893ce1 > Author: Paolo Bonzini > Date: Tue Jun 6 12:57:05 2017 +0200 > > KVM: VMX: avoid double list add with VT-d posted interrupts > > In some cases, for example involving hot-unplug of assigned > devices, pi_post_block can forget to remove the vCPU from the > blocked_vcpu_list. When this happens, the next call to > pi_pre_block corrupts the list. > > Fix this in two ways. First, check vcpu->pre_pcpu in pi_pre_block > and WARN instead of adding the element twice in the list. Second, > always do the list removal in pi_post_block if vcpu->pre_pcpu is > set (not -1). > > The new code keeps interrupts disabled for the whole duration of > pi_pre_block/pi_post_block. This is not strictly necessary, but > easier to follow. For the same reason, PI.ON is checked only > after the cmpxchg, and to handle it we just call the post-block > code. This removes duplication of the list removal code. > > At the time, I didn't notice the now useless NDST update. > > Paolo > > > The vCPU can get preempted_before_ the update starts, but not during. > > And if the vCPU is preempted before, vmx_vcpu_pi_load() is responsible > > for updating NDST when the vCPU is scheduled back in. In that case, the > > check against the wakeup vector in vmx_vcpu_pi_load() cannot be true as > > that would require the notification vector to have been set to the wakeup > > vector_before_ blocking. > > > > Opportunistically switch to using vcpu->cpu for the list/lock lookups, > > which presumably used pre_pcpu only for some phantom preemption logic. > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel