From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9504EC433FE for ; Thu, 28 Oct 2021 17:19:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7445760D07 for ; Thu, 28 Oct 2021 17:19:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230478AbhJ1RWJ (ORCPT ); Thu, 28 Oct 2021 13:22:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230420AbhJ1RWH (ORCPT ); Thu, 28 Oct 2021 13:22:07 -0400 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 478ADC061767 for ; Thu, 28 Oct 2021 10:19:40 -0700 (PDT) Received: by mail-pj1-x1032.google.com with SMTP id q2-20020a17090a2e0200b001a0fd4efd49so5708753pjd.1 for ; Thu, 28 Oct 2021 10:19:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=q4iJG3ZW7obL4DMmrtDt5ktj041PvD+dEvmTQN+uKyY=; b=mnkWkJlsD3Efv+dhabg9XRW3VcAMBFLrAWU0a5kq4aSl4p3OkuIs64Ri3PE1R6G45W WWX1srIjeyGp7bl0JwXP4EsqbWo0C7Rq7LlpprSwJJDhP6Z9C4BlGZ6pF0W6uFPVwJd6 newuZGIp7fi3S1LWbDnukcAYyKzMEUnwUDvBD8yhO2TaY/ppfXW+LzQN7N/3ahTyR+Xa EoqLzmvlkN3t1dBGcUsabuqlQMThWwYqrYkPzmYbFq4TCGSH1FBWF6bLFrKhvfl+wIkg myDgbOosQ39NTrE5GkyLOk3F2ofMqkvjX3mEfa4Ds01sxY6mlbwLLtW+SYgm0DJ0rLj4 pK7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=q4iJG3ZW7obL4DMmrtDt5ktj041PvD+dEvmTQN+uKyY=; b=QWdaIptYmyJl/CobrdKIvcG0xv5ZoZc6DbywaQsTw+vO7uIteCjcm4/ddWBJ2rypzv gj563pH3EoQruLUFbHDcbI9SAjZoKd1p0VQzXwwga7R8fFnIYo3/enSe39DyqeuvvpMH PgoUM9TeNhbFP3hnilt0z+/SHixT2TuFb+aDuop36R6zyeKeOdRWYjbzOPV+KUf40WcA KIXk2a/EnJgnm67TEcCqWYRW5S3HqrQTDyIN8Jwo48jjNdEth7yIVeFPaAyp3qDeiN63 SjdQ0fXKpKuX2FHbcE6SXJXckspgtcTAoqDsDsDjy4EHEY5PnUks9GbdicOHr6fzqK9N 1mrw== X-Gm-Message-State: AOAM531QCqlMC5X3BpIZA/lY4kxNDxFTv52F7XroB772M6OzAt0p0rE2 n5+cFuzWlKL3ZHybonVa2Hce1A== X-Google-Smtp-Source: ABdhPJybd062Z7dZdlv5Ua0y9WgXsZDlcpD/ngOKZtR+XtlO0zPIxbocuXwUccJIVKZ7ltOnF8e4MQ== X-Received: by 2002:a17:90a:b105:: with SMTP id z5mr5854314pjq.181.1635441579540; Thu, 28 Oct 2021 10:19:39 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id d24sm3945465pfn.62.2021.10.28.10.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Oct 2021 10:19:38 -0700 (PDT) Date: Thu, 28 Oct 2021 17:19:34 +0000 From: Sean Christopherson To: Maxim Levitsky Cc: Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Subject: Re: [PATCH v2 28/43] KVM: VMX: Remove vCPU from PI wakeup list before updating PID.NV Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-29-seanjc@google.com> <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 28, 2021, Maxim Levitsky wrote: > On Fri, 2021-10-08 at 19:12 -0700, Sean Christopherson wrote: > > Remove the vCPU from the wakeup list before updating the notification > > vector in the posted interrupt post-block helper. There is no need to > > wake the current vCPU as it is by definition not blocking. Practically > > speaking this is a nop as it only shaves a few meager cycles in the > > unlikely case that the vCPU was migrated and the previous pCPU gets a > > wakeup IRQ right before PID.NV is updated. The real motivation is to > > allow for more readable code in the future, when post-block is merged > > with vmx_vcpu_pi_load(), at which point removal from the list will be > > conditional on the old notification vector. > > > > Opportunistically add comments to document why KVM has a per-CPU spinlock > > that, at first glance, appears to be taken only on the owning CPU. > > Explicitly call out that the spinlock must be taken with IRQs disabled, a > > detail that was "lost" when KVM switched from spin_lock_irqsave() to > > spin_lock(), with IRQs disabled for the entirety of the relevant path. > > > > Signed-off-by: Sean Christopherson > > --- > > arch/x86/kvm/vmx/posted_intr.c | 49 +++++++++++++++++++++++----------- > > 1 file changed, 33 insertions(+), 16 deletions(-) > > > > diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c > > index 2b2206339174..901b7a5f7777 100644 > > --- a/arch/x86/kvm/vmx/posted_intr.c > > +++ b/arch/x86/kvm/vmx/posted_intr.c > > @@ -10,10 +10,22 @@ > > #include "vmx.h" > > > > /* > > - * We maintain a per-CPU linked-list of vCPU, so in wakeup_handler() we > > - * can find which vCPU should be waken up. > > + * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler() > Nit: While at it, it would be nice to rename this to pi_wakeup_hanlder() so > that it can be more easilly found. Ah, good catch. > > + * when a WAKEUP_VECTOR interrupted is posted. vCPUs are added to the list when > > + * the vCPU is scheduled out and is blocking (e.g. in HLT) with IRQs enabled. > s/interrupted/interrupt ? > > Isn't that comment incorrect? As I see, the PI hardware is setup to use the WAKEUP_VECTOR > when vcpu blocks (in pi_pre_block) and then that vcpu is added to the list. > The pi_wakeup_hanlder just goes over the list and wakes up all vcpus on the lsit. Doh, yes. This patch is predicting the future. The comment becomes correct as of KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load but as of this patch the "scheduled out" piece doesn't hold true. > > + * The vCPUs posted interrupt descriptor is updated at the same time to set its > > + * notification vector to WAKEUP_VECTOR, so that posted interrupt from devices > > + * wake the target vCPUs. vCPUs are removed from the list and the notification > > + * vector is reset when the vCPU is scheduled in. > > */ > > static DEFINE_PER_CPU(struct list_head, blocked_vcpu_on_cpu); > Also while at it, why not to rename this to 'blocked_vcpu_list'? > to explain that this is list of blocked vcpus. Its a per-cpu variable > so 'on_cpu' suffix isn't needed IMHO. As you noted, addressed in a future patch. > > +/* > > + * Protect the per-CPU list with a per-CPU spinlock to handle task migration. > > + * When a blocking vCPU is awakened _and_ migrated to a different pCPU, the > > + * ->sched_in() path will need to take the vCPU off the list of the _previous_ > > + * CPU. IRQs must be disabled when taking this lock, otherwise deadlock will > > + * occur if a wakeup IRQ arrives and attempts to acquire the lock. > > + */ > > static DEFINE_PER_CPU(spinlock_t, blocked_vcpu_on_cpu_lock); > > > > static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu) > > @@ -101,23 +113,28 @@ static void __pi_post_block(struct kvm_vcpu *vcpu) > > WARN(pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR, > > "Wakeup handler not enabled while the vCPU was blocking"); > > > > - dest = cpu_physical_id(vcpu->cpu); > > - if (!x2apic_mode) > > - dest = (dest << 8) & 0xFF00; > > - > > - do { > > - old.control = new.control = READ_ONCE(pi_desc->control); > > - > > - new.ndst = dest; > > - > > - /* set 'NV' to 'notification vector' */ > > - new.nv = POSTED_INTR_VECTOR; > > - } while (cmpxchg64(&pi_desc->control, old.control, > > - new.control) != old.control); > > - > > + /* > > + * Remove the vCPU from the wakeup list of the _previous_ pCPU, which > > + * will not be the same as the current pCPU if the task was migrated. > > + */ > > spin_lock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > list_del(&vcpu->blocked_vcpu_list); > > spin_unlock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > + > > + dest = cpu_physical_id(vcpu->cpu); > > + if (!x2apic_mode) > > + dest = (dest << 8) & 0xFF00; > It would be nice to have a function for this, this appears in this file twice. > Maybe there is a function already somewhere? The second instance does go away by the aforementioned: KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load I'm inclined to say we don't want a helper because there should only ever be one path that changes PI.ndst. But a comment would definitely help to explain the difference between xAPIC and x2APIC IDs. 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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id d24sm3945465pfn.62.2021.10.28.10.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Oct 2021 10:19:38 -0700 (PDT) Date: Thu, 28 Oct 2021 17:19:34 +0000 From: Sean Christopherson To: Maxim Levitsky Cc: Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Subject: Re: [PATCH v2 28/43] KVM: VMX: Remove vCPU from PI wakeup list before updating PID.NV Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-29-seanjc@google.com> <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211028_101940_838099_B41613F4 X-CRM114-Status: GOOD ( 44.90 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Oct 28, 2021, Maxim Levitsky wrote: > On Fri, 2021-10-08 at 19:12 -0700, Sean Christopherson wrote: > > Remove the vCPU from the wakeup list before updating the notification > > vector in the posted interrupt post-block helper. There is no need to > > wake the current vCPU as it is by definition not blocking. Practically > > speaking this is a nop as it only shaves a few meager cycles in the > > unlikely case that the vCPU was migrated and the previous pCPU gets a > > wakeup IRQ right before PID.NV is updated. The real motivation is to > > allow for more readable code in the future, when post-block is merged > > with vmx_vcpu_pi_load(), at which point removal from the list will be > > conditional on the old notification vector. > > > > Opportunistically add comments to document why KVM has a per-CPU spinlock > > that, at first glance, appears to be taken only on the owning CPU. > > Explicitly call out that the spinlock must be taken with IRQs disabled, a > > detail that was "lost" when KVM switched from spin_lock_irqsave() to > > spin_lock(), with IRQs disabled for the entirety of the relevant path. > > > > Signed-off-by: Sean Christopherson > > --- > > arch/x86/kvm/vmx/posted_intr.c | 49 +++++++++++++++++++++++----------- > > 1 file changed, 33 insertions(+), 16 deletions(-) > > > > diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c > > index 2b2206339174..901b7a5f7777 100644 > > --- a/arch/x86/kvm/vmx/posted_intr.c > > +++ b/arch/x86/kvm/vmx/posted_intr.c > > @@ -10,10 +10,22 @@ > > #include "vmx.h" > > > > /* > > - * We maintain a per-CPU linked-list of vCPU, so in wakeup_handler() we > > - * can find which vCPU should be waken up. > > + * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler() > Nit: While at it, it would be nice to rename this to pi_wakeup_hanlder() so > that it can be more easilly found. Ah, good catch. > > + * when a WAKEUP_VECTOR interrupted is posted. vCPUs are added to the list when > > + * the vCPU is scheduled out and is blocking (e.g. in HLT) with IRQs enabled. > s/interrupted/interrupt ? > > Isn't that comment incorrect? As I see, the PI hardware is setup to use the WAKEUP_VECTOR > when vcpu blocks (in pi_pre_block) and then that vcpu is added to the list. > The pi_wakeup_hanlder just goes over the list and wakes up all vcpus on the lsit. Doh, yes. This patch is predicting the future. The comment becomes correct as of KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load but as of this patch the "scheduled out" piece doesn't hold true. > > + * The vCPUs posted interrupt descriptor is updated at the same time to set its > > + * notification vector to WAKEUP_VECTOR, so that posted interrupt from devices > > + * wake the target vCPUs. vCPUs are removed from the list and the notification > > + * vector is reset when the vCPU is scheduled in. > > */ > > static DEFINE_PER_CPU(struct list_head, blocked_vcpu_on_cpu); > Also while at it, why not to rename this to 'blocked_vcpu_list'? > to explain that this is list of blocked vcpus. Its a per-cpu variable > so 'on_cpu' suffix isn't needed IMHO. As you noted, addressed in a future patch. > > +/* > > + * Protect the per-CPU list with a per-CPU spinlock to handle task migration. > > + * When a blocking vCPU is awakened _and_ migrated to a different pCPU, the > > + * ->sched_in() path will need to take the vCPU off the list of the _previous_ > > + * CPU. IRQs must be disabled when taking this lock, otherwise deadlock will > > + * occur if a wakeup IRQ arrives and attempts to acquire the lock. > > + */ > > static DEFINE_PER_CPU(spinlock_t, blocked_vcpu_on_cpu_lock); > > > > static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu) > > @@ -101,23 +113,28 @@ static void __pi_post_block(struct kvm_vcpu *vcpu) > > WARN(pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR, > > "Wakeup handler not enabled while the vCPU was blocking"); > > > > - dest = cpu_physical_id(vcpu->cpu); > > - if (!x2apic_mode) > > - dest = (dest << 8) & 0xFF00; > > - > > - do { > > - old.control = new.control = READ_ONCE(pi_desc->control); > > - > > - new.ndst = dest; > > - > > - /* set 'NV' to 'notification vector' */ > > - new.nv = POSTED_INTR_VECTOR; > > - } while (cmpxchg64(&pi_desc->control, old.control, > > - new.control) != old.control); > > - > > + /* > > + * Remove the vCPU from the wakeup list of the _previous_ pCPU, which > > + * will not be the same as the current pCPU if the task was migrated. > > + */ > > spin_lock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > list_del(&vcpu->blocked_vcpu_list); > > spin_unlock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > + > > + dest = cpu_physical_id(vcpu->cpu); > > + if (!x2apic_mode) > > + dest = (dest << 8) & 0xFF00; > It would be nice to have a function for this, this appears in this file twice. > Maybe there is a function already somewhere? The second instance does go away by the aforementioned: KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load I'm inclined to say we don't want a helper because there should only ever be one path that changes PI.ndst. But a comment would definitely help to explain the difference between xAPIC and x2APIC IDs. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61449C433F5 for ; Thu, 28 Oct 2021 17:19:46 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id D5F18610FC for ; Thu, 28 Oct 2021 17:19:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D5F18610FC Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 4ECA94B1DC; Thu, 28 Oct 2021 13:19:45 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Authentication-Results: mm01.cs.columbia.edu (amavisd-new); dkim=softfail (fail, message has been altered) header.i=@google.com Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rneKcaJ5-O-8; Thu, 28 Oct 2021 13:19:43 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 90BD34B172; Thu, 28 Oct 2021 13:19:43 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 49F984B0DF for ; Thu, 28 Oct 2021 13:19:42 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id g1-91eTIim-F for ; Thu, 28 Oct 2021 13:19:40 -0400 (EDT) Received: from mail-pj1-f53.google.com (mail-pj1-f53.google.com [209.85.216.53]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 9AFF94B0DD for ; Thu, 28 Oct 2021 13:19:40 -0400 (EDT) Received: by mail-pj1-f53.google.com with SMTP id lx5-20020a17090b4b0500b001a262880e99so5286339pjb.5 for ; Thu, 28 Oct 2021 10:19:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=q4iJG3ZW7obL4DMmrtDt5ktj041PvD+dEvmTQN+uKyY=; b=mnkWkJlsD3Efv+dhabg9XRW3VcAMBFLrAWU0a5kq4aSl4p3OkuIs64Ri3PE1R6G45W WWX1srIjeyGp7bl0JwXP4EsqbWo0C7Rq7LlpprSwJJDhP6Z9C4BlGZ6pF0W6uFPVwJd6 newuZGIp7fi3S1LWbDnukcAYyKzMEUnwUDvBD8yhO2TaY/ppfXW+LzQN7N/3ahTyR+Xa EoqLzmvlkN3t1dBGcUsabuqlQMThWwYqrYkPzmYbFq4TCGSH1FBWF6bLFrKhvfl+wIkg myDgbOosQ39NTrE5GkyLOk3F2ofMqkvjX3mEfa4Ds01sxY6mlbwLLtW+SYgm0DJ0rLj4 pK7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=q4iJG3ZW7obL4DMmrtDt5ktj041PvD+dEvmTQN+uKyY=; b=2wQwcZ8XPKsBkBZV9GzzfrDQaXGNtVHPQLJbIqsFFkEKHORoMwVLvWzCB3yDSRGU9Q 44r2YiPG5peVR0N2oD3yQFTuuolid6mVLDsDH2cEv8PblyngoXjHIxbbSvNI14vaxqJc SQ5/XjaaWpci28LhPn2BwTsJSb0lkU1FgQ1aGmk/jJhMTWsgC4jVaLq/+pNPc6OfxF8s 8SHgMQ/inJ0vsFgLtSLOHaKcCxfrLJzrPjROC8ChpingGs1gFUZCLdAq4T3xUR90EC/B DE+vysjHUA4W7w4r7AddACgP00GJW4lEZvMy1wk6LgZ7DqcvpoBObW0q7xSgFQCIZgPx 58nA== X-Gm-Message-State: AOAM530QcpzqyPghOzXYqvDkv6KeZZ6Ql7cgEnoRmdBZi4gIzvuH/AZo VzY9bZRytSZyIiJbq8cqKLdJiQ== X-Google-Smtp-Source: ABdhPJybd062Z7dZdlv5Ua0y9WgXsZDlcpD/ngOKZtR+XtlO0zPIxbocuXwUccJIVKZ7ltOnF8e4MQ== X-Received: by 2002:a17:90a:b105:: with SMTP id z5mr5854314pjq.181.1635441579540; Thu, 28 Oct 2021 10:19:39 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id d24sm3945465pfn.62.2021.10.28.10.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Oct 2021 10:19:38 -0700 (PDT) Date: Thu, 28 Oct 2021 17:19:34 +0000 From: Sean Christopherson To: Maxim Levitsky Subject: Re: [PATCH v2 28/43] KVM: VMX: Remove vCPU from PI wakeup list before updating PID.NV Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-29-seanjc@google.com> <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> Cc: Cornelia Huck , Wanpeng Li , kvm@vger.kernel.org, David Hildenbrand , linux-kernel@vger.kernel.org, Paul Mackerras , Atish Patra , linux-riscv@lists.infradead.org, Claudio Imbrenda , kvmarm@lists.cs.columbia.edu, Janosch Frank , Marc Zyngier , Joerg Roedel , Huacai Chen , Christian Borntraeger , Aleksandar Markovic , Albert Ou , kvm-ppc@vger.kernel.org, Paul Walmsley , David Matlack , linux-arm-kernel@lists.infradead.org, Jim Mattson , Anup Patel , linux-mips@vger.kernel.org, Palmer Dabbelt , kvm-riscv@lists.infradead.org, Paolo Bonzini , Vitaly Kuznetsov X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Thu, Oct 28, 2021, Maxim Levitsky wrote: > On Fri, 2021-10-08 at 19:12 -0700, Sean Christopherson wrote: > > Remove the vCPU from the wakeup list before updating the notification > > vector in the posted interrupt post-block helper. There is no need to > > wake the current vCPU as it is by definition not blocking. Practically > > speaking this is a nop as it only shaves a few meager cycles in the > > unlikely case that the vCPU was migrated and the previous pCPU gets a > > wakeup IRQ right before PID.NV is updated. The real motivation is to > > allow for more readable code in the future, when post-block is merged > > with vmx_vcpu_pi_load(), at which point removal from the list will be > > conditional on the old notification vector. > > > > Opportunistically add comments to document why KVM has a per-CPU spinlock > > that, at first glance, appears to be taken only on the owning CPU. > > Explicitly call out that the spinlock must be taken with IRQs disabled, a > > detail that was "lost" when KVM switched from spin_lock_irqsave() to > > spin_lock(), with IRQs disabled for the entirety of the relevant path. > > > > Signed-off-by: Sean Christopherson > > --- > > arch/x86/kvm/vmx/posted_intr.c | 49 +++++++++++++++++++++++----------- > > 1 file changed, 33 insertions(+), 16 deletions(-) > > > > diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c > > index 2b2206339174..901b7a5f7777 100644 > > --- a/arch/x86/kvm/vmx/posted_intr.c > > +++ b/arch/x86/kvm/vmx/posted_intr.c > > @@ -10,10 +10,22 @@ > > #include "vmx.h" > > > > /* > > - * We maintain a per-CPU linked-list of vCPU, so in wakeup_handler() we > > - * can find which vCPU should be waken up. > > + * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler() > Nit: While at it, it would be nice to rename this to pi_wakeup_hanlder() so > that it can be more easilly found. Ah, good catch. > > + * when a WAKEUP_VECTOR interrupted is posted. vCPUs are added to the list when > > + * the vCPU is scheduled out and is blocking (e.g. in HLT) with IRQs enabled. > s/interrupted/interrupt ? > > Isn't that comment incorrect? As I see, the PI hardware is setup to use the WAKEUP_VECTOR > when vcpu blocks (in pi_pre_block) and then that vcpu is added to the list. > The pi_wakeup_hanlder just goes over the list and wakes up all vcpus on the lsit. Doh, yes. This patch is predicting the future. The comment becomes correct as of KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load but as of this patch the "scheduled out" piece doesn't hold true. > > + * The vCPUs posted interrupt descriptor is updated at the same time to set its > > + * notification vector to WAKEUP_VECTOR, so that posted interrupt from devices > > + * wake the target vCPUs. vCPUs are removed from the list and the notification > > + * vector is reset when the vCPU is scheduled in. > > */ > > static DEFINE_PER_CPU(struct list_head, blocked_vcpu_on_cpu); > Also while at it, why not to rename this to 'blocked_vcpu_list'? > to explain that this is list of blocked vcpus. Its a per-cpu variable > so 'on_cpu' suffix isn't needed IMHO. As you noted, addressed in a future patch. > > +/* > > + * Protect the per-CPU list with a per-CPU spinlock to handle task migration. > > + * When a blocking vCPU is awakened _and_ migrated to a different pCPU, the > > + * ->sched_in() path will need to take the vCPU off the list of the _previous_ > > + * CPU. IRQs must be disabled when taking this lock, otherwise deadlock will > > + * occur if a wakeup IRQ arrives and attempts to acquire the lock. > > + */ > > static DEFINE_PER_CPU(spinlock_t, blocked_vcpu_on_cpu_lock); > > > > static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu) > > @@ -101,23 +113,28 @@ static void __pi_post_block(struct kvm_vcpu *vcpu) > > WARN(pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR, > > "Wakeup handler not enabled while the vCPU was blocking"); > > > > - dest = cpu_physical_id(vcpu->cpu); > > - if (!x2apic_mode) > > - dest = (dest << 8) & 0xFF00; > > - > > - do { > > - old.control = new.control = READ_ONCE(pi_desc->control); > > - > > - new.ndst = dest; > > - > > - /* set 'NV' to 'notification vector' */ > > - new.nv = POSTED_INTR_VECTOR; > > - } while (cmpxchg64(&pi_desc->control, old.control, > > - new.control) != old.control); > > - > > + /* > > + * Remove the vCPU from the wakeup list of the _previous_ pCPU, which > > + * will not be the same as the current pCPU if the task was migrated. > > + */ > > spin_lock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > list_del(&vcpu->blocked_vcpu_list); > > spin_unlock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > + > > + dest = cpu_physical_id(vcpu->cpu); > > + if (!x2apic_mode) > > + dest = (dest << 8) & 0xFF00; > It would be nice to have a function for this, this appears in this file twice. > Maybe there is a function already somewhere? The second instance does go away by the aforementioned: KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load I'm inclined to say we don't want a helper because there should only ever be one path that changes PI.ndst. But a comment would definitely help to explain the difference between xAPIC and x2APIC IDs. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 752C1C433EF for ; Thu, 28 Oct 2021 17:21:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 39D3C60D07 for ; Thu, 28 Oct 2021 17:21:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 39D3C60D07 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bdlnmM8sNEAqpzK6q3fGWCcX1S+HiH1g+FHx48BUclA=; b=e509LznSd8UMnB bOEXxfDsHd8I+B0iUIawXKmSrfKmV/jepObSmjKYYFQYpM4g7YuO5Wx+uZFSoknY15PPKJg0TywIx yyWtR2VPynaM+PcWCbAymzBXLc405/QI88tsb/1ucgLzDoN/L/F7MoOz44S0XkVPnsTcuiEGOa30J Y+ksfWfTqQjHLwRbMfKy5ZKxJC7CJfLtcadBCNGzOUfbfxyc/wCjNroq7S6Xlmtcj1opEfeoH63Es u0WwbGJtgXyQ9hVxwmbBe+VMdDY+duyE+2bJ9iAL/NPS6equGPofFg+qL7+TBKxRJMSz7mmebUR6i 1YjbAt9WqGNYDm0kMGow==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mg946-008iEk-JA; Thu, 28 Oct 2021 17:19:46 +0000 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mg940-008iCl-Ny for linux-arm-kernel@lists.infradead.org; Thu, 28 Oct 2021 17:19:43 +0000 Received: by mail-pj1-x1031.google.com with SMTP id y14-20020a17090a2b4e00b001a5824f4918so1659671pjc.4 for ; Thu, 28 Oct 2021 10:19:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=q4iJG3ZW7obL4DMmrtDt5ktj041PvD+dEvmTQN+uKyY=; b=mnkWkJlsD3Efv+dhabg9XRW3VcAMBFLrAWU0a5kq4aSl4p3OkuIs64Ri3PE1R6G45W WWX1srIjeyGp7bl0JwXP4EsqbWo0C7Rq7LlpprSwJJDhP6Z9C4BlGZ6pF0W6uFPVwJd6 newuZGIp7fi3S1LWbDnukcAYyKzMEUnwUDvBD8yhO2TaY/ppfXW+LzQN7N/3ahTyR+Xa EoqLzmvlkN3t1dBGcUsabuqlQMThWwYqrYkPzmYbFq4TCGSH1FBWF6bLFrKhvfl+wIkg myDgbOosQ39NTrE5GkyLOk3F2ofMqkvjX3mEfa4Ds01sxY6mlbwLLtW+SYgm0DJ0rLj4 pK7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=q4iJG3ZW7obL4DMmrtDt5ktj041PvD+dEvmTQN+uKyY=; b=HWGTXrGqr4eVt+apfj8M+UfowyjhxHuasgV4taefMoMaf9PMB5BpItiYCuNdIFMQdb l8tLfx/71RYlHjo2bhA9PhwDtkzMcCSpttGr/wwd1hTXaXAaBFlEcqvKsgQLzPn/Du9h eVQZ+4jMBrrbj50dIyH1xYd/2v6dKUgkbCtp+svUvCzE/8DsXsYp5Rlo3PG4u/8nvD0s hL2TVdAKHA2H0v9rczmxKnj62YNwsemKpnP8+OTOfG5sMSxrb97dAG4FNsMG72LbtT5I +EwZ6TjX8ssTcFAK02kNE8x4g48qqEBd9dSF/lYY7jIpTfhNvxhfG6MiACZR1D1GHqqk PVvQ== X-Gm-Message-State: AOAM532XARCxk1Tget4syrzAIvGwYbIMlaAXaV2feaUECuM10IHPo2J0 sK+SpPHVBsE61bIAt9RhBd4fQQ== X-Google-Smtp-Source: ABdhPJybd062Z7dZdlv5Ua0y9WgXsZDlcpD/ngOKZtR+XtlO0zPIxbocuXwUccJIVKZ7ltOnF8e4MQ== X-Received: by 2002:a17:90a:b105:: with SMTP id z5mr5854314pjq.181.1635441579540; Thu, 28 Oct 2021 10:19:39 -0700 (PDT) Received: from google.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id d24sm3945465pfn.62.2021.10.28.10.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Oct 2021 10:19:38 -0700 (PDT) Date: Thu, 28 Oct 2021 17:19:34 +0000 From: Sean Christopherson To: Maxim Levitsky Cc: Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Subject: Re: [PATCH v2 28/43] KVM: VMX: Remove vCPU from PI wakeup list before updating PID.NV Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-29-seanjc@google.com> <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <558e7e4c36e649709837079a25c2f56fc5609fbe.camel@redhat.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211028_101940_836904_9DF976AE X-CRM114-Status: GOOD ( 46.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Oct 28, 2021, Maxim Levitsky wrote: > On Fri, 2021-10-08 at 19:12 -0700, Sean Christopherson wrote: > > Remove the vCPU from the wakeup list before updating the notification > > vector in the posted interrupt post-block helper. There is no need to > > wake the current vCPU as it is by definition not blocking. Practically > > speaking this is a nop as it only shaves a few meager cycles in the > > unlikely case that the vCPU was migrated and the previous pCPU gets a > > wakeup IRQ right before PID.NV is updated. The real motivation is to > > allow for more readable code in the future, when post-block is merged > > with vmx_vcpu_pi_load(), at which point removal from the list will be > > conditional on the old notification vector. > > > > Opportunistically add comments to document why KVM has a per-CPU spinlock > > that, at first glance, appears to be taken only on the owning CPU. > > Explicitly call out that the spinlock must be taken with IRQs disabled, a > > detail that was "lost" when KVM switched from spin_lock_irqsave() to > > spin_lock(), with IRQs disabled for the entirety of the relevant path. > > > > Signed-off-by: Sean Christopherson > > --- > > arch/x86/kvm/vmx/posted_intr.c | 49 +++++++++++++++++++++++----------- > > 1 file changed, 33 insertions(+), 16 deletions(-) > > > > diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c > > index 2b2206339174..901b7a5f7777 100644 > > --- a/arch/x86/kvm/vmx/posted_intr.c > > +++ b/arch/x86/kvm/vmx/posted_intr.c > > @@ -10,10 +10,22 @@ > > #include "vmx.h" > > > > /* > > - * We maintain a per-CPU linked-list of vCPU, so in wakeup_handler() we > > - * can find which vCPU should be waken up. > > + * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler() > Nit: While at it, it would be nice to rename this to pi_wakeup_hanlder() so > that it can be more easilly found. Ah, good catch. > > + * when a WAKEUP_VECTOR interrupted is posted. vCPUs are added to the list when > > + * the vCPU is scheduled out and is blocking (e.g. in HLT) with IRQs enabled. > s/interrupted/interrupt ? > > Isn't that comment incorrect? As I see, the PI hardware is setup to use the WAKEUP_VECTOR > when vcpu blocks (in pi_pre_block) and then that vcpu is added to the list. > The pi_wakeup_hanlder just goes over the list and wakes up all vcpus on the lsit. Doh, yes. This patch is predicting the future. The comment becomes correct as of KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load but as of this patch the "scheduled out" piece doesn't hold true. > > + * The vCPUs posted interrupt descriptor is updated at the same time to set its > > + * notification vector to WAKEUP_VECTOR, so that posted interrupt from devices > > + * wake the target vCPUs. vCPUs are removed from the list and the notification > > + * vector is reset when the vCPU is scheduled in. > > */ > > static DEFINE_PER_CPU(struct list_head, blocked_vcpu_on_cpu); > Also while at it, why not to rename this to 'blocked_vcpu_list'? > to explain that this is list of blocked vcpus. Its a per-cpu variable > so 'on_cpu' suffix isn't needed IMHO. As you noted, addressed in a future patch. > > +/* > > + * Protect the per-CPU list with a per-CPU spinlock to handle task migration. > > + * When a blocking vCPU is awakened _and_ migrated to a different pCPU, the > > + * ->sched_in() path will need to take the vCPU off the list of the _previous_ > > + * CPU. IRQs must be disabled when taking this lock, otherwise deadlock will > > + * occur if a wakeup IRQ arrives and attempts to acquire the lock. > > + */ > > static DEFINE_PER_CPU(spinlock_t, blocked_vcpu_on_cpu_lock); > > > > static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu) > > @@ -101,23 +113,28 @@ static void __pi_post_block(struct kvm_vcpu *vcpu) > > WARN(pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR, > > "Wakeup handler not enabled while the vCPU was blocking"); > > > > - dest = cpu_physical_id(vcpu->cpu); > > - if (!x2apic_mode) > > - dest = (dest << 8) & 0xFF00; > > - > > - do { > > - old.control = new.control = READ_ONCE(pi_desc->control); > > - > > - new.ndst = dest; > > - > > - /* set 'NV' to 'notification vector' */ > > - new.nv = POSTED_INTR_VECTOR; > > - } while (cmpxchg64(&pi_desc->control, old.control, > > - new.control) != old.control); > > - > > + /* > > + * Remove the vCPU from the wakeup list of the _previous_ pCPU, which > > + * will not be the same as the current pCPU if the task was migrated. > > + */ > > spin_lock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > list_del(&vcpu->blocked_vcpu_list); > > spin_unlock(&per_cpu(blocked_vcpu_on_cpu_lock, vcpu->pre_pcpu)); > > + > > + dest = cpu_physical_id(vcpu->cpu); > > + if (!x2apic_mode) > > + dest = (dest << 8) & 0xFF00; > It would be nice to have a function for this, this appears in this file twice. > Maybe there is a function already somewhere? The second instance does go away by the aforementioned: KVM: VMX: Handle PI wakeup shenanigans during vcpu_put/load I'm inclined to say we don't want a helper because there should only ever be one path that changes PI.ndst. But a comment would definitely help to explain the difference between xAPIC and x2APIC IDs. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel