[PATCH v5 0/2] arm64: dts: renesas: r8a779a0 DU support

[PATCH v5 0/2] arm64: dts: renesas: r8a779a0 DU support

[Kieran Bingham]

Provide the DT nodes for the DSI found on the r8a779a0, and extend the
falcon-cpu board add on with the TI SN65DSI86 bridge which is used to
connect the DSI output to the mini display-port connector on the Falcon
CPU board.

This has been successfully tested on a Falcon-V3U with patches to the
rcar_du and sn65dsi86 which will be sent separately.

Since the previous version, the core "r8a779a0: Add DU support" has
already been accepted into the renesas-drivers tree, and the "r8a779a0:
Provide default DSI data-lanes" patch has been dropped in favour of a
better construction in the two patches supplied here.

Kieran Bingham (2):
  arm64: dts: renesas: r8a779a0: Add DSI encoders
  arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

 .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 79 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi     | 60 ++++++++++++++
 2 files changed, 139 insertions(+)

-- 
2.30.2

[PATCH v5 1/2] arm64: dts: renesas: r8a779a0: Add DSI encoders

[Kieran Bingham]

Provide the two MIPI DSI encoders on the V3U and connect them to the DU
accordingly.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
v2
 - Fixup indentation

v3
 - Fix the clock references
 - Fixup dsi1 as well

-v4:
 - Use the correct pll clocks.

v5:
 - Remove dsi_out port endpoints.
 - They must be added by the definition that links them.

 arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 60 +++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 8ac1a31e4146..2bd241b2a588 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -2290,12 +2290,14 @@ ports {
 				port@0 {
 					reg = <0>;
 					du_out_dsi0: endpoint {
+						remote-endpoint = <&dsi0_in>;
 					};
 				};
 
 				port@1 {
 					reg = <1>;
 					du_out_dsi1: endpoint {
+						remote-endpoint = <&dsi1_in>;
 					};
 				};
 			};
@@ -2633,6 +2635,64 @@ isp3vin31: endpoint {
 			};
 		};
 
+		dsi0: dsi-encoder@fed80000 {
+			compatible = "renesas,r8a779a0-dsi-csi2-tx";
+			reg = <0 0xfed80000 0 0x10000>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 415>,
+				 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
+				 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
+			clock-names = "fck", "dsi", "pll";
+
+			resets = <&cpg 415>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					dsi0_in: endpoint {
+						remote-endpoint = <&du_out_dsi0>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+				};
+			};
+		};
+
+		dsi1: dsi-encoder@fed90000 {
+			compatible = "renesas,r8a779a0-dsi-csi2-tx";
+			reg = <0 0xfed90000 0 0x10000>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 415>,
+				 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
+				 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
+			clock-names = "fck", "dsi", "pll";
+
+			resets = <&cpg 416>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					dsi1_in: endpoint {
+						remote-endpoint = <&du_out_dsi1>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+				};
+			};
+		};
+
 		prr: chipid@fff00044 {
 			compatible = "renesas,prr";
 			reg = <0 0xfff00044 0 4>;
-- 
2.30.2

[PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

[Kieran Bingham]

Provide the display output using the sn65dsi86 MIPI DSI bridge

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
v3:
 - Fix the voltage regulator values
 - No longer override the clocks
 - use clk-x6 as clock node name

v4:
 - No change

v5:
 - Override/define dsi0_out endpoints entirely

 .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 79 +++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index cd2f0d60f21a..b82f2e53403c 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -98,6 +98,15 @@ memory@700000000 {
 		reg = <0x7 0x00000000 0x0 0x80000000>;
 	};
 
+	reg_1p2v: regulator-1p2v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.2V";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
 	reg_1p8v: regulator-1p8v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-1.8V";
@@ -115,6 +124,41 @@ reg_3p3v: regulator-3p3v {
 		regulator-boot-on;
 		regulator-always-on;
 	};
+
+	mini-dp-con {
+		compatible = "dp-connector";
+		label = "CN5";
+		type = "mini";
+
+		port {
+			mini_dp_con_in: endpoint {
+				remote-endpoint = <&sn65dsi86_out>;
+			};
+		};
+	};
+
+	sn65dsi86_refclk: clk-x6 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <38400000>;
+	};
+};
+
+&dsi0 {
+	status = "okay";
+
+	ports {
+		port@1 {
+			dsi0_out: endpoint {
+				remote-endpoint = <&sn65dsi86_in>;
+				data-lanes = <1 2 3 4>;
+			};
+		};
+	};
+};
+
+&du {
+	status = "okay";
 };
 
 &extal_clk {
@@ -146,6 +190,41 @@ &i2c1 {
 
 	status = "okay";
 	clock-frequency = <400000>;
+
+	sn65dsi86@2c {
+		compatible = "ti,sn65dsi86";
+		reg = <0x2c>;
+
+		clocks = <&sn65dsi86_refclk>;
+		clock-names = "refclk";
+
+		interrupt-parent = <&gpio1>;
+		interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+
+		vccio-supply = <&reg_1p8v>;
+		vpll-supply = <&reg_1p8v>;
+		vcca-supply = <&reg_1p2v>;
+		vcc-supply = <&reg_1p2v>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				sn65dsi86_in: endpoint {
+					remote-endpoint = <&dsi0_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				sn65dsi86_out: endpoint {
+					remote-endpoint = <&mini_dp_con_in>;
+				};
+			};
+		};
+	};
 };
 
 &i2c6 {
-- 
2.30.2

Re: [PATCH v5 0/2] arm64: dts: renesas: r8a779a0 DU support

[Laurent Pinchart]

Hi Kieran,

On Tue, Nov 30, 2021 at 04:43:09PM +0000, Kieran Bingham wrote:
> Provide the DT nodes for the DSI found on the r8a779a0, and extend the
> falcon-cpu board add on with the TI SN65DSI86 bridge which is used to
> connect the DSI output to the mini display-port connector on the Falcon
> CPU board.
> 
> This has been successfully tested on a Falcon-V3U with patches to the
> rcar_du and sn65dsi86 which will be sent separately.
> 
> Since the previous version, the core "r8a779a0: Add DU support" has
> already been accepted into the renesas-drivers tree, and the "r8a779a0:
> Provide default DSI data-lanes" patch has been dropped in favour of a
> better construction in the two patches supplied here.

I've reposted the DSI driver and its bindings, and unless something goes
terribly wrong, I'll send a pull request in a couple of days.

Geert, how would you like to proceed with the DT changes ?

> Kieran Bingham (2):
>   arm64: dts: renesas: r8a779a0: Add DSI encoders
>   arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output
> 
>  .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 79 +++++++++++++++++++
>  arch/arm64/boot/dts/renesas/r8a779a0.dtsi     | 60 ++++++++++++++
>  2 files changed, 139 insertions(+)
> 

-- 
Regards,

Laurent Pinchart

Re: [PATCH v5 0/2] arm64: dts: renesas: r8a779a0 DU support

[Geert Uytterhoeven]

Hi Laurent,

On Wed, Dec 1, 2021 at 6:29 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Tue, Nov 30, 2021 at 04:43:09PM +0000, Kieran Bingham wrote:
> > Provide the DT nodes for the DSI found on the r8a779a0, and extend the
> > falcon-cpu board add on with the TI SN65DSI86 bridge which is used to
> > connect the DSI output to the mini display-port connector on the Falcon
> > CPU board.
> >
> > This has been successfully tested on a Falcon-V3U with patches to the
> > rcar_du and sn65dsi86 which will be sent separately.
> >
> > Since the previous version, the core "r8a779a0: Add DU support" has
> > already been accepted into the renesas-drivers tree, and the "r8a779a0:
> > Provide default DSI data-lanes" patch has been dropped in favour of a
> > better construction in the two patches supplied here.
>
> I've reposted the DSI driver and its bindings, and unless something goes
> terribly wrong, I'll send a pull request in a couple of days.
>
> Geert, how would you like to proceed with the DT changes ?

I can take the DTS changes as soon as the DT bindings have been
accepted in linux-next.
Thanks!

> > Kieran Bingham (2):
> >   arm64: dts: renesas: r8a779a0: Add DSI encoders
> >   arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output
> >
> >  .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 79 +++++++++++++++++++
> >  arch/arm64/boot/dts/renesas/r8a779a0.dtsi     | 60 ++++++++++++++
> >  2 files changed, 139 insertions(+)

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v5 1/2] arm64: dts: renesas: r8a779a0: Add DSI encoders

[Geert Uytterhoeven]

Hi Kieran,

On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
<kieran.bingham+renesas@ideasonboard.com> wrote:
> Provide the two MIPI DSI encoders on the V3U and connect them to the DU
> accordingly.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -2290,12 +2290,14 @@ ports {
>                                 port@0 {
>                                         reg = <0>;
>                                         du_out_dsi0: endpoint {
> +                                               remote-endpoint = <&dsi0_in>;
>                                         };
>                                 };
>
>                                 port@1 {
>                                         reg = <1>;
>                                         du_out_dsi1: endpoint {
> +                                               remote-endpoint = <&dsi1_in>;
>                                         };
>                                 };
>                         };
> @@ -2633,6 +2635,64 @@ isp3vin31: endpoint {
>                         };
>                 };
>
> +               dsi0: dsi-encoder@fed80000 {
> +                       compatible = "renesas,r8a779a0-dsi-csi2-tx";
> +                       reg = <0 0xfed80000 0 0x10000>;
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       clocks = <&cpg CPG_MOD 415>,
> +                                <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> +                                <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
> +                       clock-names = "fck", "dsi", "pll";
> +
> +                       resets = <&cpg 415>;
> +                       status = "disabled";
> +
> +                       ports {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               port@0 {
> +                                       reg = <0>;
> +                                       dsi0_in: endpoint {
> +                                               remote-endpoint = <&du_out_dsi0>;
> +                                       };
> +                               };
> +
> +                               port@1 {
> +                                       reg = <1>;
> +                               };
> +                       };
> +               };
> +
> +               dsi1: dsi-encoder@fed90000 {
> +                       compatible = "renesas,r8a779a0-dsi-csi2-tx";
> +                       reg = <0 0xfed90000 0 0x10000>;
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       clocks = <&cpg CPG_MOD 415>,

416?

> +                                <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> +                                <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
> +                       clock-names = "fck", "dsi", "pll";
> +
> +                       resets = <&cpg 416>;

That one is OK.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.17 with the above fixed.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

[Geert Uytterhoeven]

Hi Kieran,

On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
<kieran.bingham+renesas@ideasonboard.com> wrote:
> Provide the display output using the sn65dsi86 MIPI DSI bridge
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.17.

> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi

> @@ -146,6 +190,41 @@ &i2c1 {
>
>         status = "okay";
>         clock-frequency = <400000>;
> +
> +       sn65dsi86@2c {
> +               compatible = "ti,sn65dsi86";
> +               reg = <0x2c>;
> +
> +               clocks = <&sn65dsi86_refclk>;
> +               clock-names = "refclk";
> +
> +               interrupt-parent = <&gpio1>;
> +               interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;

Does the driver use this interrupt, and is it triggered?
If yes, as GP1_24 == IRQ0, you can switch from a GPIO to an INTC_EX IRQ,
(don't forget to configure pinctrl) and test the INTC_EX driver.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

[Geert Uytterhoeven]

On Tue, Dec 14, 2021 at 11:49 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
> <kieran.bingham+renesas@ideasonboard.com> wrote:
> > Provide the display output using the sn65dsi86 MIPI DSI bridge
> >
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>
> LGTM, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> i.e. will queue in renesas-devel for v5.17.

... using "bridge@2c".

> > --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
>
> > @@ -146,6 +190,41 @@ &i2c1 {
> >
> >         status = "okay";
> >         clock-frequency = <400000>;
> > +
> > +       sn65dsi86@2c {

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

[Kieran Bingham]

Quoting Geert Uytterhoeven (2021-12-14 10:49:15)
> Hi Kieran,
> 
> On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
> <kieran.bingham+renesas@ideasonboard.com> wrote:
> > Provide the display output using the sn65dsi86 MIPI DSI bridge
> >
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> LGTM, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> i.e. will queue in renesas-devel for v5.17.
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> 
> > @@ -146,6 +190,41 @@ &i2c1 {
> >
> >         status = "okay";
> >         clock-frequency = <400000>;
> > +
> > +       sn65dsi86@2c {
> > +               compatible = "ti,sn65dsi86";
> > +               reg = <0x2c>;
> > +
> > +               clocks = <&sn65dsi86_refclk>;
> > +               clock-names = "refclk";
> > +
> > +               interrupt-parent = <&gpio1>;
> > +               interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
> 
> Does the driver use this interrupt, and is it triggered?

No, it does not currently, but I expect it can be made to do so. Which
is likely a next development task to adapt polling hotplug to interrupt
driven hotplug detection anyway, so I'll try that then.


> If yes, as GP1_24 == IRQ0, you can switch from a GPIO to an INTC_EX IRQ,
> (don't forget to configure pinctrl) and test the INTC_EX driver.
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds