From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A6E4C433EF for ; Thu, 2 Dec 2021 13:06:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E47A36F918; Thu, 2 Dec 2021 13:06:56 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id CA4F96F918 for ; Thu, 2 Dec 2021 13:06:55 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10185"; a="217395041" X-IronPort-AV: E=Sophos;i="5.87,282,1631602800"; d="scan'208";a="217395041" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Dec 2021 05:06:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,282,1631602800"; d="scan'208";a="512645177" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by fmsmga007.fm.intel.com with SMTP; 02 Dec 2021 05:06:53 -0800 Received: by stinkbox (sSMTP sendmail emulation); Thu, 02 Dec 2021 15:06:52 +0200 Date: Thu, 2 Dec 2021 15:06:52 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Vidya Srinivas Message-ID: References: <20211201034727.1666-1-vidya.srinivas@intel.com> <20211202110836.17536-1-vidya.srinivas@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20211202110836.17536-1-vidya.srinivas@intel.com> X-Patchwork-Hint: comment Subject: Re: [Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Dec 02, 2021 at 04:38:36PM +0530, Vidya Srinivas wrote: > PLANE_CUS_CTL has a restriction of 4096 width even though > PLANE_SIZE and scaler size registers supports max 5120. > Take care of this restriction in max_width. > > Without this patch, when 5k content is sent on HDR plane > with NV12 content, FIFO underrun is seen and screen blanks > out. > > v2: Addressed review comments from Ville. Added separate > functions for max_width - for HDR and SDR > > v3: Addressed review comments from Ville. Changed names of > HDR and SDR max_width functions to icl_hdr_plane_max_width > and icl_sdr_plane_max_width > > v4: Fixed paranthesis alignment. No code change > > Reviewed-by: Ville Syrjälä > Signed-off-by: Vidya Srinivas Pushed to drm-intel-next. Thanks. > --- > .../drm/i915/display/skl_universal_plane.c | 21 +++++++++++++++---- > 1 file changed, 17 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c > index 28890876bdeb..e717eb58b105 100644 > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c > @@ -420,9 +420,19 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb, > } > } > > -static int icl_plane_max_width(const struct drm_framebuffer *fb, > - int color_plane, > - unsigned int rotation) > +static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb, > + int color_plane, > + unsigned int rotation) > +{ > + if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) > + return 4096; > + else > + return 5120; > +} > + > +static int icl_sdr_plane_max_width(const struct drm_framebuffer *fb, > + int color_plane, > + unsigned int rotation) > { > return 5120; > } > @@ -2108,7 +2118,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, > > if (DISPLAY_VER(dev_priv) >= 11) { > plane->min_width = icl_plane_min_width; > - plane->max_width = icl_plane_max_width; > + if (icl_is_hdr_plane(dev_priv, plane_id)) > + plane->max_width = icl_hdr_plane_max_width; > + else > + plane->max_width = icl_sdr_plane_max_width; > plane->max_height = icl_plane_max_height; > plane->min_cdclk = icl_plane_min_cdclk; > } else if (DISPLAY_VER(dev_priv) >= 10) { > -- > 2.33.0 -- Ville Syrjälä Intel