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From: Greg KH <gregkh@linuxfoundation.org>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: lee.jones@linaro.org, hdegoede@redhat.com, bhelgaas@google.com,
	andriy.shevchenko@linux.intel.com, srinivas.pandruvada@intel.com,
	mgross@linux.intel.com, linux-kernel@vger.kernel.org,
	platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org,
	Mark Gross <markgross@kernel.org>
Subject: Re: [PATCH RESEND V2 4/6] platform/x86: Add Intel Software Defined Silicon driver
Date: Wed, 8 Dec 2021 17:29:39 +0100	[thread overview]
Message-ID: <YbDdc3VVI/YgqWxT@kroah.com> (raw)
In-Reply-To: <20211208015015.891275-5-david.e.box@linux.intel.com>

On Tue, Dec 07, 2021 at 05:50:13PM -0800, David E. Box wrote:
> Intel Software Defined Silicon (SDSi) is a post manufacturing mechanism for
> activating additional silicon features. Features are enabled through a
> license activation process.  The SDSi driver provides a per socket, sysfs
> attribute interface for applications to perform 3 main provisioning
> functions:
> 
> 1. Provision an Authentication Key Certificate (AKC), a key written to
>    internal NVRAM that is used to authenticate a capability specific
>    activation payload.
> 
> 2. Provision a Capability Activation Payload (CAP), a token authenticated
>    using the AKC and applied to the CPU configuration to activate a new
>    feature.
> 
> 3. Read the SDSi State Certificate, containing the CPU configuration
>    state.
> 
> The operations perform function specific mailbox commands that forward the
> requests to SDSi hardware to perform authentication of the payloads and
> enable the silicon configuration (to be made available after power
> cycling).
> 
> The SDSi device itself is enumerated as an auxiliary device from the
> intel_vsec driver and as such has a build dependency on CONFIG_INTEL_VSEC.
> 
> Link: https://github.com/intel/intel-sdsi

Also, why not put the documentation that you have currently at that link
in this commit in the driver itself?  That would make it much more
self-contained and live longer than some random external web link that
could go away at any moment.

thanks,

greg k-h

  parent reply	other threads:[~2021-12-08 16:29 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-08  1:50 [PATCH RESEND V2 0/6] Auxiliary bus driver support for Intel PCIe VSEC/DVSEC David E. Box
2021-12-08  1:50 ` [PATCH RESEND V2 1/6] PCI: Add #defines for accessing PCIe DVSEC fields David E. Box
2021-12-08  1:50 ` [PATCH RESEND V2 2/6] driver core: auxiliary bus: Add driver data helpers David E. Box
2021-12-08  1:50 ` [PATCH RESEND V2 3/6] platform/x86/intel: Move intel_pmt from MFD to Auxiliary Bus David E. Box
2021-12-08 16:22   ` Greg KH
2021-12-08 17:47     ` David E. Box
2021-12-08 18:11       ` Greg KH
2021-12-08 19:09         ` David E. Box
2021-12-08 19:21           ` Greg KH
2021-12-08 21:30             ` David E. Box
2021-12-21  7:38               ` Greg KH
2021-12-21 16:44                 ` David E. Box
2021-12-21 16:54                   ` Greg KH
2021-12-21 17:04                     ` Hans de Goede
2021-12-21 18:16                       ` David E. Box
2021-12-21 18:38                         ` Hans de Goede
2021-12-22 12:57                           ` Greg KH
2021-12-08  1:50 ` [PATCH RESEND V2 4/6] platform/x86: Add Intel Software Defined Silicon driver David E. Box
2021-12-08 16:23   ` Greg KH
2021-12-08 16:24   ` Greg KH
2021-12-08 17:49     ` David E. Box
2021-12-08 18:12       ` Greg KH
2021-12-08 18:30         ` David E. Box
2021-12-08 18:42           ` Greg KH
2021-12-08 16:29   ` Greg KH [this message]
2021-12-08 18:11     ` David E. Box
2021-12-08 16:43   ` Keith Busch
2021-12-08  1:50 ` [PATCH RESEND V2 5/6] sample/sdsi: Sample of SDSi provisiong using sysfs David E. Box
2021-12-08  1:50 ` [PATCH RESEND V2 6/6] selftests: sdsi: test sysfs setup David E. Box

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