Hi Miquel, thanks for this driver. I just discovered it, better late than never! On Fri, Dec 17, 2021 at 10:02:46AM +0100, Miquel Raynal wrote: > Introduce Renesas RZ/N1x NAND controller driver which supports: > - All ONFI timing modes > - Different configurations of its internal ECC controller > - On-die (not tested) and software ECC support > - Several chips (not tested) > - Subpage accesses > - DMA and PIO > > This controller was originally provided by Evatronix before being bought > by Cadence. > > Signed-off-by: Miquel Raynal > Tested-by: Ralph Siemsen This IP core is also available on some Renesas R-Car Gen3 SoCs. I don't have a board with NAND equipped, so I sadly cannot test your patch and can only say that the code looks like it is in a really good shape and can only suggest some renaming. > --- > drivers/mtd/nand/raw/Kconfig | 6 + > drivers/mtd/nand/raw/Makefile | 1 + > drivers/mtd/nand/raw/rzn1-nand-controller.c | 1422 +++++++++++++++++++ Because the IP core is present elsewhere as well, how about drivers/mtd/nand/raw/r-nandc.c ? This is the name mentioned in the R-Car Gen3 docs. > +config MTD_NAND_RZN1 MTD_NAND_RNANDC? > + tristate "Renesas RZ/N1D, RZ/N1S, RZ/N1L NAND controller" "Renesas R-NANDC controller"? > + help > + Enables support for Renesas RZ/N1x SoC family NAND controller. "support for the Renesas R-NANDC found on ... SoCs."? > obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o > +obj-$(CONFIG_MTD_NAND_RZN1) += rzn1-nand-controller.o Might need updated sorting then maybe. > + * Evatronix/Renesas RZ/N1D, RZ/N1S, RZ/N1L NAND flash controller driver R-NANDC? > +struct rzn1_nand_chip_sel { > + unsigned int cs; > +}; Replace all 'rzn1_nand_' with 'rnandc_' in the file? I know this can be an annoying change. ... > + ret = devm_request_irq(&pdev->dev, irq, rzn1_nandc_irq_handler, 0, > + "rzn1-nand-controller", nandc); "rnandc"? > +static const struct of_device_id rzn1_nandc_id_table[] = { > + { .compatible = "renesas,rzn1-nand-controller" }, "rnandc"? > +MODULE_LICENSE("GPL"); "GPL v2" according to the SPDX header. All the best, Wolfram