From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F99CC4332F for ; Wed, 12 Jan 2022 19:22:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350059AbiALTW1 (ORCPT ); Wed, 12 Jan 2022 14:22:27 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:34724 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345216AbiALTVh (ORCPT ); Wed, 12 Jan 2022 14:21:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=4vEp/OLxoy6oFVaBhAvAd1yzVtXblqJ5zI4UzKuUTv4=; b=VBsJk0PJnlcxYfzblZUcR1BQ1r jvllBWivqvMUHX3wrIQC9EeWo7QyUqomFkieogHxmcCAXGz90lydmPoZ5hqib2GbmW3VTORVXqRyO jCQQoB1rfn4VccQOGLQqIp9MuB4eyPRrKztvrb/b024N/5Y9loTCOW1rwFVkzMM2CqaM=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1n7jBf-001E8h-HM; Wed, 12 Jan 2022 20:21:35 +0100 Date: Wed, 12 Jan 2022 20:21:35 +0100 From: Andrew Lunn To: Robert Hancock Cc: netdev@vger.kernel.org, radhey.shyam.pandey@xilinx.com, davem@davemloft.net, kuba@kernel.org, linux-arm-kernel@lists.infradead.org, michal.simek@xilinx.com, ariane.keller@tik.ee.ethz.ch, daniel@iogearbox.net Subject: Re: [PATCH net v2 3/9] net: axienet: reset core on initialization prior to MDIO access Message-ID: References: <20220112173700.873002-1-robert.hancock@calian.com> <20220112173700.873002-4-robert.hancock@calian.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220112173700.873002-4-robert.hancock@calian.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Wed, Jan 12, 2022 at 11:36:54AM -0600, Robert Hancock wrote: > In some cases where the Xilinx Ethernet core was used in 1000Base-X or > SGMII modes, which use the internal PCS/PMA PHY, and the MGT > transceiver clock source for the PCS was not running at the time the > FPGA logic was loaded, the core would come up in a state where the > PCS could not be found on the MDIO bus. To fix this, the Ethernet core > (including the PCS) should be reset after enabling the clocks, prior to > attempting to access the PCS using of_mdio_find_device. > > Fixes: 1a02556086fc (net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode) > Signed-off-by: Robert Hancock Reviewed-by: Andrew Lunn Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82BF5C433EF for ; Wed, 12 Jan 2022 19:22:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=x0K45+miZFnLIhZyy/drN1kgIVMI4ZIhlA60CNNRbGk=; b=zwmMMieTamuj4d CdOxUK0NLPaBFlpQzzPGikkbg/TxYTISmIwiHcqDXwp/Uv8W3Nn5d6x4FEqPjj9MQqbrsf5z3MtOU Dmk1nPJCU4oIUoVix0sRbuJLV0fzkCJwZCZ4fPIWqWIZ7R2btufTblm3zKcRlGwNX7FIUla0eHXFd lMTx/dTTY03Ddt2vDbbOqsOiJ5uWdz1RrK1TmqS98Ln+hnoGU03N5/M/lVjOQ+RWWm4FjKy86KoTW omIwBppxJx2SP2X/ejlq4MdlJSW1hYfBHHgq1oKuALWFUCZBNiw79qEDvqYpWF0F1OD+KrEJ1JRKm uZGzTuCBEtGABJ7/mHdg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7jBp-003aPS-3d; Wed, 12 Jan 2022 19:21:45 +0000 Received: from vps0.lunn.ch ([185.16.172.187]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7jBl-003aOk-Iu for linux-arm-kernel@lists.infradead.org; Wed, 12 Jan 2022 19:21:42 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=4vEp/OLxoy6oFVaBhAvAd1yzVtXblqJ5zI4UzKuUTv4=; b=VBsJk0PJnlcxYfzblZUcR1BQ1r jvllBWivqvMUHX3wrIQC9EeWo7QyUqomFkieogHxmcCAXGz90lydmPoZ5hqib2GbmW3VTORVXqRyO jCQQoB1rfn4VccQOGLQqIp9MuB4eyPRrKztvrb/b024N/5Y9loTCOW1rwFVkzMM2CqaM=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1n7jBf-001E8h-HM; Wed, 12 Jan 2022 20:21:35 +0100 Date: Wed, 12 Jan 2022 20:21:35 +0100 From: Andrew Lunn To: Robert Hancock Cc: netdev@vger.kernel.org, radhey.shyam.pandey@xilinx.com, davem@davemloft.net, kuba@kernel.org, linux-arm-kernel@lists.infradead.org, michal.simek@xilinx.com, ariane.keller@tik.ee.ethz.ch, daniel@iogearbox.net Subject: Re: [PATCH net v2 3/9] net: axienet: reset core on initialization prior to MDIO access Message-ID: References: <20220112173700.873002-1-robert.hancock@calian.com> <20220112173700.873002-4-robert.hancock@calian.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220112173700.873002-4-robert.hancock@calian.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220112_112141_644966_37A1AE0F X-CRM114-Status: GOOD ( 11.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jan 12, 2022 at 11:36:54AM -0600, Robert Hancock wrote: > In some cases where the Xilinx Ethernet core was used in 1000Base-X or > SGMII modes, which use the internal PCS/PMA PHY, and the MGT > transceiver clock source for the PCS was not running at the time the > FPGA logic was loaded, the core would come up in a state where the > PCS could not be found on the MDIO bus. To fix this, the Ethernet core > (including the PCS) should be reset after enabling the clocks, prior to > attempting to access the PCS using of_mdio_find_device. > > Fixes: 1a02556086fc (net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode) > Signed-off-by: Robert Hancock Reviewed-by: Andrew Lunn Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel