From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 519C3C433EF for ; Thu, 20 Jan 2022 16:49:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377117AbiATQtL (ORCPT ); Thu, 20 Jan 2022 11:49:11 -0500 Received: from mail-oi1-f175.google.com ([209.85.167.175]:45028 "EHLO mail-oi1-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377115AbiATQtH (ORCPT ); Thu, 20 Jan 2022 11:49:07 -0500 Received: by mail-oi1-f175.google.com with SMTP id s9so9663092oib.11; Thu, 20 Jan 2022 08:49:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=atLkBu3N/RFCjhoQCUPCGUzf/CIlAjhcm9ghJHrFyPo=; b=vdj5H5oD+ne7oZ0BEDBwdzYI/W1h1pb1MMlykWJbuRICt4odO0XEBSBDa/262BvKHR BEJLXoAPVleHUTBv7Wfn1l/Z83qv3x059UXv+ofR1j1ZjsJIMHvhJkVsbEUINulbI0Li CZ69+75TjO025haxQRQfDpKuNQxdMHQL3DIXW/tcLgNx1yxMqoci6HVayRT1rEHtFoxM vAr0M42R6Ev66Y+R9rtsXARYf4ZdU2+FMfQ7fQG4jMtsuqGsAzK5GHT+rkgd2c5uN6dX l7ngLP8Hh0I92JUTZWB3xJ15pBkrpB9uKWscLTue3qJoaziSt3I7yQmzb495E4p26Ngi J/6Q== X-Gm-Message-State: AOAM531fA/1jRF6Gw1Ev6rBKDKY1aUY1TFxV0y//hU6KzBD3I3iDk7lI AWVD+MRtY7MGYseEOTjVqw== X-Google-Smtp-Source: ABdhPJw6rfhYcEudPb8hkyG0JB3JIC9ChkgIAC4YvkyUefFiL3rdFzoA/qLdUPkxtT08jmgKVIoVkA== X-Received: by 2002:a05:6808:11c5:: with SMTP id p5mr8329266oiv.51.1642697346626; Thu, 20 Jan 2022 08:49:06 -0800 (PST) Received: from robh.at.kernel.org (66-90-148-213.dyn.grandenetworks.net. [66.90.148.213]) by smtp.gmail.com with ESMTPSA id ay14sm2096888oib.5.2022.01.20.08.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 08:49:06 -0800 (PST) Received: (nullmailer pid 1580253 invoked by uid 1000); Thu, 20 Jan 2022 16:49:05 -0000 Date: Thu, 20 Jan 2022 10:49:05 -0600 From: Rob Herring To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Lorenzo Pieralisi , Bjorn Helgaas , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?iso-8859-1?Q?Beh=FAn?= , Russell King , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 08/11] PCI: mvebu: Use child_ops API Message-ID: References: <20220105150239.9628-1-pali@kernel.org> <20220112151814.24361-1-pali@kernel.org> <20220112151814.24361-9-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220112151814.24361-9-pali@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 12, 2022 at 04:18:11PM +0100, Pali Rohár wrote: > Split struct pci_ops between ops and child_ops. Member ops is used for > accessing PCIe Root Ports via pci-bridge-emul.c driver and child_ops for > accessing real PCIe cards. > > There is no need to mix these two struct pci_ops into one as PCI core code > already provides separate callbacks via bridge->ops and bridge->child_ops. > > Signed-off-by: Pali Rohár > --- > drivers/pci/controller/pci-mvebu.c | 82 ++++++++++++++++-------------- > 1 file changed, 44 insertions(+), 38 deletions(-) > > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c > index 9ea2f6a7c2b0..1e90ab888075 100644 > --- a/drivers/pci/controller/pci-mvebu.c > +++ b/drivers/pci/controller/pci-mvebu.c > @@ -294,11 +294,29 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port) > mvebu_writel(port, mask, PCIE_MASK_OFF); > } > > -static int mvebu_pcie_hw_rd_conf(struct mvebu_pcie_port *port, > - struct pci_bus *bus, > - u32 devfn, int where, int size, u32 *val) > +static struct mvebu_pcie_port *mvebu_pcie_find_port(struct mvebu_pcie *pcie, > + struct pci_bus *bus, > + int devfn); > + > +static int mvebu_pcie_child_rd_conf(struct pci_bus *bus, u32 devfn, int where, > + int size, u32 *val) > { > - void __iomem *conf_data = port->base + PCIE_CONF_DATA_OFF; > + struct mvebu_pcie *pcie = bus->sysdata; > + struct mvebu_pcie_port *port; > + void __iomem *conf_data; > + > + port = mvebu_pcie_find_port(pcie, bus, devfn); > + if (!port) { > + *val = 0xffffffff; > + return PCIBIOS_DEVICE_NOT_FOUND; > + } > + > + if (!mvebu_pcie_link_up(port)) { > + *val = 0xffffffff; > + return PCIBIOS_DEVICE_NOT_FOUND; > + } > + > + conf_data = port->base + PCIE_CONF_DATA_OFF; > > mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), > PCIE_CONF_ADDR_OFF); > @@ -321,11 +339,21 @@ static int mvebu_pcie_hw_rd_conf(struct mvebu_pcie_port *port, > return PCIBIOS_SUCCESSFUL; > } > > -static int mvebu_pcie_hw_wr_conf(struct mvebu_pcie_port *port, > - struct pci_bus *bus, > - u32 devfn, int where, int size, u32 val) > +static int mvebu_pcie_child_wr_conf(struct pci_bus *bus, u32 devfn, > + int where, int size, u32 val) > { > - void __iomem *conf_data = port->base + PCIE_CONF_DATA_OFF; > + struct mvebu_pcie *pcie = bus->sysdata; > + struct mvebu_pcie_port *port; > + void __iomem *conf_data; > + > + port = mvebu_pcie_find_port(pcie, bus, devfn); > + if (!port) > + return PCIBIOS_DEVICE_NOT_FOUND; > + > + if (!mvebu_pcie_link_up(port)) > + return PCIBIOS_DEVICE_NOT_FOUND; > + > + conf_data = port->base + PCIE_CONF_DATA_OFF; Again, the same setup code in read and write is a sign to use .map_bus(). You can copy it from my version I pointed you to. Rob From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5506C433EF for ; Thu, 20 Jan 2022 16:50:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hGCaDx4Nh9Ip0aIYESG3R27PnYQI0XLHjqhbdbAZ8JU=; b=0bzU+CM38APtYT KeRy2K7hugyipn2o5+1vzKWdeITNAxZdtQ0jTkx3uvq5vDhQuRsXPKoKuWu4qsYxD7DiNYWpBqiFg Pu44pUi5L144ism70RfzO+Aw6SXqp5gNqiHaucvlyND4O82f8Cqr3rVgE2ZfDJRCxhlBpBgqnTZVm LDc33L/Kor2pq9ZV3SSon3qA5Fx52TA9MOxd7JwKSR2vOkbXrCpbpcMMrbZ3NtgP71WneZkisov40 k8jSTK3vs4eXHp2S8m3Rxylh18IQr27yOTROX++5nN5cYHpYj9TaeS1Fg6t7hJnn7RMU80XQNHPEd vULwygutfO20VprBO+QA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAacZ-00CS6V-M0; Thu, 20 Jan 2022 16:49:11 +0000 Received: from mail-oi1-f170.google.com ([209.85.167.170]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAacW-00CS5r-3z for linux-arm-kernel@lists.infradead.org; Thu, 20 Jan 2022 16:49:09 +0000 Received: by mail-oi1-f170.google.com with SMTP id bb37so9749860oib.1 for ; Thu, 20 Jan 2022 08:49:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=atLkBu3N/RFCjhoQCUPCGUzf/CIlAjhcm9ghJHrFyPo=; b=bPKKfjuqX6N9QE0uNqdlQrS6PQOXrFU6DD7LcLEubHCVuQaHTBdbbeqkqRDHDi8Qrp ibxuR4lo0YfjXyKFqkUzvxPy6CeSI02/MuIECwHqxVEkT4xJAZI1sjlehoj6Iimdyn7R 798bzU2ac+cmxm29NBqPNtr3C9z5dER2cbhMNAMe8lnZq7je78NF7Xfjt/fRdJ3mcgmj IrjMPDsAOAWtutqzF6oCANaOTo7yr0WqLcg79rIHyQQezZ/APVWIolHknCXIQshLFzu4 LqAMdk45J/awTnRU41TOZ1t9q3nKAF1gPEr7+l9IwUP3p2dwhnqeQAxow9wz80dE2R8Q 2M1A== X-Gm-Message-State: AOAM532TBaVu4XYYykpAszAULc8sPJJ9VqKpKbAf+biYA/4TRwxsvdtm UcI0qLP0pWEWuWQIEd0MdQ== X-Google-Smtp-Source: ABdhPJw6rfhYcEudPb8hkyG0JB3JIC9ChkgIAC4YvkyUefFiL3rdFzoA/qLdUPkxtT08jmgKVIoVkA== X-Received: by 2002:a05:6808:11c5:: with SMTP id p5mr8329266oiv.51.1642697346626; Thu, 20 Jan 2022 08:49:06 -0800 (PST) Received: from robh.at.kernel.org (66-90-148-213.dyn.grandenetworks.net. [66.90.148.213]) by smtp.gmail.com with ESMTPSA id ay14sm2096888oib.5.2022.01.20.08.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 08:49:06 -0800 (PST) Received: (nullmailer pid 1580253 invoked by uid 1000); Thu, 20 Jan 2022 16:49:05 -0000 Date: Thu, 20 Jan 2022 10:49:05 -0600 From: Rob Herring To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Lorenzo Pieralisi , Bjorn Helgaas , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?iso-8859-1?Q?Beh=FAn?= , Russell King , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 08/11] PCI: mvebu: Use child_ops API Message-ID: References: <20220105150239.9628-1-pali@kernel.org> <20220112151814.24361-1-pali@kernel.org> <20220112151814.24361-9-pali@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220112151814.24361-9-pali@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220120_084908_183861_584AC8AB X-CRM114-Status: GOOD ( 20.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jan 12, 2022 at 04:18:11PM +0100, Pali Roh=E1r wrote: > Split struct pci_ops between ops and child_ops. Member ops is used for > accessing PCIe Root Ports via pci-bridge-emul.c driver and child_ops for > accessing real PCIe cards. > = > There is no need to mix these two struct pci_ops into one as PCI core code > already provides separate callbacks via bridge->ops and bridge->child_ops. > = > Signed-off-by: Pali Roh=E1r > --- > drivers/pci/controller/pci-mvebu.c | 82 ++++++++++++++++-------------- > 1 file changed, 44 insertions(+), 38 deletions(-) > = > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/= pci-mvebu.c > index 9ea2f6a7c2b0..1e90ab888075 100644 > --- a/drivers/pci/controller/pci-mvebu.c > +++ b/drivers/pci/controller/pci-mvebu.c > @@ -294,11 +294,29 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_p= ort *port) > mvebu_writel(port, mask, PCIE_MASK_OFF); > } > = > -static int mvebu_pcie_hw_rd_conf(struct mvebu_pcie_port *port, > - struct pci_bus *bus, > - u32 devfn, int where, int size, u32 *val) > +static struct mvebu_pcie_port *mvebu_pcie_find_port(struct mvebu_pcie *p= cie, > + struct pci_bus *bus, > + int devfn); > + > +static int mvebu_pcie_child_rd_conf(struct pci_bus *bus, u32 devfn, int = where, > + int size, u32 *val) > { > - void __iomem *conf_data =3D port->base + PCIE_CONF_DATA_OFF; > + struct mvebu_pcie *pcie =3D bus->sysdata; > + struct mvebu_pcie_port *port; > + void __iomem *conf_data; > + > + port =3D mvebu_pcie_find_port(pcie, bus, devfn); > + if (!port) { > + *val =3D 0xffffffff; > + return PCIBIOS_DEVICE_NOT_FOUND; > + } > + > + if (!mvebu_pcie_link_up(port)) { > + *val =3D 0xffffffff; > + return PCIBIOS_DEVICE_NOT_FOUND; > + } > + > + conf_data =3D port->base + PCIE_CONF_DATA_OFF; > = > mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), > PCIE_CONF_ADDR_OFF); > @@ -321,11 +339,21 @@ static int mvebu_pcie_hw_rd_conf(struct mvebu_pcie_= port *port, > return PCIBIOS_SUCCESSFUL; > } > = > -static int mvebu_pcie_hw_wr_conf(struct mvebu_pcie_port *port, > - struct pci_bus *bus, > - u32 devfn, int where, int size, u32 val) > +static int mvebu_pcie_child_wr_conf(struct pci_bus *bus, u32 devfn, > + int where, int size, u32 val) > { > - void __iomem *conf_data =3D port->base + PCIE_CONF_DATA_OFF; > + struct mvebu_pcie *pcie =3D bus->sysdata; > + struct mvebu_pcie_port *port; > + void __iomem *conf_data; > + > + port =3D mvebu_pcie_find_port(pcie, bus, devfn); > + if (!port) > + return PCIBIOS_DEVICE_NOT_FOUND; > + > + if (!mvebu_pcie_link_up(port)) > + return PCIBIOS_DEVICE_NOT_FOUND; > + > + conf_data =3D port->base + PCIE_CONF_DATA_OFF; Again, the same setup code in read and write is a sign to use = .map_bus(). You can copy it from my version I pointed you to. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel