From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75747C433F5 for ; Fri, 28 Jan 2022 11:22:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230029AbiA1LWu (ORCPT ); Fri, 28 Jan 2022 06:22:50 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:34862 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230191AbiA1LWq (ORCPT ); Fri, 28 Jan 2022 06:22:46 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 35062B8253C; Fri, 28 Jan 2022 11:22:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73199C340E0; Fri, 28 Jan 2022 11:22:42 +0000 (UTC) Date: Fri, 28 Jan 2022 11:22:39 +0000 From: Catalin Marinas To: Mathieu Poirier Cc: Anshuman Khandual , linux-arm-kernel@lists.infradead.org, Will Deacon , Suzuki Poulose , coresight@lists.linaro.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V3 RESEND 0/7] coresight: trbe: Workaround Cortex-A510 erratas Message-ID: References: <1643120437-14352-1-git-send-email-anshuman.khandual@arm.com> <20220127202220.GA2191206@p14s> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 28, 2022 at 10:51:42AM +0000, Catalin Marinas wrote: > On Thu, Jan 27, 2022 at 01:22:20PM -0700, Mathieu Poirier wrote: > > On Tue, Jan 25, 2022 at 07:50:30PM +0530, Anshuman Khandual wrote: > > > Anshuman Khandual (7): > > > arm64: Add Cortex-A510 CPU part definition > > > arm64: errata: Add detection for TRBE ignored system register writes > > > arm64: errata: Add detection for TRBE invalid prohibited states > > > arm64: errata: Add detection for TRBE trace data corruption > > > coresight: trbe: Work around the ignored system register writes > > > coresight: trbe: Work around the invalid prohibited states > > > coresight: trbe: Work around the trace data corruption > > > > > > Documentation/arm64/silicon-errata.rst | 6 + > > > arch/arm64/Kconfig | 59 ++++++++++ > > > arch/arm64/include/asm/cputype.h | 2 + > > > arch/arm64/kernel/cpu_errata.c | 27 +++++ > > > arch/arm64/tools/cpucaps | 3 + > > > drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++----- > > > drivers/hwtracing/coresight/coresight-trbe.h | 8 -- > > > 7 files changed, 183 insertions(+), 36 deletions(-) > > > > I have applied this set and sent a pull request to Catalin for the arm64 > > portion. > > Well, I'm happy for the whole series to go in via Greg's tree or however > the coresight patches go in (that's why I acked them). The last three > patches depend on the first four, so you might as well send them all > together. I'd split the series only if there's a conflict with the arm64 > tree (I haven't checked). I now checked and there's a minor conflict. I can send the arm64 part from your pull request to Linus tonight and you can send the others via the usual coresight path. Thanks. -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5ACB5C433EF for ; Fri, 28 Jan 2022 11:23:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pm7SJ1WwfvPcpRC65FVSMBakBk4X4uZr5wOx+pcdMvA=; b=ui9+8rCi6tDmzA kUmkOVSrBcTW7GuzQgJ7YrO0hyR8DRtC2jWuqTF7SB/0mXBW4sa7zoCkOJ/qDCrf4IYWdMNkYO1XU 6UhGoBcEyj9AMTVdwAmkVE9t1b4bHhNkUzh1dvujUhVBaC8gVaZe1Jnnbk76CCLWS3W/zjdLQNued bmnQb0fa6uB/xyPdXHr2NaZb1tAZGfACe048TSa16fD1cesJ/n2qUpbjW9D27smGSZOAdiLmL5b2G F1znWZejJMLdRsIgHf96UQkJ7qr/gJLe5Jzyd/WKlT58tDma+Uzz9o+V22rjwYNNDsOwSvw5u3RRu Q+u966zQvDkmWBZGUtMQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDPL7-001fYC-M2; Fri, 28 Jan 2022 11:22:49 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDPL4-001fXc-Ms for linux-arm-kernel@lists.infradead.org; Fri, 28 Jan 2022 11:22:48 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5960BB82481; Fri, 28 Jan 2022 11:22:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73199C340E0; Fri, 28 Jan 2022 11:22:42 +0000 (UTC) Date: Fri, 28 Jan 2022 11:22:39 +0000 From: Catalin Marinas To: Mathieu Poirier Cc: Anshuman Khandual , linux-arm-kernel@lists.infradead.org, Will Deacon , Suzuki Poulose , coresight@lists.linaro.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V3 RESEND 0/7] coresight: trbe: Workaround Cortex-A510 erratas Message-ID: References: <1643120437-14352-1-git-send-email-anshuman.khandual@arm.com> <20220127202220.GA2191206@p14s> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220128_032246_915786_7F839102 X-CRM114-Status: GOOD ( 19.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jan 28, 2022 at 10:51:42AM +0000, Catalin Marinas wrote: > On Thu, Jan 27, 2022 at 01:22:20PM -0700, Mathieu Poirier wrote: > > On Tue, Jan 25, 2022 at 07:50:30PM +0530, Anshuman Khandual wrote: > > > Anshuman Khandual (7): > > > arm64: Add Cortex-A510 CPU part definition > > > arm64: errata: Add detection for TRBE ignored system register writes > > > arm64: errata: Add detection for TRBE invalid prohibited states > > > arm64: errata: Add detection for TRBE trace data corruption > > > coresight: trbe: Work around the ignored system register writes > > > coresight: trbe: Work around the invalid prohibited states > > > coresight: trbe: Work around the trace data corruption > > > > > > Documentation/arm64/silicon-errata.rst | 6 + > > > arch/arm64/Kconfig | 59 ++++++++++ > > > arch/arm64/include/asm/cputype.h | 2 + > > > arch/arm64/kernel/cpu_errata.c | 27 +++++ > > > arch/arm64/tools/cpucaps | 3 + > > > drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++----- > > > drivers/hwtracing/coresight/coresight-trbe.h | 8 -- > > > 7 files changed, 183 insertions(+), 36 deletions(-) > > > > I have applied this set and sent a pull request to Catalin for the arm64 > > portion. > > Well, I'm happy for the whole series to go in via Greg's tree or however > the coresight patches go in (that's why I acked them). The last three > patches depend on the first four, so you might as well send them all > together. I'd split the series only if there's a conflict with the arm64 > tree (I haven't checked). I now checked and there's a minor conflict. I can send the arm64 part from your pull request to Linus tonight and you can send the others via the usual coresight path. Thanks. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel