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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] iommu/vt-d: Add RPLS to quirk list to skip TE disabling
Date: Fri, 18 Feb 2022 06:43:32 -0500	[thread overview]
Message-ID: <Yg+GZK6HyTtBawtY@intel.com> (raw)
In-Reply-To: <20220215113818.729239-1-tejaskumarx.surendrakumar.upadhyay@intel.com>

On Tue, Feb 15, 2022 at 05:08:18PM +0530, Tejas Upadhyay wrote:
> The VT-d spec requires (10.4.4 Global Command Register, TE
> field) that:
> 
> Hardware implementations supporting DMA draining must drain
> any in-flight DMA read/write requests queued within the
> Root-Complex before completing the translation enable
> command and reflecting the status of the command through
> the TES field in the Global Status register.
> 
> Unfortunately, some integrated graphic devices fail to do
> so after some kind of power state transition. As the
> result, the system might stuck in iommu_disable_translati
> on(), waiting for the completion of TE transition.
> 
> This adds RPLS to a quirk list for those devices and skips
> TE disabling if the qurik hits.
> 
> Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/4898
> Fixes: LCK-10789
> Tested-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
> Cc: Ashok Raj <ashok.raj@intel.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
> ---
>  drivers/iommu/intel/iommu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 639e4438827e..bd6dac90a948 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -5741,7 +5741,7 @@ static void quirk_igfx_skip_te_disable(struct pci_dev *dev)
>  	ver = (dev->device >> 8) & 0xff;
>  	if (ver != 0x45 && ver != 0x46 && ver != 0x4c &&
>  	    ver != 0x4e && ver != 0x8a && ver != 0x98 &&
> -	    ver != 0x9a)
> +	    ver != 0x9a && ver != 0xa7)

It is the first time that I look to this code here. I believe that instead of this
if we should be listing the devices individually, probably using the
DECLARE_PCI_FIXUP_HEADER or some other way to make it clear and explicit the opt-in
on the quirk.

Anyway, the addition of this one here is needed and the rest can be in a follow-up:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Cc: Baolu Lu <baolu.lu@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>

Baolu, David, could we push this through drm-intel?

>  		return;
>  
>  	if (risky_device(dev))
> -- 
> 2.34.1
> 

  parent reply	other threads:[~2022-02-18 11:43 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-15 11:38 [Intel-gfx] [PATCH] iommu/vt-d: Add RPLS to quirk list to skip TE disabling Tejas Upadhyay
2022-02-16  7:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-02-16 12:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-18 11:43 ` Rodrigo Vivi [this message]
2022-03-02  4:32 [Intel-gfx] [PATCH] " Tejas Upadhyay

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