* [PATCH V3 2/7] drm/amd/pm: unify the interface for retrieving enabled ppfeatures
2022-01-28 7:04 [PATCH V3 1/7] drm/amd/pm: correct the way for retrieving enabled ppfeatures on Renoir Evan Quan
@ 2022-01-28 7:04 ` Evan Quan
2022-01-28 14:53 ` Deucher, Alexander
2022-01-28 7:04 ` [PATCH V3 3/7] drm/amd/pm: update the data type " Evan Quan
` (4 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Evan Quan @ 2022-01-28 7:04 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
Instead of having two which do the same thing.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I6302c9b5abdb999c4b7c83a0d1852181208b1c1f
--
v1->v2:
- use SMU IP version check rather than an asic type check(Alex)
---
.../amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 2 +-
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 6 +-
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 6 +-
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 95 ++++++++-----------
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h | 4 -
5 files changed, 46 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
index 2f57333e6071..cc080a0075ee 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
@@ -357,7 +357,7 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu)
if (adev->in_suspend)
return false;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return false;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 721027917f81..b4a3c9b8b54e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -507,7 +507,7 @@ static bool vangogh_is_dpm_running(struct smu_context *smu)
if (adev->in_suspend)
return false;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return false;
@@ -1965,7 +1965,7 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
if (!en)
return ret;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return ret;
@@ -2182,7 +2182,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.dpm_set_jpeg_enable = vangogh_dpm_set_jpeg_enable,
.is_dpm_running = vangogh_is_dpm_running,
.read_sensor = vangogh_read_sensor,
- .get_enabled_mask = smu_cmn_get_enabled_32_bits_mask,
+ .get_enabled_mask = smu_cmn_get_enabled_mask,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
.set_watermarks_table = vangogh_set_watermarks_table,
.set_driver_table_location = smu_v11_0_set_driver_table_location,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index bd24a2632214..f425827e2361 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -209,7 +209,7 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
if (!en)
return ret;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return ret;
@@ -258,7 +258,7 @@ static bool yellow_carp_is_dpm_running(struct smu_context *smu)
uint32_t feature_mask[2];
uint64_t feature_enabled;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return false;
@@ -1174,7 +1174,7 @@ static const struct pptable_funcs yellow_carp_ppt_funcs = {
.is_dpm_running = yellow_carp_is_dpm_running,
.set_watermarks_table = yellow_carp_set_watermarks_table,
.get_gpu_metrics = yellow_carp_get_gpu_metrics,
- .get_enabled_mask = smu_cmn_get_enabled_32_bits_mask,
+ .get_enabled_mask = smu_cmn_get_enabled_mask,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
.set_driver_table_location = smu_v13_0_set_driver_table_location,
.gfx_off_control = smu_v13_0_gfx_off_control,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index c3c679bf9d9f..c2e6c8b603da 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -545,67 +545,59 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint32_t *feature_mask,
uint32_t num)
{
- uint32_t feature_mask_high = 0, feature_mask_low = 0;
struct smu_feature *feature = &smu->smu_feature;
+ struct amdgpu_device *adev = smu->adev;
+ uint32_t *feature_mask_high;
+ uint32_t *feature_mask_low;
int ret = 0;
if (!feature_mask || num < 2)
return -EINVAL;
- if (bitmap_empty(feature->enabled, feature->feature_num)) {
- ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh, &feature_mask_high);
- if (ret)
- return ret;
-
- ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow, &feature_mask_low);
- if (ret)
- return ret;
-
- feature_mask[0] = feature_mask_low;
- feature_mask[1] = feature_mask_high;
- } else {
- bitmap_copy((unsigned long *)feature_mask, feature->enabled,
+ if (!bitmap_empty(feature->enabled, feature->feature_num)) {
+ bitmap_copy((unsigned long *)feature_mask,
+ feature->enabled,
feature->feature_num);
+ return 0;
}
- return ret;
-}
-
-int smu_cmn_get_enabled_32_bits_mask(struct smu_context *smu,
- uint32_t *feature_mask,
- uint32_t num)
-{
- uint32_t feature_mask_en_low = 0;
- uint32_t feature_mask_en_high = 0;
- struct smu_feature *feature = &smu->smu_feature;
- int ret = 0;
-
- if (!feature_mask || num < 2)
- return -EINVAL;
-
- if (bitmap_empty(feature->enabled, feature->feature_num)) {
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetEnabledSmuFeatures, 0,
- &feature_mask_en_low);
+ feature_mask_low = &feature_mask[0];
+ feature_mask_high = &feature_mask[1];
+ switch (adev->ip_versions[MP1_HWIP][0]) {
+ case IP_VERSION(11, 0, 8):
+ case IP_VERSION(11, 5, 0):
+ case IP_VERSION(13, 0, 1):
+ case IP_VERSION(13, 0, 3):
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_GetEnabledSmuFeatures,
+ 0,
+ feature_mask_low);
if (ret)
return ret;
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetEnabledSmuFeatures, 1,
- &feature_mask_en_high);
-
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_GetEnabledSmuFeatures,
+ 1,
+ feature_mask_high);
+ break;
+ case IP_VERSION(12, 0, 0):
+ case IP_VERSION(12, 0, 1):
+ /* other dGPU ASICs */
+ default:
+ ret = smu_cmn_send_smc_msg(smu,
+ SMU_MSG_GetEnabledSmuFeaturesHigh,
+ feature_mask_high);
if (ret)
return ret;
- feature_mask[0] = feature_mask_en_low;
- feature_mask[1] = feature_mask_en_high;
-
- } else {
- bitmap_copy((unsigned long *)feature_mask, feature->enabled,
- feature->feature_num);
+ ret = smu_cmn_send_smc_msg(smu,
+ SMU_MSG_GetEnabledSmuFeaturesLow,
+ feature_mask_low);
+ break;
}
return ret;
-
}
uint64_t smu_cmn_get_indep_throttler_status(
@@ -710,20 +702,11 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
size_t size = 0;
int ret = 0, i;
- if (!smu->is_apu ||
- (smu->adev->asic_type == CHIP_RENOIR)) {
- ret = smu_cmn_get_enabled_mask(smu,
- feature_mask,
- 2);
- if (ret)
- return 0;
- } else {
- ret = smu_cmn_get_enabled_32_bits_mask(smu,
- feature_mask,
- 2);
- if (ret)
- return 0;
- }
+ ret = smu_cmn_get_enabled_mask(smu,
+ feature_mask,
+ 2);
+ if (ret)
+ return 0;
size = sysfs_emit_at(buf, size, "features high: 0x%08x low: 0x%08x\n",
feature_mask[1], feature_mask[0]);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index f0b4fb2a0960..4e34c18c6063 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -61,10 +61,6 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint32_t *feature_mask,
uint32_t num);
-int smu_cmn_get_enabled_32_bits_mask(struct smu_context *smu,
- uint32_t *feature_mask,
- uint32_t num);
-
uint64_t smu_cmn_get_indep_throttler_status(
const unsigned long dep_status,
const uint8_t *throttler_map);
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH V3 2/7] drm/amd/pm: unify the interface for retrieving enabled ppfeatures
2022-01-28 7:04 ` [PATCH V3 2/7] drm/amd/pm: unify the interface for retrieving enabled ppfeatures Evan Quan
@ 2022-01-28 14:53 ` Deucher, Alexander
0 siblings, 0 replies; 13+ messages in thread
From: Deucher, Alexander @ 2022-01-28 14:53 UTC (permalink / raw)
To: Quan, Evan, amd-gfx; +Cc: Lazar, Lijo
[-- Attachment #1: Type: text/plain, Size: 11020 bytes --]
[Public]
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Quan, Evan <Evan.Quan@amd.com>
Sent: Friday, January 28, 2022 2:04 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH V3 2/7] drm/amd/pm: unify the interface for retrieving enabled ppfeatures
Instead of having two which do the same thing.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I6302c9b5abdb999c4b7c83a0d1852181208b1c1f
--
v1->v2:
- use SMU IP version check rather than an asic type check(Alex)
---
.../amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 2 +-
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 6 +-
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 6 +-
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 95 ++++++++-----------
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h | 4 -
5 files changed, 46 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
index 2f57333e6071..cc080a0075ee 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
@@ -357,7 +357,7 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu)
if (adev->in_suspend)
return false;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return false;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 721027917f81..b4a3c9b8b54e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -507,7 +507,7 @@ static bool vangogh_is_dpm_running(struct smu_context *smu)
if (adev->in_suspend)
return false;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return false;
@@ -1965,7 +1965,7 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
if (!en)
return ret;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return ret;
@@ -2182,7 +2182,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.dpm_set_jpeg_enable = vangogh_dpm_set_jpeg_enable,
.is_dpm_running = vangogh_is_dpm_running,
.read_sensor = vangogh_read_sensor,
- .get_enabled_mask = smu_cmn_get_enabled_32_bits_mask,
+ .get_enabled_mask = smu_cmn_get_enabled_mask,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
.set_watermarks_table = vangogh_set_watermarks_table,
.set_driver_table_location = smu_v11_0_set_driver_table_location,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index bd24a2632214..f425827e2361 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -209,7 +209,7 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
if (!en)
return ret;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return ret;
@@ -258,7 +258,7 @@ static bool yellow_carp_is_dpm_running(struct smu_context *smu)
uint32_t feature_mask[2];
uint64_t feature_enabled;
- ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
if (ret)
return false;
@@ -1174,7 +1174,7 @@ static const struct pptable_funcs yellow_carp_ppt_funcs = {
.is_dpm_running = yellow_carp_is_dpm_running,
.set_watermarks_table = yellow_carp_set_watermarks_table,
.get_gpu_metrics = yellow_carp_get_gpu_metrics,
- .get_enabled_mask = smu_cmn_get_enabled_32_bits_mask,
+ .get_enabled_mask = smu_cmn_get_enabled_mask,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
.set_driver_table_location = smu_v13_0_set_driver_table_location,
.gfx_off_control = smu_v13_0_gfx_off_control,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index c3c679bf9d9f..c2e6c8b603da 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -545,67 +545,59 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint32_t *feature_mask,
uint32_t num)
{
- uint32_t feature_mask_high = 0, feature_mask_low = 0;
struct smu_feature *feature = &smu->smu_feature;
+ struct amdgpu_device *adev = smu->adev;
+ uint32_t *feature_mask_high;
+ uint32_t *feature_mask_low;
int ret = 0;
if (!feature_mask || num < 2)
return -EINVAL;
- if (bitmap_empty(feature->enabled, feature->feature_num)) {
- ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh, &feature_mask_high);
- if (ret)
- return ret;
-
- ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow, &feature_mask_low);
- if (ret)
- return ret;
-
- feature_mask[0] = feature_mask_low;
- feature_mask[1] = feature_mask_high;
- } else {
- bitmap_copy((unsigned long *)feature_mask, feature->enabled,
+ if (!bitmap_empty(feature->enabled, feature->feature_num)) {
+ bitmap_copy((unsigned long *)feature_mask,
+ feature->enabled,
feature->feature_num);
+ return 0;
}
- return ret;
-}
-
-int smu_cmn_get_enabled_32_bits_mask(struct smu_context *smu,
- uint32_t *feature_mask,
- uint32_t num)
-{
- uint32_t feature_mask_en_low = 0;
- uint32_t feature_mask_en_high = 0;
- struct smu_feature *feature = &smu->smu_feature;
- int ret = 0;
-
- if (!feature_mask || num < 2)
- return -EINVAL;
-
- if (bitmap_empty(feature->enabled, feature->feature_num)) {
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetEnabledSmuFeatures, 0,
- &feature_mask_en_low);
+ feature_mask_low = &feature_mask[0];
+ feature_mask_high = &feature_mask[1];
+ switch (adev->ip_versions[MP1_HWIP][0]) {
+ case IP_VERSION(11, 0, 8):
+ case IP_VERSION(11, 5, 0):
+ case IP_VERSION(13, 0, 1):
+ case IP_VERSION(13, 0, 3):
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_GetEnabledSmuFeatures,
+ 0,
+ feature_mask_low);
if (ret)
return ret;
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetEnabledSmuFeatures, 1,
- &feature_mask_en_high);
-
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_GetEnabledSmuFeatures,
+ 1,
+ feature_mask_high);
+ break;
+ case IP_VERSION(12, 0, 0):
+ case IP_VERSION(12, 0, 1):
+ /* other dGPU ASICs */
+ default:
+ ret = smu_cmn_send_smc_msg(smu,
+ SMU_MSG_GetEnabledSmuFeaturesHigh,
+ feature_mask_high);
if (ret)
return ret;
- feature_mask[0] = feature_mask_en_low;
- feature_mask[1] = feature_mask_en_high;
-
- } else {
- bitmap_copy((unsigned long *)feature_mask, feature->enabled,
- feature->feature_num);
+ ret = smu_cmn_send_smc_msg(smu,
+ SMU_MSG_GetEnabledSmuFeaturesLow,
+ feature_mask_low);
+ break;
}
return ret;
-
}
uint64_t smu_cmn_get_indep_throttler_status(
@@ -710,20 +702,11 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
size_t size = 0;
int ret = 0, i;
- if (!smu->is_apu ||
- (smu->adev->asic_type == CHIP_RENOIR)) {
- ret = smu_cmn_get_enabled_mask(smu,
- feature_mask,
- 2);
- if (ret)
- return 0;
- } else {
- ret = smu_cmn_get_enabled_32_bits_mask(smu,
- feature_mask,
- 2);
- if (ret)
- return 0;
- }
+ ret = smu_cmn_get_enabled_mask(smu,
+ feature_mask,
+ 2);
+ if (ret)
+ return 0;
size = sysfs_emit_at(buf, size, "features high: 0x%08x low: 0x%08x\n",
feature_mask[1], feature_mask[0]);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index f0b4fb2a0960..4e34c18c6063 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -61,10 +61,6 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint32_t *feature_mask,
uint32_t num);
-int smu_cmn_get_enabled_32_bits_mask(struct smu_context *smu,
- uint32_t *feature_mask,
- uint32_t num);
-
uint64_t smu_cmn_get_indep_throttler_status(
const unsigned long dep_status,
const uint8_t *throttler_map);
--
2.29.0
[-- Attachment #2: Type: text/html, Size: 26071 bytes --]
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V3 3/7] drm/amd/pm: update the data type for retrieving enabled ppfeatures
2022-01-28 7:04 [PATCH V3 1/7] drm/amd/pm: correct the way for retrieving enabled ppfeatures on Renoir Evan Quan
2022-01-28 7:04 ` [PATCH V3 2/7] drm/amd/pm: unify the interface for retrieving enabled ppfeatures Evan Quan
@ 2022-01-28 7:04 ` Evan Quan
2022-01-28 7:04 ` [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure Evan Quan
` (3 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Evan Quan @ 2022-01-28 7:04 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Lijo.Lazar, Evan Quan
Use uint64_t instead of an array of uint32_t. This can avoid
some non-necessary intermediate uint32_t -> uint64_t conversions.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Change-Id: I4e217357203a23440f058d7e25f55eaebd15c5ef
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 +-
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 5 ++--
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 5 +---
.../amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 6 +---
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 5 +---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 5 +---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 4 +--
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 10 ++-----
.../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 7 ++---
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 +--
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 9 ++----
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 29 +++++++------------
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h | 3 +-
drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 2 +-
14 files changed, 32 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 9861d70a5dad..ae48cc5aa567 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2310,7 +2310,7 @@ static int smu_read_sensor(void *handle,
*size = 4;
break;
case AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK:
- ret = smu_feature_get_enabled_mask(smu, (uint32_t *)data, 2);
+ ret = smu_feature_get_enabled_mask(smu, (uint64_t *)data);
*size = 8;
break;
case AMDGPU_PP_SENSOR_UVD_POWER:
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 4c585241ef66..8cd1c3bb595a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -975,10 +975,9 @@ struct pptable_funcs {
/**
* @get_enabled_mask: Get a mask of features that are currently enabled
* on the SMU.
- * &feature_mask: Array representing enabled feature mask.
- * &num: Elements in &feature_mask.
+ * &feature_mask: Enabled feature mask.
*/
- int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
+ int (*get_enabled_mask)(struct smu_context *smu, uint64_t *feature_mask);
/**
* @feature_is_enabled: Test if a feature is enabled.
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index ee296441c5bc..63f2b50cd486 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -2022,15 +2022,12 @@ static void arcturus_dump_pptable(struct smu_context *smu)
static bool arcturus_is_dpm_running(struct smu_context *smu)
{
int ret = 0;
- uint32_t feature_mask[2];
uint64_t feature_enabled;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
if (ret)
return false;
- feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
-
return !!(feature_enabled & SMC_DPM_FEATURE);
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
index cc080a0075ee..2b38a9154dd4 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
@@ -350,20 +350,16 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
int ret = 0;
- uint32_t feature_mask[2];
uint64_t feature_enabled;
/* we need to re-init after suspend so return false */
if (adev->in_suspend)
return false;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
if (ret)
return false;
- feature_enabled = (uint64_t)feature_mask[0] |
- ((uint64_t)feature_mask[1] << 32);
-
/*
* cyan_skillfish specific, query default sclk inseted of hard code.
*/
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 4a86520d01c3..84cbde3f913d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1639,15 +1639,12 @@ static int navi10_display_config_changed(struct smu_context *smu)
static bool navi10_is_dpm_running(struct smu_context *smu)
{
int ret = 0;
- uint32_t feature_mask[2];
uint64_t feature_enabled;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
if (ret)
return false;
- feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
-
return !!(feature_enabled & SMC_DPM_FEATURE);
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 22dd372b8d24..b6759f8b5167 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -1297,15 +1297,12 @@ static int sienna_cichlid_display_config_changed(struct smu_context *smu)
static bool sienna_cichlid_is_dpm_running(struct smu_context *smu)
{
int ret = 0;
- uint32_t feature_mask[2];
uint64_t feature_enabled;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
if (ret)
return false;
- feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
-
return !!(feature_enabled & SMC_DPM_FEATURE);
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index b58a4c2823c2..b34d3a416939 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -799,7 +799,7 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
bool en)
{
struct smu_feature *feature = &smu->smu_feature;
- uint32_t feature_mask[2];
+ uint64_t feature_mask;
int ret = 0;
ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
@@ -811,7 +811,7 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
bitmap_zero(feature->supported, feature->feature_num);
if (en) {
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index b4a3c9b8b54e..65f30cdafc8f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -500,21 +500,17 @@ static bool vangogh_is_dpm_running(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
int ret = 0;
- uint32_t feature_mask[2];
uint64_t feature_enabled;
/* we need to re-init after suspend so return false */
if (adev->in_suspend)
return false;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
if (ret)
return false;
- feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
- ((uint64_t)feature_mask[1] << 32));
-
return !!(feature_enabled & SMC_DPM_FEATURE);
}
@@ -1952,7 +1948,7 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
{
struct amdgpu_device *adev = smu->adev;
struct smu_feature *feature = &smu->smu_feature;
- uint32_t feature_mask[2];
+ uint64_t feature_mask;
int ret = 0;
if (adev->pm.fw_version >= 0x43f1700 && !en)
@@ -1965,7 +1961,7 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
if (!en)
return ret;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index ba4c9771ffc5..57f21aa08767 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1450,14 +1450,11 @@ static int aldebaran_usr_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_
static bool aldebaran_is_dpm_running(struct smu_context *smu)
{
int ret;
- uint32_t feature_mask[2];
- unsigned long feature_enabled;
+ uint64_t feature_enabled;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
if (ret)
return false;
- feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
- ((uint64_t)feature_mask[1] << 32));
return !!(feature_enabled & SMC_DPM_FEATURE);
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 1754a3720179..6b77fc4b4698 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -765,7 +765,7 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
bool en)
{
struct smu_feature *feature = &smu->smu_feature;
- uint32_t feature_mask[2];
+ uint64_t feature_mask;
int ret = 0;
ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
@@ -777,7 +777,7 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
bitmap_zero(feature->supported, feature->feature_num);
if (en) {
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index f425827e2361..a7aabb8079ed 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -197,7 +197,7 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
{
struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
- uint32_t feature_mask[2];
+ uint64_t feature_mask;
int ret = 0;
if (!en && !adev->in_s0ix)
@@ -209,7 +209,7 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
if (!en)
return ret;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
if (ret)
return ret;
@@ -255,16 +255,13 @@ static int yellow_carp_dpm_set_jpeg_enable(struct smu_context *smu, bool enable)
static bool yellow_carp_is_dpm_running(struct smu_context *smu)
{
int ret = 0;
- uint32_t feature_mask[2];
uint64_t feature_enabled;
- ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
+ ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
if (ret)
return false;
- feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
-
return !!(feature_enabled & SMC_DPM_FEATURE);
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index c2e6c8b603da..aae08ce62b80 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -542,8 +542,7 @@ bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
}
int smu_cmn_get_enabled_mask(struct smu_context *smu,
- uint32_t *feature_mask,
- uint32_t num)
+ uint64_t *feature_mask)
{
struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
@@ -551,7 +550,7 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint32_t *feature_mask_low;
int ret = 0;
- if (!feature_mask || num < 2)
+ if (!feature_mask)
return -EINVAL;
if (!bitmap_empty(feature->enabled, feature->feature_num)) {
@@ -561,8 +560,8 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
return 0;
}
- feature_mask_low = &feature_mask[0];
- feature_mask_high = &feature_mask[1];
+ feature_mask_low = &((uint32_t *)feature_mask)[0];
+ feature_mask_high = &((uint32_t *)feature_mask)[1];
switch (adev->ip_versions[MP1_HWIP][0]) {
case IP_VERSION(11, 0, 8):
@@ -695,7 +694,7 @@ static const char *smu_get_feature_name(struct smu_context *smu,
size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
char *buf)
{
- uint32_t feature_mask[2] = { 0 };
+ uint64_t feature_mask;
int feature_index = 0;
uint32_t count = 0;
int8_t sort_feature[SMU_FEATURE_COUNT];
@@ -703,13 +702,12 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
int ret = 0, i;
ret = smu_cmn_get_enabled_mask(smu,
- feature_mask,
- 2);
+ &feature_mask);
if (ret)
return 0;
size = sysfs_emit_at(buf, size, "features high: 0x%08x low: 0x%08x\n",
- feature_mask[1], feature_mask[0]);
+ upper_32_bits(feature_mask), lower_32_bits(feature_mask));
memset(sort_feature, -1, sizeof(sort_feature));
@@ -745,22 +743,17 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
uint64_t new_mask)
{
int ret = 0;
- uint32_t feature_mask[2] = { 0 };
+ uint64_t feature_mask;
uint64_t feature_2_enabled = 0;
uint64_t feature_2_disabled = 0;
- uint64_t feature_enables = 0;
ret = smu_cmn_get_enabled_mask(smu,
- feature_mask,
- 2);
+ &feature_mask);
if (ret)
return ret;
- feature_enables = ((uint64_t)feature_mask[1] << 32 |
- (uint64_t)feature_mask[0]);
-
- feature_2_enabled = ~feature_enables & new_mask;
- feature_2_disabled = feature_enables & ~new_mask;
+ feature_2_enabled = ~feature_mask & new_mask;
+ feature_2_disabled = feature_mask & ~new_mask;
if (feature_2_enabled) {
ret = smu_cmn_feature_update_enable_state(smu,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index 4e34c18c6063..bfe3430829c7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -58,8 +58,7 @@ bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
enum smu_clk_type clk_type);
int smu_cmn_get_enabled_mask(struct smu_context *smu,
- uint32_t *feature_mask,
- uint32_t num);
+ uint64_t *feature_mask);
uint64_t smu_cmn_get_indep_throttler_status(
const unsigned long dep_status,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
index a290b5789195..0063346ed163 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
@@ -55,7 +55,7 @@
#define smu_send_smc_msg(smu, msg, read_arg) smu_ppt_funcs(send_smc_msg, 0, smu, msg, read_arg)
#define smu_init_display_count(smu, count) smu_ppt_funcs(init_display_count, 0, smu, count)
#define smu_feature_set_allowed_mask(smu) smu_ppt_funcs(set_allowed_mask, 0, smu)
-#define smu_feature_get_enabled_mask(smu, mask, num) smu_ppt_funcs(get_enabled_mask, 0, smu, mask, num)
+#define smu_feature_get_enabled_mask(smu, mask) smu_ppt_funcs(get_enabled_mask, 0, smu, mask)
#define smu_feature_is_enabled(smu, mask) smu_ppt_funcs(feature_is_enabled, 0, smu, mask)
#define smu_disable_all_features_with_exception(smu, no_hw_disablement, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, no_hw_disablement, mask)
#define smu_is_dpm_running(smu) smu_ppt_funcs(is_dpm_running, 0 , smu)
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure
2022-01-28 7:04 [PATCH V3 1/7] drm/amd/pm: correct the way for retrieving enabled ppfeatures on Renoir Evan Quan
2022-01-28 7:04 ` [PATCH V3 2/7] drm/amd/pm: unify the interface for retrieving enabled ppfeatures Evan Quan
2022-01-28 7:04 ` [PATCH V3 3/7] drm/amd/pm: update the data type " Evan Quan
@ 2022-01-28 7:04 ` Evan Quan
2022-01-28 14:54 ` Deucher, Alexander
2022-02-08 18:24 ` Nathan Chancellor
2022-01-28 7:04 ` [PATCH V3 5/7] drm/amd/pm: drop the cache for enabled ppfeatures Evan Quan
` (2 subsequent siblings)
5 siblings, 2 replies; 13+ messages in thread
From: Evan Quan @ 2022-01-28 7:04 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
The supported features should be retrieved just after EnableAllDpmFeatures message
complete. And the check(whether some dpm feature is supported) is only needed when we
decide to enable or disable it.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I07c9a5ac5290cd0d88a40ce1768d393156419b5a
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 11 +++++++++++
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 8 ++++----
.../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 10 +++++-----
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 ---
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 5 +----
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 3 ---
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 3 ---
7 files changed, 21 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index ae48cc5aa567..803068cb5079 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1057,8 +1057,10 @@ static int smu_get_thermal_temperature_range(struct smu_context *smu)
static int smu_smc_hw_setup(struct smu_context *smu)
{
+ struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
uint32_t pcie_gen = 0, pcie_width = 0;
+ uint64_t features_supported;
int ret = 0;
if (adev->in_suspend && smu_is_dpm_running(smu)) {
@@ -1138,6 +1140,15 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret;
}
+ ret = smu_feature_get_enabled_mask(smu, &features_supported);
+ if (ret) {
+ dev_err(adev->dev, "Failed to retrieve supported dpm features!\n");
+ return ret;
+ }
+ bitmap_copy(feature->supported,
+ (unsigned long *)&features_supported,
+ feature->feature_num);
+
if (!smu_is_dpm_running(smu))
dev_info(adev->dev, "dpm has been disabled\n");
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 84cbde3f913d..f55ead5f9aba 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1624,8 +1624,8 @@ static int navi10_display_config_changed(struct smu_context *smu)
int ret = 0;
if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays,
smu->display_config->num_display,
NULL);
@@ -1860,13 +1860,13 @@ static int navi10_notify_smc_display_config(struct smu_context *smu)
min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk;
min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
clock_req.clock_type = amd_pp_dcef_clock;
clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
if (!ret) {
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_SetMinDeepSleepDcefclk,
min_clocks.dcef_clock_in_sr/100,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index b6759f8b5167..804e1c98238d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -1280,8 +1280,8 @@ static int sienna_cichlid_display_config_changed(struct smu_context *smu)
int ret = 0;
if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
#if 0
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays,
smu->display_config->num_display,
@@ -1517,13 +1517,13 @@ static int sienna_cichlid_notify_smc_display_config(struct smu_context *smu)
min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk;
min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
clock_req.clock_type = amd_pp_dcef_clock;
clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
if (!ret) {
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_SetMinDeepSleepDcefclk,
min_clocks.dcef_clock_in_sr/100,
@@ -3785,7 +3785,7 @@ static int sienna_cichlid_gpo_control(struct smu_context *smu,
int ret = 0;
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) {
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index b34d3a416939..d36b64371492 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -808,7 +808,6 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
return ret;
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (en) {
ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
@@ -817,8 +816,6 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
}
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 65f30cdafc8f..478151e72889 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -1956,7 +1956,6 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
RLC_STATUS_OFF, NULL);
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (!en)
return ret;
@@ -1967,8 +1966,6 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
return 0;
}
@@ -1985,7 +1982,7 @@ static int vangogh_post_smu_init(struct smu_context *smu)
adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines;
/* allow message will be sent after enable message on Vangogh*/
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFXCLK_BIT) &&
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) &&
(adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_EnableGfxOff, NULL);
if (ret) {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 6b77fc4b4698..92b5c1108a2e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -774,7 +774,6 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
return ret;
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (en) {
ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
@@ -783,8 +782,6 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
}
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index a7aabb8079ed..d89e8a03651b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -204,7 +204,6 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (!en)
return ret;
@@ -215,8 +214,6 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
return 0;
}
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure
2022-01-28 7:04 ` [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure Evan Quan
@ 2022-01-28 14:54 ` Deucher, Alexander
2022-02-08 18:24 ` Nathan Chancellor
1 sibling, 0 replies; 13+ messages in thread
From: Deucher, Alexander @ 2022-01-28 14:54 UTC (permalink / raw)
To: Quan, Evan, amd-gfx; +Cc: Lazar, Lijo
[-- Attachment #1: Type: text/plain, Size: 11775 bytes --]
[AMD Official Use Only]
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Quan, Evan <Evan.Quan@amd.com>
Sent: Friday, January 28, 2022 2:04 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure
The supported features should be retrieved just after EnableAllDpmFeatures message
complete. And the check(whether some dpm feature is supported) is only needed when we
decide to enable or disable it.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I07c9a5ac5290cd0d88a40ce1768d393156419b5a
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 11 +++++++++++
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 8 ++++----
.../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 10 +++++-----
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 ---
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 5 +----
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 3 ---
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 3 ---
7 files changed, 21 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index ae48cc5aa567..803068cb5079 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1057,8 +1057,10 @@ static int smu_get_thermal_temperature_range(struct smu_context *smu)
static int smu_smc_hw_setup(struct smu_context *smu)
{
+ struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
uint32_t pcie_gen = 0, pcie_width = 0;
+ uint64_t features_supported;
int ret = 0;
if (adev->in_suspend && smu_is_dpm_running(smu)) {
@@ -1138,6 +1140,15 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret;
}
+ ret = smu_feature_get_enabled_mask(smu, &features_supported);
+ if (ret) {
+ dev_err(adev->dev, "Failed to retrieve supported dpm features!\n");
+ return ret;
+ }
+ bitmap_copy(feature->supported,
+ (unsigned long *)&features_supported,
+ feature->feature_num);
+
if (!smu_is_dpm_running(smu))
dev_info(adev->dev, "dpm has been disabled\n");
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 84cbde3f913d..f55ead5f9aba 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1624,8 +1624,8 @@ static int navi10_display_config_changed(struct smu_context *smu)
int ret = 0;
if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays,
smu->display_config->num_display,
NULL);
@@ -1860,13 +1860,13 @@ static int navi10_notify_smc_display_config(struct smu_context *smu)
min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk;
min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
clock_req.clock_type = amd_pp_dcef_clock;
clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
if (!ret) {
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_SetMinDeepSleepDcefclk,
min_clocks.dcef_clock_in_sr/100,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index b6759f8b5167..804e1c98238d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -1280,8 +1280,8 @@ static int sienna_cichlid_display_config_changed(struct smu_context *smu)
int ret = 0;
if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
- smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
+ smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
#if 0
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays,
smu->display_config->num_display,
@@ -1517,13 +1517,13 @@ static int sienna_cichlid_notify_smc_display_config(struct smu_context *smu)
min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk;
min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
clock_req.clock_type = amd_pp_dcef_clock;
clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
if (!ret) {
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_SetMinDeepSleepDcefclk,
min_clocks.dcef_clock_in_sr/100,
@@ -3785,7 +3785,7 @@ static int sienna_cichlid_gpo_control(struct smu_context *smu,
int ret = 0;
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) {
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) {
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index b34d3a416939..d36b64371492 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -808,7 +808,6 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
return ret;
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (en) {
ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
@@ -817,8 +816,6 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
}
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 65f30cdafc8f..478151e72889 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -1956,7 +1956,6 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
RLC_STATUS_OFF, NULL);
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (!en)
return ret;
@@ -1967,8 +1966,6 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
return 0;
}
@@ -1985,7 +1982,7 @@ static int vangogh_post_smu_init(struct smu_context *smu)
adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines;
/* allow message will be sent after enable message on Vangogh*/
- if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFXCLK_BIT) &&
+ if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) &&
(adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_EnableGfxOff, NULL);
if (ret) {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 6b77fc4b4698..92b5c1108a2e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -774,7 +774,6 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
return ret;
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (en) {
ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
@@ -783,8 +782,6 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
}
return ret;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index a7aabb8079ed..d89e8a03651b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -204,7 +204,6 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
bitmap_zero(feature->enabled, feature->feature_num);
- bitmap_zero(feature->supported, feature->feature_num);
if (!en)
return ret;
@@ -215,8 +214,6 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
feature->feature_num);
- bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
- feature->feature_num);
return 0;
}
--
2.29.0
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^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure
2022-01-28 7:04 ` [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure Evan Quan
2022-01-28 14:54 ` Deucher, Alexander
@ 2022-02-08 18:24 ` Nathan Chancellor
1 sibling, 0 replies; 13+ messages in thread
From: Nathan Chancellor @ 2022-02-08 18:24 UTC (permalink / raw)
To: Evan Quan; +Cc: Alexander.Deucher, Lijo.Lazar, amd-gfx
Hi Evan,
On Fri, Jan 28, 2022 at 03:04:52PM +0800, Evan Quan wrote:
> The supported features should be retrieved just after EnableAllDpmFeatures message
> complete. And the check(whether some dpm feature is supported) is only needed when we
> decide to enable or disable it.
>
> Signed-off-by: Evan Quan <evan.quan@amd.com>
> Change-Id: I07c9a5ac5290cd0d88a40ce1768d393156419b5a
> ---
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 11 +++++++++++
> drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 8 ++++----
> .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 10 +++++-----
> drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 ---
> drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 5 +----
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 3 ---
> drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 3 ---
> 7 files changed, 21 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index ae48cc5aa567..803068cb5079 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -1057,8 +1057,10 @@ static int smu_get_thermal_temperature_range(struct smu_context *smu)
>
> static int smu_smc_hw_setup(struct smu_context *smu)
> {
> + struct smu_feature *feature = &smu->smu_feature;
> struct amdgpu_device *adev = smu->adev;
> uint32_t pcie_gen = 0, pcie_width = 0;
> + uint64_t features_supported;
> int ret = 0;
>
> if (adev->in_suspend && smu_is_dpm_running(smu)) {
> @@ -1138,6 +1140,15 @@ static int smu_smc_hw_setup(struct smu_context *smu)
> return ret;
> }
>
> + ret = smu_feature_get_enabled_mask(smu, &features_supported);
> + if (ret) {
> + dev_err(adev->dev, "Failed to retrieve supported dpm features!\n");
> + return ret;
> + }
> + bitmap_copy(feature->supported,
> + (unsigned long *)&features_supported,
> + feature->feature_num);
> +
> if (!smu_is_dpm_running(smu))
> dev_info(adev->dev, "dpm has been disabled\n");
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index 84cbde3f913d..f55ead5f9aba 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -1624,8 +1624,8 @@ static int navi10_display_config_changed(struct smu_context *smu)
> int ret = 0;
>
> if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
> - smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
> - smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
> + smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
> + smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
> ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays,
> smu->display_config->num_display,
> NULL);
> @@ -1860,13 +1860,13 @@ static int navi10_notify_smc_display_config(struct smu_context *smu)
> min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk;
> min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
>
> - if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
> + if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
> clock_req.clock_type = amd_pp_dcef_clock;
> clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
>
> ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
> if (!ret) {
> - if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
> + if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
> ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetMinDeepSleepDcefclk,
> min_clocks.dcef_clock_in_sr/100,
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index b6759f8b5167..804e1c98238d 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -1280,8 +1280,8 @@ static int sienna_cichlid_display_config_changed(struct smu_context *smu)
> int ret = 0;
>
> if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
> - smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
> - smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
> + smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
> + smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
> #if 0
> ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays,
> smu->display_config->num_display,
> @@ -1517,13 +1517,13 @@ static int sienna_cichlid_notify_smc_display_config(struct smu_context *smu)
> min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk;
> min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
>
> - if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
> + if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) {
> clock_req.clock_type = amd_pp_dcef_clock;
> clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
>
> ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
> if (!ret) {
> - if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
> + if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DS_DCEFCLK_BIT)) {
> ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetMinDeepSleepDcefclk,
> min_clocks.dcef_clock_in_sr/100,
> @@ -3785,7 +3785,7 @@ static int sienna_cichlid_gpo_control(struct smu_context *smu,
> int ret = 0;
>
>
> - if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) {
> + if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) {
> ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
> if (ret)
> return ret;
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> index b34d3a416939..d36b64371492 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> @@ -808,7 +808,6 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
> return ret;
>
> bitmap_zero(feature->enabled, feature->feature_num);
> - bitmap_zero(feature->supported, feature->feature_num);
>
> if (en) {
> ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
> @@ -817,8 +816,6 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
>
> bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
> feature->feature_num);
> - bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
> - feature->feature_num);
> }
>
> return ret;
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index 65f30cdafc8f..478151e72889 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -1956,7 +1956,6 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
> RLC_STATUS_OFF, NULL);
>
> bitmap_zero(feature->enabled, feature->feature_num);
> - bitmap_zero(feature->supported, feature->feature_num);
>
> if (!en)
> return ret;
> @@ -1967,8 +1966,6 @@ static int vangogh_system_features_control(struct smu_context *smu, bool en)
>
> bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
> feature->feature_num);
> - bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
> - feature->feature_num);
>
> return 0;
> }
> @@ -1985,7 +1982,7 @@ static int vangogh_post_smu_init(struct smu_context *smu)
> adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines;
>
> /* allow message will be sent after enable message on Vangogh*/
> - if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFXCLK_BIT) &&
> + if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) &&
> (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
> ret = smu_cmn_send_smc_msg(smu, SMU_MSG_EnableGfxOff, NULL);
> if (ret) {
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> index 6b77fc4b4698..92b5c1108a2e 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> @@ -774,7 +774,6 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
> return ret;
>
> bitmap_zero(feature->enabled, feature->feature_num);
> - bitmap_zero(feature->supported, feature->feature_num);
>
> if (en) {
> ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
> @@ -783,8 +782,6 @@ int smu_v13_0_system_features_control(struct smu_context *smu,
>
> bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
> feature->feature_num);
> - bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
> - feature->feature_num);
> }
>
> return ret;
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
> index a7aabb8079ed..d89e8a03651b 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
> @@ -204,7 +204,6 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
> ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
>
> bitmap_zero(feature->enabled, feature->feature_num);
> - bitmap_zero(feature->supported, feature->feature_num);
>
> if (!en)
> return ret;
> @@ -215,8 +214,6 @@ static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
>
> bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
> feature->feature_num);
> - bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
> - feature->feature_num);
>
> return 0;
> }
> --
> 2.29.0
>
>
Apologies if this has been reported or fixed already, I searched the
mailing list but did not see anything.
This change as commit 7ade3ca9cdb5 ("drm/amd/pm: correct the usage for
'supported' member of smu_feature structure") causes the following
errors/stacktrace when booting on a Ryzen 3 4300G based system, which
prevents me from reaching GNOME.
[ 6.125321] amdgpu 0000:0c:00.0: amdgpu: Failed to retrieve supported dpm features!
[ 6.125474] amdgpu 0000:0c:00.0: amdgpu: Failed to setup smc hw!
[ 6.125595] [drm:amdgpu_device_init.cold [amdgpu]] *ERROR* hw_init of IP block <smu> failed -22
[ 6.125995] amdgpu 0000:0c:00.0: amdgpu: amdgpu_device_ip_init failed
[ 6.126126] amdgpu 0000:0c:00.0: amdgpu: Fatal error during GPU init
[ 6.160535] amdgpu: probe of 0000:0c:00.0 failed with error -22
[ 6.163849] ------------[ cut here ]------------
[ 6.163964] Memory manager not clean during takedown.
[ 6.164119] WARNING: CPU: 3 PID: 350 at drivers/gpu/drm/drm_mm.c:995 drm_mm_takedown+0x1f/0x30 [drm]
[ 6.164353] Modules linked in: hid_logitech_hidpp joydev mousedev rtw88_8821ce rtw88_8821c rtw88_pci rtw88_core vfat mac80211 fat btusb btrtl libarc4 btbcm btintel lzo_rle hp_wmi intel_rapl_msr cfg80211 sparse_keymap bluetooth amdgpu(+) platform_profile r8169 hid_logitech_dj ecdh_generic wmi_bmof realtek intel
_rapl_common mdio_devres libphy rfkill kvm_amd kvm irqbypass drm_ttm_helper crct10dif_pclmul ttm snd_hda_codec_realtek snd_hda_codec_hdmi crc32_pclmul snd_hda_codec_generic ghash_clmulni_intel gpu_sched ledtrig_audio aesni_intel i2c_algo_bit snd_hda_intel crypto_simd snd_intel_dspcfg drm_kms_helper snd_hda_codec
cryptd rapl snd_hwdep syscopyarea sysfillrect snd_hda_core sysimgblt snd_pcm pcspkr fb_sys_fops sp5100_tco snd_timer k10temp ccp cec snd i2c_piix4 soundcore tpm_crb tpm_tis wmi tpm_tis_core tpm gpio_amdpt video rng_core pinctrl_amd gpio_generic acpi_tad mac_hid acpi_cpufreq usbhid pkcs8_key_parser sg crypto_user
fuse drm zram bpf_preload ip_tables x_tables ext4
[ 6.164393] crc32c_generic crc16 mbcache jbd2 xhci_pci crc32c_intel xhci_pci_renesas
[ 6.166704] CPU: 3 PID: 350 Comm: systemd-udevd Not tainted 5.16.0-rc5-debug-01621-g7ade3ca9cdb5 #1 486b1a72751606fa3f686487a0e195723dfbf5fa
[ 6.167024] Hardware name: HP HP Desktop M01-F1xxx/87D6, BIOS F.12 12/17/2020
[ 6.167207] RIP: 0010:drm_mm_takedown+0x1f/0x30 [drm]
[ 6.167359] Code: 48 e9 6a ff ff ff 0f 1f 44 00 00 0f 1f 44 00 00 48 8b 47 38 48 83 c7 38 48 39 f8 75 01 c3 48 c7 c7 b0 bc 3e c0 e8 cf 7e 4c c5 <0f> 0b c3 66 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 00 0f 1f 44 00 00
[ 6.167847] RSP: 0018:ffffaea74164f930 EFLAGS: 00010286
[ 6.167984] RAX: 0000000000000000 RBX: ffff8c69c43c0000 RCX: 0000000000000027
[ 6.168171] RDX: ffff8c70baae0728 RSI: 0000000000000001 RDI: ffff8c70baae0720
[ 6.168359] RBP: ffff8c69c43c5d88 R08: 0000000000000000 R09: ffffaea74164f760
[ 6.168544] R10: ffffaea74164f758 R11: ffff8c70de37ffe8 R12: ffff8c69c43c5d88
[ 6.168729] R13: ffff8c69c43c5d70 R14: ffff8c69c43c5d88 R15: ffff8c69c13b037c
[ 6.168921] FS: 00007ff533bb5a40(0000) GS:ffff8c70baac0000(0000) knlGS:0000000000000000
[ 6.169138] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 6.169278] CR2: 00007f5b37c1ef10 CR3: 0000000108910000 CR4: 0000000000350ee0
[ 6.169461] Call Trace:
[ 6.169531] <TASK>
[ 6.169590] amdgpu_vram_mgr_fini+0xe0/0x150 [amdgpu f875b0375176cd72cd7df8bb01e8902f994b9ac1]
[ 6.170112] amdgpu_ttm_fini+0x11d/0x190 [amdgpu f875b0375176cd72cd7df8bb01e8902f994b9ac1]
[ 6.170553] amdgpu_bo_fini+0x2a/0x90 [amdgpu f875b0375176cd72cd7df8bb01e8902f994b9ac1]
[ 6.170986] gmc_v9_0_sw_fini+0x3a/0x40 [amdgpu f875b0375176cd72cd7df8bb01e8902f994b9ac1]
[ 6.171442] amdgpu_device_fini_sw+0xc9/0x340 [amdgpu f875b0375176cd72cd7df8bb01e8902f994b9ac1]
[ 6.171845] amdgpu_driver_release_kms+0x12/0x30 [amdgpu f875b0375176cd72cd7df8bb01e8902f994b9ac1]
[ 6.172252] devm_drm_dev_init_release+0x3d/0x60 [drm c0bf7c2e07a173ae66922afeaf398daf07c4aa7c]
[ 6.172497] release_nodes+0x38/0xb0
[ 6.172594] devres_release_all+0x8b/0xc0
[ 6.172701] really_probe+0x100/0x3f0
[ 6.172799] __driver_probe_device+0xfe/0x180
[ 6.172913] driver_probe_device+0x1e/0x90
[ 6.173056] __driver_attach+0xc0/0x1c0
[ 6.173159] ? __device_attach_driver+0xe0/0xe0
[ 6.173281] ? __device_attach_driver+0xe0/0xe0
[ 6.173403] bus_for_each_dev+0x89/0xd0
[ 6.173508] bus_add_driver+0x149/0x1e0
[ 6.173609] driver_register+0x8f/0xe0
[ 6.173709] ? 0xffffffffc12c6000
[ 6.173796] do_one_initcall+0x57/0x220
[ 6.173898] do_init_module+0x5c/0x270
[ 6.173999] load_module+0x258a/0x2760
[ 6.174102] ? __do_sys_init_module+0x12e/0x1b0
[ 6.174223] __do_sys_init_module+0x12e/0x1b0
[ 6.174344] do_syscall_64+0x5c/0x80
[ 6.174445] ? __vm_munmap+0x92/0x120
[ 6.174546] ? syscall_exit_to_user_mode+0x23/0x40
[ 6.174671] ? do_syscall_64+0x69/0x80
[ 6.174770] entry_SYSCALL_64_after_hwframe+0x44/0xae
[ 6.174902] RIP: 0033:0x7ff5345ab32e
[ 6.175000] Code: 48 8b 0d 45 0b 0c 00 f7 d8 64 89 01 48 83 c8 ff c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 49 89 ca b8 af 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 12 0b 0c 00 f7 d8 64 89 01 48
[ 6.175477] RSP: 002b:00007ffeccdd2918 EFLAGS: 00000246 ORIG_RAX: 00000000000000af
[ 6.175674] RAX: ffffffffffffffda RBX: 00005646206cfdd0 RCX: 00007ff5345ab32e
[ 6.175851] RDX: 00007ff5346ff32c RSI: 000000000103912e RDI: 00007ff531498010
[ 6.176032] RBP: 00007ff531498010 R08: 00007ff532a7d000 R09: 0000000000000000
[ 6.176215] R10: 00005646207e5400 R11: 0000000000000246 R12: 00007ff5346ff32c
[ 6.176443] R13: 00005646206cb670 R14: 00005646206cfdd0 R15: 0000564620660e80
[ 6.176633] </TASK>
[ 6.176694] ---[ end trace 72edbf4275a2e0d9 ]---
If there is any other information I can provide or patches I can test, I
am happy to do so.
Cheers,
Nathan
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH V3 5/7] drm/amd/pm: drop the cache for enabled ppfeatures
2022-01-28 7:04 [PATCH V3 1/7] drm/amd/pm: correct the way for retrieving enabled ppfeatures on Renoir Evan Quan
` (2 preceding siblings ...)
2022-01-28 7:04 ` [PATCH V3 4/7] drm/amd/pm: correct the usage for 'supported' member of smu_feature structure Evan Quan
@ 2022-01-28 7:04 ` Evan Quan
2022-01-28 14:55 ` Deucher, Alexander
2022-01-28 7:04 ` [PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving " Evan Quan
2022-01-28 7:04 ` [PATCH V3 7/7] drm/amd/pm: revise the implementation of smu_cmn_disable_all_features_with_exception Evan Quan
5 siblings, 1 reply; 13+ messages in thread
From: Evan Quan @ 2022-01-28 7:04 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
The following scenarios make the driver cache for enabled ppfeatures
outdated and invalid:
- Other tools interact with PMFW to change the enabled ppfeatures.
- PMFW may enable/disable some features behind driver's back. E.g.
for sienna_cichild, on gfxoff entering, PMFW will disable gfx
related DPM features. All those are performed without driver's
notice.
Also considering driver does not actually interact with PMFW such
frequently, the benefit brought by such cache is very limited.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I20ed58ab216e930c7a5d223be1eb99146889f2b3
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 -
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 1 -
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 23 +---------
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 16 +------
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 23 +---------
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 16 +------
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 46 +++++--------------
7 files changed, 17 insertions(+), 109 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 803068cb5079..59be1c822b2c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -950,7 +950,6 @@ static int smu_sw_init(void *handle)
smu->pool_size = adev->pm.smu_prv_buffer_size;
smu->smu_feature.feature_num = SMU_FEATURE_MAX;
bitmap_zero(smu->smu_feature.supported, SMU_FEATURE_MAX);
- bitmap_zero(smu->smu_feature.enabled, SMU_FEATURE_MAX);
bitmap_zero(smu->smu_feature.allowed, SMU_FEATURE_MAX);
mutex_init(&smu->message_lock);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 8cd1c3bb595a..721b4080d3e6 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -390,7 +390,6 @@ struct smu_feature
uint32_t feature_num;
DECLARE_BITMAP(supported, SMU_FEATURE_MAX);
DECLARE_BITMAP(allowed, SMU_FEATURE_MAX);
- DECLARE_BITMAP(enabled, SMU_FEATURE_MAX);
};
struct smu_clocks {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index d36b64371492..d71155a66f97 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -798,27 +798,8 @@ int smu_v11_0_set_allowed_mask(struct smu_context *smu)
int smu_v11_0_system_features_control(struct smu_context *smu,
bool en)
{
- struct smu_feature *feature = &smu->smu_feature;
- uint64_t feature_mask;
- int ret = 0;
-
- ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
- SMU_MSG_DisableAllSmuFeatures), NULL);
- if (ret)
- return ret;
-
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (en) {
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
- }
-
- return ret;
+ return smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
+ SMU_MSG_DisableAllSmuFeatures), NULL);
}
int smu_v11_0_notify_display_change(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 478151e72889..96a5b31f708d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -1947,27 +1947,13 @@ static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clock
static int vangogh_system_features_control(struct smu_context *smu, bool en)
{
struct amdgpu_device *adev = smu->adev;
- struct smu_feature *feature = &smu->smu_feature;
- uint64_t feature_mask;
int ret = 0;
if (adev->pm.fw_version >= 0x43f1700 && !en)
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify,
RLC_STATUS_OFF, NULL);
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (!en)
- return ret;
-
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
-
- return 0;
+ return ret;
}
static int vangogh_post_smu_init(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 92b5c1108a2e..f0ab1dc3ca59 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -764,27 +764,8 @@ int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable)
int smu_v13_0_system_features_control(struct smu_context *smu,
bool en)
{
- struct smu_feature *feature = &smu->smu_feature;
- uint64_t feature_mask;
- int ret = 0;
-
- ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
- SMU_MSG_DisableAllSmuFeatures), NULL);
- if (ret)
- return ret;
-
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (en) {
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
- }
-
- return ret;
+ return smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
+ SMU_MSG_DisableAllSmuFeatures), NULL);
}
int smu_v13_0_notify_display_change(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index d89e8a03651b..e90387a84cbb 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -195,27 +195,13 @@ static int yellow_carp_fini_smc_tables(struct smu_context *smu)
static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
{
- struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
- uint64_t feature_mask;
int ret = 0;
if (!en && !adev->in_s0ix)
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (!en)
- return ret;
-
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
-
- return 0;
+ return ret;
}
static int yellow_carp_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index aae08ce62b80..3d263b27b6c2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -496,8 +496,8 @@ int smu_cmn_feature_is_supported(struct smu_context *smu,
int smu_cmn_feature_is_enabled(struct smu_context *smu,
enum smu_feature_mask mask)
{
- struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
+ uint64_t enabled_features;
int feature_id;
if (smu->is_apu && adev->family < AMDGPU_FAMILY_VGH)
@@ -509,9 +509,12 @@ int smu_cmn_feature_is_enabled(struct smu_context *smu,
if (feature_id < 0)
return 0;
- WARN_ON(feature_id > feature->feature_num);
+ if (smu_cmn_get_enabled_mask(smu, &enabled_features)) {
+ dev_err(adev->dev, "Failed to retrieve enabled ppfeatures!\n");
+ return 0;
+ }
- return test_bit(feature_id, feature->enabled);
+ return test_bit(feature_id, (unsigned long *)&enabled_features);
}
bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
@@ -544,7 +547,6 @@ bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint64_t *feature_mask)
{
- struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
uint32_t *feature_mask_high;
uint32_t *feature_mask_low;
@@ -553,13 +555,6 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
if (!feature_mask)
return -EINVAL;
- if (!bitmap_empty(feature->enabled, feature->feature_num)) {
- bitmap_copy((unsigned long *)feature_mask,
- feature->enabled,
- feature->feature_num);
- return 0;
- }
-
feature_mask_low = &((uint32_t *)feature_mask)[0];
feature_mask_high = &((uint32_t *)feature_mask)[1];
@@ -616,7 +611,6 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,
uint64_t feature_mask,
bool enabled)
{
- struct smu_feature *feature = &smu->smu_feature;
int ret = 0;
if (enabled) {
@@ -630,8 +624,6 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,
SMU_MSG_EnableSmuFeaturesHigh,
upper_32_bits(feature_mask),
NULL);
- if (ret)
- return ret;
} else {
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_DisableSmuFeaturesLow,
@@ -643,17 +635,8 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,
SMU_MSG_DisableSmuFeaturesHigh,
upper_32_bits(feature_mask),
NULL);
- if (ret)
- return ret;
}
- if (enabled)
- bitmap_or(feature->enabled, feature->enabled,
- (unsigned long *)(&feature_mask), SMU_FEATURE_MAX);
- else
- bitmap_andnot(feature->enabled, feature->enabled,
- (unsigned long *)(&feature_mask), SMU_FEATURE_MAX);
-
return ret;
}
@@ -661,7 +644,6 @@ int smu_cmn_feature_set_enabled(struct smu_context *smu,
enum smu_feature_mask mask,
bool enable)
{
- struct smu_feature *feature = &smu->smu_feature;
int feature_id;
feature_id = smu_cmn_to_asic_specific_index(smu,
@@ -670,8 +652,6 @@ int smu_cmn_feature_set_enabled(struct smu_context *smu,
if (feature_id < 0)
return -EINVAL;
- WARN_ON(feature_id > feature->feature_num);
-
return smu_cmn_feature_update_enable_state(smu,
1ULL << feature_id,
enable);
@@ -793,7 +773,6 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
bool no_hw_disablement,
enum smu_feature_mask mask)
{
- struct smu_feature *feature = &smu->smu_feature;
uint64_t features_to_disable = U64_MAX;
int skipped_feature_id;
@@ -807,15 +786,12 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
features_to_disable &= ~(1ULL << skipped_feature_id);
}
- if (no_hw_disablement) {
- bitmap_andnot(feature->enabled, feature->enabled,
- (unsigned long *)(&features_to_disable), SMU_FEATURE_MAX);
+ if (no_hw_disablement)
return 0;
- } else {
- return smu_cmn_feature_update_enable_state(smu,
- features_to_disable,
- 0);
- }
+
+ return smu_cmn_feature_update_enable_state(smu,
+ features_to_disable,
+ 0);
}
int smu_cmn_get_smc_version(struct smu_context *smu,
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH V3 5/7] drm/amd/pm: drop the cache for enabled ppfeatures
2022-01-28 7:04 ` [PATCH V3 5/7] drm/amd/pm: drop the cache for enabled ppfeatures Evan Quan
@ 2022-01-28 14:55 ` Deucher, Alexander
0 siblings, 0 replies; 13+ messages in thread
From: Deucher, Alexander @ 2022-01-28 14:55 UTC (permalink / raw)
To: Quan, Evan, amd-gfx; +Cc: Lazar, Lijo
[-- Attachment #1: Type: text/plain, Size: 13847 bytes --]
[Public]
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Quan, Evan <Evan.Quan@amd.com>
Sent: Friday, January 28, 2022 2:04 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH V3 5/7] drm/amd/pm: drop the cache for enabled ppfeatures
The following scenarios make the driver cache for enabled ppfeatures
outdated and invalid:
- Other tools interact with PMFW to change the enabled ppfeatures.
- PMFW may enable/disable some features behind driver's back. E.g.
for sienna_cichild, on gfxoff entering, PMFW will disable gfx
related DPM features. All those are performed without driver's
notice.
Also considering driver does not actually interact with PMFW such
frequently, the benefit brought by such cache is very limited.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I20ed58ab216e930c7a5d223be1eb99146889f2b3
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 -
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 1 -
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 23 +---------
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 16 +------
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 23 +---------
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 16 +------
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 46 +++++--------------
7 files changed, 17 insertions(+), 109 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 803068cb5079..59be1c822b2c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -950,7 +950,6 @@ static int smu_sw_init(void *handle)
smu->pool_size = adev->pm.smu_prv_buffer_size;
smu->smu_feature.feature_num = SMU_FEATURE_MAX;
bitmap_zero(smu->smu_feature.supported, SMU_FEATURE_MAX);
- bitmap_zero(smu->smu_feature.enabled, SMU_FEATURE_MAX);
bitmap_zero(smu->smu_feature.allowed, SMU_FEATURE_MAX);
mutex_init(&smu->message_lock);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 8cd1c3bb595a..721b4080d3e6 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -390,7 +390,6 @@ struct smu_feature
uint32_t feature_num;
DECLARE_BITMAP(supported, SMU_FEATURE_MAX);
DECLARE_BITMAP(allowed, SMU_FEATURE_MAX);
- DECLARE_BITMAP(enabled, SMU_FEATURE_MAX);
};
struct smu_clocks {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index d36b64371492..d71155a66f97 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -798,27 +798,8 @@ int smu_v11_0_set_allowed_mask(struct smu_context *smu)
int smu_v11_0_system_features_control(struct smu_context *smu,
bool en)
{
- struct smu_feature *feature = &smu->smu_feature;
- uint64_t feature_mask;
- int ret = 0;
-
- ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
- SMU_MSG_DisableAllSmuFeatures), NULL);
- if (ret)
- return ret;
-
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (en) {
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
- }
-
- return ret;
+ return smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
+ SMU_MSG_DisableAllSmuFeatures), NULL);
}
int smu_v11_0_notify_display_change(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 478151e72889..96a5b31f708d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -1947,27 +1947,13 @@ static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clock
static int vangogh_system_features_control(struct smu_context *smu, bool en)
{
struct amdgpu_device *adev = smu->adev;
- struct smu_feature *feature = &smu->smu_feature;
- uint64_t feature_mask;
int ret = 0;
if (adev->pm.fw_version >= 0x43f1700 && !en)
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify,
RLC_STATUS_OFF, NULL);
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (!en)
- return ret;
-
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
-
- return 0;
+ return ret;
}
static int vangogh_post_smu_init(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 92b5c1108a2e..f0ab1dc3ca59 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -764,27 +764,8 @@ int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable)
int smu_v13_0_system_features_control(struct smu_context *smu,
bool en)
{
- struct smu_feature *feature = &smu->smu_feature;
- uint64_t feature_mask;
- int ret = 0;
-
- ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
- SMU_MSG_DisableAllSmuFeatures), NULL);
- if (ret)
- return ret;
-
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (en) {
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
- }
-
- return ret;
+ return smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
+ SMU_MSG_DisableAllSmuFeatures), NULL);
}
int smu_v13_0_notify_display_change(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index d89e8a03651b..e90387a84cbb 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -195,27 +195,13 @@ static int yellow_carp_fini_smc_tables(struct smu_context *smu)
static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
{
- struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
- uint64_t feature_mask;
int ret = 0;
if (!en && !adev->in_s0ix)
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
- bitmap_zero(feature->enabled, feature->feature_num);
-
- if (!en)
- return ret;
-
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);
- if (ret)
- return ret;
-
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
- feature->feature_num);
-
- return 0;
+ return ret;
}
static int yellow_carp_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index aae08ce62b80..3d263b27b6c2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -496,8 +496,8 @@ int smu_cmn_feature_is_supported(struct smu_context *smu,
int smu_cmn_feature_is_enabled(struct smu_context *smu,
enum smu_feature_mask mask)
{
- struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
+ uint64_t enabled_features;
int feature_id;
if (smu->is_apu && adev->family < AMDGPU_FAMILY_VGH)
@@ -509,9 +509,12 @@ int smu_cmn_feature_is_enabled(struct smu_context *smu,
if (feature_id < 0)
return 0;
- WARN_ON(feature_id > feature->feature_num);
+ if (smu_cmn_get_enabled_mask(smu, &enabled_features)) {
+ dev_err(adev->dev, "Failed to retrieve enabled ppfeatures!\n");
+ return 0;
+ }
- return test_bit(feature_id, feature->enabled);
+ return test_bit(feature_id, (unsigned long *)&enabled_features);
}
bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
@@ -544,7 +547,6 @@ bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
int smu_cmn_get_enabled_mask(struct smu_context *smu,
uint64_t *feature_mask)
{
- struct smu_feature *feature = &smu->smu_feature;
struct amdgpu_device *adev = smu->adev;
uint32_t *feature_mask_high;
uint32_t *feature_mask_low;
@@ -553,13 +555,6 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
if (!feature_mask)
return -EINVAL;
- if (!bitmap_empty(feature->enabled, feature->feature_num)) {
- bitmap_copy((unsigned long *)feature_mask,
- feature->enabled,
- feature->feature_num);
- return 0;
- }
-
feature_mask_low = &((uint32_t *)feature_mask)[0];
feature_mask_high = &((uint32_t *)feature_mask)[1];
@@ -616,7 +611,6 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,
uint64_t feature_mask,
bool enabled)
{
- struct smu_feature *feature = &smu->smu_feature;
int ret = 0;
if (enabled) {
@@ -630,8 +624,6 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,
SMU_MSG_EnableSmuFeaturesHigh,
upper_32_bits(feature_mask),
NULL);
- if (ret)
- return ret;
} else {
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_DisableSmuFeaturesLow,
@@ -643,17 +635,8 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,
SMU_MSG_DisableSmuFeaturesHigh,
upper_32_bits(feature_mask),
NULL);
- if (ret)
- return ret;
}
- if (enabled)
- bitmap_or(feature->enabled, feature->enabled,
- (unsigned long *)(&feature_mask), SMU_FEATURE_MAX);
- else
- bitmap_andnot(feature->enabled, feature->enabled,
- (unsigned long *)(&feature_mask), SMU_FEATURE_MAX);
-
return ret;
}
@@ -661,7 +644,6 @@ int smu_cmn_feature_set_enabled(struct smu_context *smu,
enum smu_feature_mask mask,
bool enable)
{
- struct smu_feature *feature = &smu->smu_feature;
int feature_id;
feature_id = smu_cmn_to_asic_specific_index(smu,
@@ -670,8 +652,6 @@ int smu_cmn_feature_set_enabled(struct smu_context *smu,
if (feature_id < 0)
return -EINVAL;
- WARN_ON(feature_id > feature->feature_num);
-
return smu_cmn_feature_update_enable_state(smu,
1ULL << feature_id,
enable);
@@ -793,7 +773,6 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
bool no_hw_disablement,
enum smu_feature_mask mask)
{
- struct smu_feature *feature = &smu->smu_feature;
uint64_t features_to_disable = U64_MAX;
int skipped_feature_id;
@@ -807,15 +786,12 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
features_to_disable &= ~(1ULL << skipped_feature_id);
}
- if (no_hw_disablement) {
- bitmap_andnot(feature->enabled, feature->enabled,
- (unsigned long *)(&features_to_disable), SMU_FEATURE_MAX);
+ if (no_hw_disablement)
return 0;
- } else {
- return smu_cmn_feature_update_enable_state(smu,
- features_to_disable,
- 0);
- }
+
+ return smu_cmn_feature_update_enable_state(smu,
+ features_to_disable,
+ 0);
}
int smu_cmn_get_smc_version(struct smu_context *smu,
--
2.29.0
[-- Attachment #2: Type: text/html, Size: 30091 bytes --]
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving for enabled ppfeatures
2022-01-28 7:04 [PATCH V3 1/7] drm/amd/pm: correct the way for retrieving enabled ppfeatures on Renoir Evan Quan
` (3 preceding siblings ...)
2022-01-28 7:04 ` [PATCH V3 5/7] drm/amd/pm: drop the cache for enabled ppfeatures Evan Quan
@ 2022-01-28 7:04 ` Evan Quan
2022-01-28 14:56 ` Deucher, Alexander
2022-01-28 7:04 ` [PATCH V3 7/7] drm/amd/pm: revise the implementation of smu_cmn_disable_all_features_with_exception Evan Quan
5 siblings, 1 reply; 13+ messages in thread
From: Evan Quan @ 2022-01-28 7:04 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
As the enabled ppfeatures are just retrieved ahead. We can use
that directly instead of retrieving again and again.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I08827437fcbbc52084418c8ca6a90cfa503306a9
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index 3d263b27b6c2..acb9f0ca191b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -680,6 +680,7 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
int8_t sort_feature[SMU_FEATURE_COUNT];
size_t size = 0;
int ret = 0, i;
+ int feature_id;
ret = smu_cmn_get_enabled_mask(smu,
&feature_mask);
@@ -708,11 +709,18 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
if (sort_feature[i] < 0)
continue;
+ /* convert to asic spcific feature ID */
+ feature_id = smu_cmn_to_asic_specific_index(smu,
+ CMN2ASIC_MAPPING_FEATURE,
+ sort_feature[i]);
+ if (feature_id < 0)
+ continue;
+
size += sysfs_emit_at(buf, size, "%02d. %-20s (%2d) : %s\n",
count++,
smu_get_feature_name(smu, sort_feature[i]),
i,
- !!smu_cmn_feature_is_enabled(smu, sort_feature[i]) ?
+ !!test_bit(feature_id, (unsigned long *)&feature_mask) ?
"enabled" : "disabled");
}
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving for enabled ppfeatures
2022-01-28 7:04 ` [PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving " Evan Quan
@ 2022-01-28 14:56 ` Deucher, Alexander
0 siblings, 0 replies; 13+ messages in thread
From: Deucher, Alexander @ 2022-01-28 14:56 UTC (permalink / raw)
To: Quan, Evan, amd-gfx; +Cc: Lazar, Lijo
[-- Attachment #1: Type: text/plain, Size: 2358 bytes --]
[Public]
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Quan, Evan <Evan.Quan@amd.com>
Sent: Friday, January 28, 2022 2:04 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving for enabled ppfeatures
As the enabled ppfeatures are just retrieved ahead. We can use
that directly instead of retrieving again and again.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I08827437fcbbc52084418c8ca6a90cfa503306a9
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index 3d263b27b6c2..acb9f0ca191b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -680,6 +680,7 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
int8_t sort_feature[SMU_FEATURE_COUNT];
size_t size = 0;
int ret = 0, i;
+ int feature_id;
ret = smu_cmn_get_enabled_mask(smu,
&feature_mask);
@@ -708,11 +709,18 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
if (sort_feature[i] < 0)
continue;
+ /* convert to asic spcific feature ID */
+ feature_id = smu_cmn_to_asic_specific_index(smu,
+ CMN2ASIC_MAPPING_FEATURE,
+ sort_feature[i]);
+ if (feature_id < 0)
+ continue;
+
size += sysfs_emit_at(buf, size, "%02d. %-20s (%2d) : %s\n",
count++,
smu_get_feature_name(smu, sort_feature[i]),
i,
- !!smu_cmn_feature_is_enabled(smu, sort_feature[i]) ?
+ !!test_bit(feature_id, (unsigned long *)&feature_mask) ?
"enabled" : "disabled");
}
--
2.29.0
[-- Attachment #2: Type: text/html, Size: 6020 bytes --]
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH V3 7/7] drm/amd/pm: revise the implementation of smu_cmn_disable_all_features_with_exception
2022-01-28 7:04 [PATCH V3 1/7] drm/amd/pm: correct the way for retrieving enabled ppfeatures on Renoir Evan Quan
` (4 preceding siblings ...)
2022-01-28 7:04 ` [PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving " Evan Quan
@ 2022-01-28 7:04 ` Evan Quan
2022-01-28 14:58 ` Deucher, Alexander
5 siblings, 1 reply; 13+ messages in thread
From: Evan Quan @ 2022-01-28 7:04 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
As there is no internal cache for enabled ppfeatures now. Thus the 2nd
parameter will be not needed any more.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I0c1811f216c55d6ddfabdc9e099dc214c21bdf2e
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 9 ++-------
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 1 -
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 7 -------
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h | 1 -
drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 2 +-
5 files changed, 3 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 59be1c822b2c..1c9c11a92d42 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1360,9 +1360,7 @@ static int smu_disable_dpms(struct smu_context *smu)
case IP_VERSION(11, 5, 0):
case IP_VERSION(11, 0, 12):
case IP_VERSION(11, 0, 13):
- return smu_disable_all_features_with_exception(smu,
- true,
- SMU_FEATURE_COUNT);
+ return 0;
default:
break;
}
@@ -1378,9 +1376,7 @@ static int smu_disable_dpms(struct smu_context *smu)
case IP_VERSION(11, 0, 0):
case IP_VERSION(11, 0, 5):
case IP_VERSION(11, 0, 9):
- return smu_disable_all_features_with_exception(smu,
- true,
- SMU_FEATURE_BACO_BIT);
+ return 0;
default:
break;
}
@@ -1392,7 +1388,6 @@ static int smu_disable_dpms(struct smu_context *smu)
*/
if (use_baco && smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)) {
ret = smu_disable_all_features_with_exception(smu,
- false,
SMU_FEATURE_BACO_BIT);
if (ret)
dev_err(adev->dev, "Failed to disable smu features except BACO.\n");
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 721b4080d3e6..55b24988455d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -990,7 +990,6 @@ struct pptable_funcs {
* exception to those in &mask.
*/
int (*disable_all_features_with_exception)(struct smu_context *smu,
- bool no_hw_disablement,
enum smu_feature_mask mask);
/**
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index acb9f0ca191b..2a6b752a6996 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -767,9 +767,6 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
* @mask
*
* @smu: smu_context pointer
- * @no_hw_disablement: whether real dpm disablement should be performed
- * true: update the cache(about dpm enablement state) only
- * false: real dpm disablement plus cache update
* @mask: the dpm feature which should not be disabled
* SMU_FEATURE_COUNT: no exception, all dpm features
* to disable
@@ -778,7 +775,6 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
* 0 on success or a negative error code on failure.
*/
int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
- bool no_hw_disablement,
enum smu_feature_mask mask)
{
uint64_t features_to_disable = U64_MAX;
@@ -794,9 +790,6 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
features_to_disable &= ~(1ULL << skipped_feature_id);
}
- if (no_hw_disablement)
- return 0;
-
return smu_cmn_feature_update_enable_state(smu,
features_to_disable,
0);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index bfe3430829c7..a4c593ed8b03 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -79,7 +79,6 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
uint64_t new_mask);
int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
- bool no_hw_disablement,
enum smu_feature_mask mask);
int smu_cmn_get_smc_version(struct smu_context *smu,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
index 0063346ed163..530be44e00ec 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
@@ -57,7 +57,7 @@
#define smu_feature_set_allowed_mask(smu) smu_ppt_funcs(set_allowed_mask, 0, smu)
#define smu_feature_get_enabled_mask(smu, mask) smu_ppt_funcs(get_enabled_mask, 0, smu, mask)
#define smu_feature_is_enabled(smu, mask) smu_ppt_funcs(feature_is_enabled, 0, smu, mask)
-#define smu_disable_all_features_with_exception(smu, no_hw_disablement, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, no_hw_disablement, mask)
+#define smu_disable_all_features_with_exception(smu, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, mask)
#define smu_is_dpm_running(smu) smu_ppt_funcs(is_dpm_running, 0 , smu)
#define smu_notify_display_change(smu) smu_ppt_funcs(notify_display_change, 0, smu)
#define smu_populate_umd_state_clk(smu) smu_ppt_funcs(populate_umd_state_clk, 0, smu)
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH V3 7/7] drm/amd/pm: revise the implementation of smu_cmn_disable_all_features_with_exception
2022-01-28 7:04 ` [PATCH V3 7/7] drm/amd/pm: revise the implementation of smu_cmn_disable_all_features_with_exception Evan Quan
@ 2022-01-28 14:58 ` Deucher, Alexander
0 siblings, 0 replies; 13+ messages in thread
From: Deucher, Alexander @ 2022-01-28 14:58 UTC (permalink / raw)
To: Quan, Evan, amd-gfx; +Cc: Lazar, Lijo
[-- Attachment #1: Type: text/plain, Size: 7197 bytes --]
[Public]
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Quan, Evan <Evan.Quan@amd.com>
Sent: Friday, January 28, 2022 2:04 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH V3 7/7] drm/amd/pm: revise the implementation of smu_cmn_disable_all_features_with_exception
As there is no internal cache for enabled ppfeatures now. Thus the 2nd
parameter will be not needed any more.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: I0c1811f216c55d6ddfabdc9e099dc214c21bdf2e
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 9 ++-------
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 1 -
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 7 -------
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h | 1 -
drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 2 +-
5 files changed, 3 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 59be1c822b2c..1c9c11a92d42 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1360,9 +1360,7 @@ static int smu_disable_dpms(struct smu_context *smu)
case IP_VERSION(11, 5, 0):
case IP_VERSION(11, 0, 12):
case IP_VERSION(11, 0, 13):
- return smu_disable_all_features_with_exception(smu,
- true,
- SMU_FEATURE_COUNT);
+ return 0;
default:
break;
}
@@ -1378,9 +1376,7 @@ static int smu_disable_dpms(struct smu_context *smu)
case IP_VERSION(11, 0, 0):
case IP_VERSION(11, 0, 5):
case IP_VERSION(11, 0, 9):
- return smu_disable_all_features_with_exception(smu,
- true,
- SMU_FEATURE_BACO_BIT);
+ return 0;
default:
break;
}
@@ -1392,7 +1388,6 @@ static int smu_disable_dpms(struct smu_context *smu)
*/
if (use_baco && smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)) {
ret = smu_disable_all_features_with_exception(smu,
- false,
SMU_FEATURE_BACO_BIT);
if (ret)
dev_err(adev->dev, "Failed to disable smu features except BACO.\n");
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 721b4080d3e6..55b24988455d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -990,7 +990,6 @@ struct pptable_funcs {
* exception to those in &mask.
*/
int (*disable_all_features_with_exception)(struct smu_context *smu,
- bool no_hw_disablement,
enum smu_feature_mask mask);
/**
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index acb9f0ca191b..2a6b752a6996 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -767,9 +767,6 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
* @mask
*
* @smu: smu_context pointer
- * @no_hw_disablement: whether real dpm disablement should be performed
- * true: update the cache(about dpm enablement state) only
- * false: real dpm disablement plus cache update
* @mask: the dpm feature which should not be disabled
* SMU_FEATURE_COUNT: no exception, all dpm features
* to disable
@@ -778,7 +775,6 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
* 0 on success or a negative error code on failure.
*/
int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
- bool no_hw_disablement,
enum smu_feature_mask mask)
{
uint64_t features_to_disable = U64_MAX;
@@ -794,9 +790,6 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
features_to_disable &= ~(1ULL << skipped_feature_id);
}
- if (no_hw_disablement)
- return 0;
-
return smu_cmn_feature_update_enable_state(smu,
features_to_disable,
0);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
index bfe3430829c7..a4c593ed8b03 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
@@ -79,7 +79,6 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
uint64_t new_mask);
int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
- bool no_hw_disablement,
enum smu_feature_mask mask);
int smu_cmn_get_smc_version(struct smu_context *smu,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
index 0063346ed163..530be44e00ec 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
@@ -57,7 +57,7 @@
#define smu_feature_set_allowed_mask(smu) smu_ppt_funcs(set_allowed_mask, 0, smu)
#define smu_feature_get_enabled_mask(smu, mask) smu_ppt_funcs(get_enabled_mask, 0, smu, mask)
#define smu_feature_is_enabled(smu, mask) smu_ppt_funcs(feature_is_enabled, 0, smu, mask)
-#define smu_disable_all_features_with_exception(smu, no_hw_disablement, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, no_hw_disablement, mask)
+#define smu_disable_all_features_with_exception(smu, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, mask)
#define smu_is_dpm_running(smu) smu_ppt_funcs(is_dpm_running, 0 , smu)
#define smu_notify_display_change(smu) smu_ppt_funcs(notify_display_change, 0, smu)
#define smu_populate_umd_state_clk(smu) smu_ppt_funcs(populate_umd_state_clk, 0, smu)
--
2.29.0
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