From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D1E6C4332F for ; Fri, 11 Feb 2022 10:35:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AFF5E10EA79; Fri, 11 Feb 2022 10:35:09 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B83A10EA78; Fri, 11 Feb 2022 10:35:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644575708; x=1676111708; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=xZqL227qrEuXaCf1lVm11orizsim7DciTShq3TaFFQU=; b=eeyO/68fNLY1JnPX+CHAQlf6NovwcuVtBtW/6SnkVOnpBHHDtUuaTAjF h5Gbcv1130O8jLfo+PD/PkBQZKUAa6NH5iqmEVRS1vZRVVQjyCZ8q4n+S 0OEEiUKTJlTY1KZT2f9FAx/aqpT1pMufjcgGGIXtVfdMaxWcPSL5tfr+/ jt+WlfdSAbidBjjmTulKdYBOHu6e1mNWD/B9xCLudssRuIKkSarD043rW YeZ7i6XRR4bfn6d1iJDP2K1/4+Aquae2dDBdVvoqqEi8Awk3wY7FO4f6S C9qhNzlLtXrjpU9WgNv03j1/moLp85YLX1TrH5yYES7aIC+rXAi5ZVy3+ g==; X-IronPort-AV: E=McAfee;i="6200,9189,10254"; a="249459672" X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="249459672" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:07 -0800 X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="623185131" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.162]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:03 -0800 Received: by lahna (sSMTP sendmail emulation); Fri, 11 Feb 2022 12:35:00 +0200 Date: Fri, 11 Feb 2022 12:35:00 +0200 From: Mika Westerberg To: Mario Limonciello Message-ID: References: <20220210224329.2793-1-mario.limonciello@amd.com> <20220210224329.2793-5-mario.limonciello@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220210224329.2793-5-mario.limonciello@amd.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: Re: [Nouveau] [PATCH v2 4/9] PCI: mark USB4 devices as removable X-BeenThere: nouveau@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Nouveau development list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Jamet , "open list:PCI SUBSYSTEM" , "open list:THUNDERBOLT DRIVER" , Yehezkel Bernat , "open list:DRM DRIVERS" , "open list:X86 PLATFORM DRIVERS" , Andreas Noever , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , Bjorn Helgaas , Alexander.Deucher@amd.com Errors-To: nouveau-bounces@lists.freedesktop.org Sender: "Nouveau" Hi Mario, On Thu, Feb 10, 2022 at 04:43:24PM -0600, Mario Limonciello wrote: > USB4 class devices are also removable like Intel Thunderbolt devices. > > Drivers of downstream devices use this information to declare functional > differences in how the drivers perform by knowing that they are connected > to an upstream TBT/USB4 port. This may not be covering the integrated controllers. For discrete, yes but if it is the PCIe root ports that start the PCIe topology (over the PCIe tunnels) this does not work. For integrated we have the "usb4-host-interface" ACPI property that tells this for each port: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#mapping-native-protocols-pcie-displayport-tunneled-through-usb4-to-usb4-host-routers and for discrete there is the PCIe DVSEC that can be used (see the USB4 spec archive it includes the "USB4 DVSEC Version 1.0.pdf" that has more information). I would expect AMD controller (assuming it is discrete) implements this too. So I'm proposing that we mark the devices that are below PCIe ports (root, downstream) that fall in the above categories as "removable". This is then not dependent on checking the USB4 controller and how it is setup in a particular system. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65EB4C433F5 for ; Fri, 11 Feb 2022 10:35:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349024AbiBKKf0 (ORCPT ); Fri, 11 Feb 2022 05:35:26 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:32874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349055AbiBKKfW (ORCPT ); Fri, 11 Feb 2022 05:35:22 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C111BF19; Fri, 11 Feb 2022 02:35:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644575715; x=1676111715; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=xZqL227qrEuXaCf1lVm11orizsim7DciTShq3TaFFQU=; b=YQ5u4AFRMW7kt7DRblwsIXSlo1y9OkzkPqOe22LQ92eDdDB9bHaPB9JC mPITg46SXh2ef7LysltpVKYuLeeQMKKSlVDoOM8l2rivxjKxJr6KphHFV HaFtcAFpEy8Pn40bNhxZlbsqT2aCrE0vpZRgssxznb3pqn7BpLUNtGwS/ cwWb9+U5Kiwap8lFMZBPAGZKbanzaMMx1D4S7ks8k5T5If0l0/DRjVvmw T5kzfENR5bHuz5duBxKdRzaC9s2n/OnGs0IRw09DgoriUfknI2/opHAIF tnu8KFfYN7rFSSmjNG0BEk5NWgVjltlThQzTxtAyTsl6wNx78XB5flKKD A==; X-IronPort-AV: E=McAfee;i="6200,9189,10254"; a="247302176" X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="247302176" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:07 -0800 X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="623185131" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.162]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:03 -0800 Received: by lahna (sSMTP sendmail emulation); Fri, 11 Feb 2022 12:35:00 +0200 Date: Fri, 11 Feb 2022 12:35:00 +0200 From: Mika Westerberg To: Mario Limonciello Cc: Bjorn Helgaas , Andreas Noever , "open list:PCI SUBSYSTEM" , "open list:THUNDERBOLT DRIVER" , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:DRM DRIVERS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:X86 PLATFORM DRIVERS" , Michael Jamet , Yehezkel Bernat , Lukas Wunner , Alexander.Deucher@amd.com Subject: Re: [PATCH v2 4/9] PCI: mark USB4 devices as removable Message-ID: References: <20220210224329.2793-1-mario.limonciello@amd.com> <20220210224329.2793-5-mario.limonciello@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220210224329.2793-5-mario.limonciello@amd.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Hi Mario, On Thu, Feb 10, 2022 at 04:43:24PM -0600, Mario Limonciello wrote: > USB4 class devices are also removable like Intel Thunderbolt devices. > > Drivers of downstream devices use this information to declare functional > differences in how the drivers perform by knowing that they are connected > to an upstream TBT/USB4 port. This may not be covering the integrated controllers. For discrete, yes but if it is the PCIe root ports that start the PCIe topology (over the PCIe tunnels) this does not work. For integrated we have the "usb4-host-interface" ACPI property that tells this for each port: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#mapping-native-protocols-pcie-displayport-tunneled-through-usb4-to-usb4-host-routers and for discrete there is the PCIe DVSEC that can be used (see the USB4 spec archive it includes the "USB4 DVSEC Version 1.0.pdf" that has more information). I would expect AMD controller (assuming it is discrete) implements this too. So I'm proposing that we mark the devices that are below PCIe ports (root, downstream) that fall in the above categories as "removable". This is then not dependent on checking the USB4 controller and how it is setup in a particular system. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67661C433EF for ; Fri, 11 Feb 2022 14:19:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 727B910EA81; Fri, 11 Feb 2022 14:19:21 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B83A10EA78; Fri, 11 Feb 2022 10:35:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644575708; x=1676111708; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=xZqL227qrEuXaCf1lVm11orizsim7DciTShq3TaFFQU=; b=eeyO/68fNLY1JnPX+CHAQlf6NovwcuVtBtW/6SnkVOnpBHHDtUuaTAjF h5Gbcv1130O8jLfo+PD/PkBQZKUAa6NH5iqmEVRS1vZRVVQjyCZ8q4n+S 0OEEiUKTJlTY1KZT2f9FAx/aqpT1pMufjcgGGIXtVfdMaxWcPSL5tfr+/ jt+WlfdSAbidBjjmTulKdYBOHu6e1mNWD/B9xCLudssRuIKkSarD043rW YeZ7i6XRR4bfn6d1iJDP2K1/4+Aquae2dDBdVvoqqEi8Awk3wY7FO4f6S C9qhNzlLtXrjpU9WgNv03j1/moLp85YLX1TrH5yYES7aIC+rXAi5ZVy3+ g==; X-IronPort-AV: E=McAfee;i="6200,9189,10254"; a="249459672" X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="249459672" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:07 -0800 X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="623185131" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.162]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:03 -0800 Received: by lahna (sSMTP sendmail emulation); Fri, 11 Feb 2022 12:35:00 +0200 Date: Fri, 11 Feb 2022 12:35:00 +0200 From: Mika Westerberg To: Mario Limonciello Subject: Re: [PATCH v2 4/9] PCI: mark USB4 devices as removable Message-ID: References: <20220210224329.2793-1-mario.limonciello@amd.com> <20220210224329.2793-5-mario.limonciello@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220210224329.2793-5-mario.limonciello@amd.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Mailman-Approved-At: Fri, 11 Feb 2022 14:19:18 +0000 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Jamet , "open list:PCI SUBSYSTEM" , "open list:THUNDERBOLT DRIVER" , Yehezkel Bernat , "open list:DRM DRIVERS" , "open list:X86 PLATFORM DRIVERS" , Andreas Noever , Lukas Wunner , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , Bjorn Helgaas , Alexander.Deucher@amd.com Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Hi Mario, On Thu, Feb 10, 2022 at 04:43:24PM -0600, Mario Limonciello wrote: > USB4 class devices are also removable like Intel Thunderbolt devices. > > Drivers of downstream devices use this information to declare functional > differences in how the drivers perform by knowing that they are connected > to an upstream TBT/USB4 port. This may not be covering the integrated controllers. For discrete, yes but if it is the PCIe root ports that start the PCIe topology (over the PCIe tunnels) this does not work. For integrated we have the "usb4-host-interface" ACPI property that tells this for each port: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#mapping-native-protocols-pcie-displayport-tunneled-through-usb4-to-usb4-host-routers and for discrete there is the PCIe DVSEC that can be used (see the USB4 spec archive it includes the "USB4 DVSEC Version 1.0.pdf" that has more information). I would expect AMD controller (assuming it is discrete) implements this too. So I'm proposing that we mark the devices that are below PCIe ports (root, downstream) that fall in the above categories as "removable". This is then not dependent on checking the USB4 controller and how it is setup in a particular system. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4AA9DC433FE for ; Fri, 11 Feb 2022 22:40:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 282EA10EBA5; Fri, 11 Feb 2022 22:40:07 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B83A10EA78; Fri, 11 Feb 2022 10:35:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644575708; x=1676111708; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=xZqL227qrEuXaCf1lVm11orizsim7DciTShq3TaFFQU=; b=eeyO/68fNLY1JnPX+CHAQlf6NovwcuVtBtW/6SnkVOnpBHHDtUuaTAjF h5Gbcv1130O8jLfo+PD/PkBQZKUAa6NH5iqmEVRS1vZRVVQjyCZ8q4n+S 0OEEiUKTJlTY1KZT2f9FAx/aqpT1pMufjcgGGIXtVfdMaxWcPSL5tfr+/ jt+WlfdSAbidBjjmTulKdYBOHu6e1mNWD/B9xCLudssRuIKkSarD043rW YeZ7i6XRR4bfn6d1iJDP2K1/4+Aquae2dDBdVvoqqEi8Awk3wY7FO4f6S C9qhNzlLtXrjpU9WgNv03j1/moLp85YLX1TrH5yYES7aIC+rXAi5ZVy3+ g==; X-IronPort-AV: E=McAfee;i="6200,9189,10254"; a="249459672" X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="249459672" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:07 -0800 X-IronPort-AV: E=Sophos;i="5.88,360,1635231600"; d="scan'208";a="623185131" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.162]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 02:35:03 -0800 Received: by lahna (sSMTP sendmail emulation); Fri, 11 Feb 2022 12:35:00 +0200 Date: Fri, 11 Feb 2022 12:35:00 +0200 From: Mika Westerberg To: Mario Limonciello Subject: Re: [PATCH v2 4/9] PCI: mark USB4 devices as removable Message-ID: References: <20220210224329.2793-1-mario.limonciello@amd.com> <20220210224329.2793-5-mario.limonciello@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220210224329.2793-5-mario.limonciello@amd.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Mailman-Approved-At: Fri, 11 Feb 2022 22:40:02 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Jamet , "open list:PCI SUBSYSTEM" , "open list:THUNDERBOLT DRIVER" , Yehezkel Bernat , "open list:DRM DRIVERS" , "open list:X86 PLATFORM DRIVERS" , Andreas Noever , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , Bjorn Helgaas , Alexander.Deucher@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Mario, On Thu, Feb 10, 2022 at 04:43:24PM -0600, Mario Limonciello wrote: > USB4 class devices are also removable like Intel Thunderbolt devices. > > Drivers of downstream devices use this information to declare functional > differences in how the drivers perform by knowing that they are connected > to an upstream TBT/USB4 port. This may not be covering the integrated controllers. For discrete, yes but if it is the PCIe root ports that start the PCIe topology (over the PCIe tunnels) this does not work. For integrated we have the "usb4-host-interface" ACPI property that tells this for each port: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#mapping-native-protocols-pcie-displayport-tunneled-through-usb4-to-usb4-host-routers and for discrete there is the PCIe DVSEC that can be used (see the USB4 spec archive it includes the "USB4 DVSEC Version 1.0.pdf" that has more information). I would expect AMD controller (assuming it is discrete) implements this too. So I'm proposing that we mark the devices that are below PCIe ports (root, downstream) that fall in the above categories as "removable". This is then not dependent on checking the USB4 controller and how it is setup in a particular system.