[PATCH 0/5] arm64: dts: renesas: rcar-gen3: Enable HyperFlash support

[PATCH 0/5] arm64: dts: renesas: rcar-gen3: Enable HyperFlash support

[Geert Uytterhoeven]

	Hi all,

On Renesas R-Car Gen3 platforms, the SPI Multi I/O Bus Controllers
(RPC-IF) provide access to HyperFlash or QSPI storage.  On production
systems, they are typically locked by the TF-A firmware, unless TF-A is
built with RCAR_RPC_HYPERFLASH_LOCKED=0.  When unlocked, TF-A
communicates this to subsequent software by passing a DT fragment that
sets the "status" property of the RPC-IF device node to "okay".

Unfortunately there are several issues preventing this from working all
the way to Linux:
  1. TF-A (and U-Boot on the receiving side) uses a device node name
     that does not conform to the DT specification nor the DT bindings
     for RPC-IF,
  2. While U-Boot receives the RPC-IF enablement from TF-A, it does not
     propagate it to Linux yet,
  3. The DTS files that are part of Linux do not have RPC HyperFlash
     support yet.

The first two issues are handled by patches for TF-A[1] and U-Boot[2].

This patch series takes care of the third issue, by adding device nodes
for the RPC-IF interfaces and the HyperFlash devices to the various DTS
files.  The "status" properties of the RPC-IF device nodes are left
"disabled", and are to be updated by U-Boot when unlocked.

HyperFlash operation has been tested on a variety of SoCs (R-Car H3
ES1.1 & ES2.0, M3-W ES1.0, M3-N ES1.0, E3 ES1.0, and D3 ES1.1) and
boards (Salvator-XS, ULCB, Ebisu-4D, and Draak).

For testing, this series and its Linux dependencies (HF fix[3], clk[4],
pinctrl[5]) can be found at[6].

Thanks for your comments!

[1] "[PATCH TF-A] fix(plat/rcar3): Fix RPC-IF device node name"
    https://lore.kernel.org/r/3685623bed84674039adb61e723288d359ab0a50.1648544199.git.geert+renesas@glider.be

[2] "[PATCH u-boot 0/3] renesas: Fix RPC-IF enablement"
    https://lore.kernel.org/r/cover.1648544792.git.geert+renesas@glider.be

[3] "[PATCH v3] memory: renesas-rpc-if: Fix HF/OSPI data transfer in
     Manual mode"
    https://lore.kernel.org/r/ad6ef2af754c8163f825d3a199d64f910d63f802.1648545212.git.geert+renesas@glider.be

[4] "[PATCH 0/2] clk: renesas: r8a7799[05]: Add RPC clocks"
    https://lore.kernel.org/r/cover.1648546700.git.geert+renesas@glider.be

[5] "[PATCH 0/2] pinctrl: renesas: r8a7799[05]: Add RPC pins, groups,
     and functions"
    https://lore.kernel.org/r/cover.1648547080.git.geert+renesas@glider.be

[6] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/rcar3-rpc-hf-v1

Geert Uytterhoeven (5):
  arm64: dts: renesas: rcar-gen3: Add RPC device nodes
  arm64: dts: renesas: draak: Add RPC HyperFlash device node
  arm64: dts: renesas: ebisu: Add RPC HyperFlash device node
  arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node
  arm64: dts: renesas: ulcb: Add RPC HyperFlash device node

 arch/arm64/boot/dts/renesas/draak.dtsi        | 58 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/ebisu.dtsi        | 58 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77951.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77960.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77961.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77965.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77990.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi     | 16 +++++
 .../boot/dts/renesas/salvator-common.dtsi     | 49 ++++++++++++++++
 arch/arm64/boot/dts/renesas/ulcb.dtsi         | 49 ++++++++++++++++
 10 files changed, 310 insertions(+)

-- 
2.25.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH 0/5] arm64: dts: renesas: rcar-gen3: Enable HyperFlash support

[Geert Uytterhoeven]

	Hi all,

On Renesas R-Car Gen3 platforms, the SPI Multi I/O Bus Controllers
(RPC-IF) provide access to HyperFlash or QSPI storage.  On production
systems, they are typically locked by the TF-A firmware, unless TF-A is
built with RCAR_RPC_HYPERFLASH_LOCKED=0.  When unlocked, TF-A
communicates this to subsequent software by passing a DT fragment that
sets the "status" property of the RPC-IF device node to "okay".

Unfortunately there are several issues preventing this from working all
the way to Linux:
  1. TF-A (and U-Boot on the receiving side) uses a device node name
     that does not conform to the DT specification nor the DT bindings
     for RPC-IF,
  2. While U-Boot receives the RPC-IF enablement from TF-A, it does not
     propagate it to Linux yet,
  3. The DTS files that are part of Linux do not have RPC HyperFlash
     support yet.

The first two issues are handled by patches for TF-A[1] and U-Boot[2].

This patch series takes care of the third issue, by adding device nodes
for the RPC-IF interfaces and the HyperFlash devices to the various DTS
files.  The "status" properties of the RPC-IF device nodes are left
"disabled", and are to be updated by U-Boot when unlocked.

HyperFlash operation has been tested on a variety of SoCs (R-Car H3
ES1.1 & ES2.0, M3-W ES1.0, M3-N ES1.0, E3 ES1.0, and D3 ES1.1) and
boards (Salvator-XS, ULCB, Ebisu-4D, and Draak).

For testing, this series and its Linux dependencies (HF fix[3], clk[4],
pinctrl[5]) can be found at[6].

Thanks for your comments!

[1] "[PATCH TF-A] fix(plat/rcar3): Fix RPC-IF device node name"
    https://lore.kernel.org/r/3685623bed84674039adb61e723288d359ab0a50.1648544199.git.geert+renesas@glider.be

[2] "[PATCH u-boot 0/3] renesas: Fix RPC-IF enablement"
    https://lore.kernel.org/r/cover.1648544792.git.geert+renesas@glider.be

[3] "[PATCH v3] memory: renesas-rpc-if: Fix HF/OSPI data transfer in
     Manual mode"
    https://lore.kernel.org/r/ad6ef2af754c8163f825d3a199d64f910d63f802.1648545212.git.geert+renesas@glider.be

[4] "[PATCH 0/2] clk: renesas: r8a7799[05]: Add RPC clocks"
    https://lore.kernel.org/r/cover.1648546700.git.geert+renesas@glider.be

[5] "[PATCH 0/2] pinctrl: renesas: r8a7799[05]: Add RPC pins, groups,
     and functions"
    https://lore.kernel.org/r/cover.1648547080.git.geert+renesas@glider.be

[6] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/rcar3-rpc-hf-v1

Geert Uytterhoeven (5):
  arm64: dts: renesas: rcar-gen3: Add RPC device nodes
  arm64: dts: renesas: draak: Add RPC HyperFlash device node
  arm64: dts: renesas: ebisu: Add RPC HyperFlash device node
  arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node
  arm64: dts: renesas: ulcb: Add RPC HyperFlash device node

 arch/arm64/boot/dts/renesas/draak.dtsi        | 58 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/ebisu.dtsi        | 58 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77951.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77960.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77961.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77965.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77990.dtsi     | 16 +++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi     | 16 +++++
 .../boot/dts/renesas/salvator-common.dtsi     | 49 ++++++++++++++++
 arch/arm64/boot/dts/renesas/ulcb.dtsi         | 49 ++++++++++++++++
 10 files changed, 310 insertions(+)

-- 
2.25.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 1/5] arm64: dts: renesas: rcar-gen3: Add RPC device nodes

[Geert Uytterhoeven]

Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
various R-Car Gen3 SoCs that do not have support for them yet in their
device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).

Based on patches in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
  - Follow sort order,
  - Update label and node name,
  - Update compatible value,
  - Update size of first memory region,
  - Add missing reg-names and resets properties,
  - Add R-Car E3 and D3.
---
 arch/arm64/boot/dts/renesas/r8a77951.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77960.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77965.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77990.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 16 ++++++++++++++++
 6 files changed, 96 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 4e87e8776a2b3e5d..5fada4fcbe1815b6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -2731,6 +2731,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a7795-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sata: sata@ee300000 {
 			compatible = "renesas,sata-r8a7795",
 				     "renesas,rcar-gen3-sata";
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index 6f79da8cc8c08281..4a8fe8d8db7969ba 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2531,6 +2531,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a7796-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 68cbbb322acfa9c3..75fb4c60aef1a5e7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2375,6 +2375,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77961-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 9f858af8b76221ce..efe0728062db6c69 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -2378,6 +2378,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77965-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sata: sata@ee300000 {
 			compatible = "renesas,sata-r8a77965",
 				     "renesas,rcar-gen3-sata";
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 7e0f1aab21352d33..6a259dd354a28b05 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1837,6 +1837,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77990-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index cac1f9467ffa60c7..f2a41bf17a6af5f3 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -1237,6 +1237,22 @@ sdhi2: mmc@ee140000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77995-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
-- 
2.25.1

[PATCH 1/5] arm64: dts: renesas: rcar-gen3: Add RPC device nodes

[Geert Uytterhoeven]

Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
various R-Car Gen3 SoCs that do not have support for them yet in their
device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).

Based on patches in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
  - Follow sort order,
  - Update label and node name,
  - Update compatible value,
  - Update size of first memory region,
  - Add missing reg-names and resets properties,
  - Add R-Car E3 and D3.
---
 arch/arm64/boot/dts/renesas/r8a77951.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77960.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77965.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77990.dtsi | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 16 ++++++++++++++++
 6 files changed, 96 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 4e87e8776a2b3e5d..5fada4fcbe1815b6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -2731,6 +2731,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a7795-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sata: sata@ee300000 {
 			compatible = "renesas,sata-r8a7795",
 				     "renesas,rcar-gen3-sata";
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index 6f79da8cc8c08281..4a8fe8d8db7969ba 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2531,6 +2531,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a7796-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 68cbbb322acfa9c3..75fb4c60aef1a5e7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2375,6 +2375,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77961-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 9f858af8b76221ce..efe0728062db6c69 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -2378,6 +2378,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77965-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sata: sata@ee300000 {
 			compatible = "renesas,sata-r8a77965",
 				     "renesas,rcar-gen3-sata";
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 7e0f1aab21352d33..6a259dd354a28b05 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1837,6 +1837,22 @@ sdhi3: mmc@ee160000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77990-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index cac1f9467ffa60c7..f2a41bf17a6af5f3 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -1237,6 +1237,22 @@ sdhi2: mmc@ee140000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a77995-rpc-if",
+				     "renesas,rcar-gen3-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 917>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 917>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
-- 
2.25.1


_______________________________________________
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[PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common Draak board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/draak.dtsi | 58 ++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/draak.dtsi b/arch/arm64/boot/dts/renesas/draak.dtsi
index eb0327c0df48f2e3..2a784ee6da49cb95 100644
--- a/arch/arm64/boot/dts/renesas/draak.dtsi
+++ b/arch/arm64/boot/dts/renesas/draak.dtsi
@@ -541,6 +541,12 @@ pwm1_pins: pwm1 {
 		function = "pwm1";
 	};
 
+	rpc_pins: rpc {
+		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+			 "rpc_int";
+		function = "rpc";
+	};
+
 	scif2_pins: scif2 {
 		groups = "scif2_data";
 		function = "scif2";
@@ -630,6 +636,58 @@ rsnd_for_ak4613: endpoint {
 	};
 };
 
+&rpc {
+	pinctrl-0 = <&rpc_pins>;
+	pinctrl-names = "default";
+
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1

[PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common Draak board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/draak.dtsi | 58 ++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/draak.dtsi b/arch/arm64/boot/dts/renesas/draak.dtsi
index eb0327c0df48f2e3..2a784ee6da49cb95 100644
--- a/arch/arm64/boot/dts/renesas/draak.dtsi
+++ b/arch/arm64/boot/dts/renesas/draak.dtsi
@@ -541,6 +541,12 @@ pwm1_pins: pwm1 {
 		function = "pwm1";
 	};
 
+	rpc_pins: rpc {
+		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+			 "rpc_int";
+		function = "rpc";
+	};
+
 	scif2_pins: scif2 {
 		groups = "scif2_data";
 		function = "scif2";
@@ -630,6 +636,58 @@ rsnd_for_ak4613: endpoint {
 	};
 };
 
+&rpc {
+	pinctrl-0 = <&rpc_pins>;
+	pinctrl-names = "default";
+
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1


_______________________________________________
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[PATCH 3/5] arm64: dts: renesas: ebisu: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common Ebisu board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/ebisu.dtsi | 58 ++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ebisu.dtsi b/arch/arm64/boot/dts/renesas/ebisu.dtsi
index 67231c8576c52b18..ae688707f8c69a32 100644
--- a/arch/arm64/boot/dts/renesas/ebisu.dtsi
+++ b/arch/arm64/boot/dts/renesas/ebisu.dtsi
@@ -600,6 +600,12 @@ pwm5_pins: pwm5 {
 		function = "pwm5";
 	};
 
+	rpc_pins: rpc {
+		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+			 "rpc_int";
+		function = "rpc";
+	};
+
 	scif2_pins: scif2 {
 		groups = "scif2_data_a";
 		function = "scif2";
@@ -711,6 +717,58 @@ dai0 {
 
 };
 
+&rpc {
+	pinctrl-0 = <&rpc_pins>;
+	pinctrl-names = "default";
+
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1

[PATCH 3/5] arm64: dts: renesas: ebisu: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common Ebisu board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/ebisu.dtsi | 58 ++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ebisu.dtsi b/arch/arm64/boot/dts/renesas/ebisu.dtsi
index 67231c8576c52b18..ae688707f8c69a32 100644
--- a/arch/arm64/boot/dts/renesas/ebisu.dtsi
+++ b/arch/arm64/boot/dts/renesas/ebisu.dtsi
@@ -600,6 +600,12 @@ pwm5_pins: pwm5 {
 		function = "pwm5";
 	};
 
+	rpc_pins: rpc {
+		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+			 "rpc_int";
+		function = "rpc";
+	};
+
 	scif2_pins: scif2 {
 		groups = "scif2_data_a";
 		function = "scif2";
@@ -711,6 +717,58 @@ dai0 {
 
 };
 
+&rpc {
+	pinctrl-0 = <&rpc_pins>;
+	pinctrl-names = "default";
+
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1


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[PATCH 4/5] arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common Salvator-X(S) board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
  - Update label,
  - Keep RPC disabled,
  - Add missing "cypress,hyperflash" compatible value,
  - Drop leading zeroes from unit addresses,
  - Use lower-case hexadecimal values,
  - Enlarge uboot partition,
  - Drop uboot-env partition.
---
 .../boot/dts/renesas/salvator-common.dtsi     | 49 +++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index d1dbaf7d1170812f..4ebef1d2a7b4ddbc 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -872,6 +872,55 @@ rsnd_endpoint2: endpoint {
 	};
 };
 
+&rpc {
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1

[PATCH 4/5] arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common Salvator-X(S) board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
  - Update label,
  - Keep RPC disabled,
  - Add missing "cypress,hyperflash" compatible value,
  - Drop leading zeroes from unit addresses,
  - Use lower-case hexadecimal values,
  - Enlarge uboot partition,
  - Drop uboot-env partition.
---
 .../boot/dts/renesas/salvator-common.dtsi     | 49 +++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index d1dbaf7d1170812f..4ebef1d2a7b4ddbc 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -872,6 +872,55 @@ rsnd_endpoint2: endpoint {
 	};
 };
 
+&rpc {
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1


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[PATCH 5/5] arm64: dts: renesas: ulcb: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common ULCB board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
  - Update label,
  - Keep RPC disabled,
  - Add missing "cypress,hyperflash" compatible value,
  - Drop leading zeroes from unit addresses,
  - Use lower-case hexadecimal values.
  - Enlarge uboot partition,
  - Drop uboot-env partition.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 49 +++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index b4bdb2d7e4bacb9d..90a4c0629d240fdb 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -426,6 +426,55 @@ rsnd_for_hdmi: endpoint {
 	};
 };
 
+&rpc {
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1

[PATCH 5/5] arm64: dts: renesas: ulcb: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Add the RPC HyperFlash device node along with its partitions to the
common ULCB board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
  - Update label,
  - Keep RPC disabled,
  - Add missing "cypress,hyperflash" compatible value,
  - Drop leading zeroes from unit addresses,
  - Use lower-case hexadecimal values.
  - Enlarge uboot partition,
  - Drop uboot-env partition.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 49 +++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index b4bdb2d7e4bacb9d..90a4c0629d240fdb 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -426,6 +426,55 @@ rsnd_for_hdmi: endpoint {
 	};
 };
 
+&rpc {
+	/* Left disabled.  To be enabled by firmware when unlocked. */
+
+	flash@0 {
+		compatible = "cypress,hyperflash", "cfi-flash";
+		reg = <0>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootparam@0 {
+				reg = <0x00000000 0x040000>;
+				read-only;
+			};
+			bl2@40000 {
+				reg = <0x00040000 0x140000>;
+				read-only;
+			};
+			cert_header_sa6@180000 {
+				reg = <0x00180000 0x040000>;
+				read-only;
+			};
+			bl31@1c0000 {
+				reg = <0x001c0000 0x040000>;
+				read-only;
+			};
+			tee@200000 {
+				reg = <0x00200000 0x440000>;
+				read-only;
+			};
+			uboot@640000 {
+				reg = <0x00640000 0x100000>;
+				read-only;
+			};
+			dtb@740000 {
+				reg = <0x00740000 0x080000>;
+			};
+			kernel@7c0000 {
+				reg = <0x007c0000 0x1400000>;
+			};
+			user@1bc0000 {
+				reg = <0x01bc0000 0x2440000>;
+			};
+		};
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.25.1


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Re: [PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 336 bytes --]

On Tue, Mar 29, 2022 at 02:20:02PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Draak board DTS file.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks good and builds fine:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 336 bytes --]

On Tue, Mar 29, 2022 at 02:20:02PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Draak board DTS file.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks good and builds fine:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 309 bytes --]

On Tue, Mar 29, 2022 at 02:20:02PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Draak board DTS file.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks sane and builds fine,  but I didn't verify the partitions.


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Re: [PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 309 bytes --]

On Tue, Mar 29, 2022 at 02:20:02PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Draak board DTS file.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks sane and builds fine,  but I didn't verify the partitions.


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Re: [PATCH 1/5] arm64: dts: renesas: rcar-gen3: Add RPC device nodes

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 497 bytes --]

On Tue, Mar 29, 2022 at 02:20:01PM +0200, Geert Uytterhoeven wrote:
> Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
> various R-Car Gen3 SoCs that do not have support for them yet in their
> device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).
> 
> Based on patches in the BSP by Valentine Barshak.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks good and builds fine:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH 1/5] arm64: dts: renesas: rcar-gen3: Add RPC device nodes

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 497 bytes --]

On Tue, Mar 29, 2022 at 02:20:01PM +0200, Geert Uytterhoeven wrote:
> Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
> various R-Car Gen3 SoCs that do not have support for them yet in their
> device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).
> 
> Based on patches in the BSP by Valentine Barshak.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks good and builds fine:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Wolfram Sang]

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Eeks, the Rev-tag was for patch 1. Sorry for the noise!


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Re: [PATCH 2/5] arm64: dts: renesas: draak: Add RPC HyperFlash device node

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 58 bytes --]


Eeks, the Rev-tag was for patch 1. Sorry for the noise!


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Re: [PATCH 3/5] arm64: dts: renesas: ebisu: Add RPC HyperFlash device node

[Wolfram Sang]

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On Tue, Mar 29, 2022 at 02:20:03PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Ebisu board DTS file.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks sane and builds fine, but I didn't verify the partitions.


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Re: [PATCH 3/5] arm64: dts: renesas: ebisu: Add RPC HyperFlash device node

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 308 bytes --]

On Tue, Mar 29, 2022 at 02:20:03PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Ebisu board DTS file.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks sane and builds fine, but I didn't verify the partitions.


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Re: [PATCH 4/5] arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node

[Wolfram Sang]

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On Tue, Mar 29, 2022 at 02:20:04PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Salvator-X(S) board DTS file.
> 
> Based on a patch in the BSP by Valentine Barshak.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

No pinctrl settings for patch 4+5?


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Re: [PATCH 4/5] arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 344 bytes --]

On Tue, Mar 29, 2022 at 02:20:04PM +0200, Geert Uytterhoeven wrote:
> Add the RPC HyperFlash device node along with its partitions to the
> common Salvator-X(S) board DTS file.
> 
> Based on a patch in the BSP by Valentine Barshak.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

No pinctrl settings for patch 4+5?


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Re: [PATCH 4/5] arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Hi Wolfram,

On Thu, Apr 7, 2022 at 9:08 AM Wolfram Sang <wsa@kernel.org> wrote:
> On Tue, Mar 29, 2022 at 02:20:04PM +0200, Geert Uytterhoeven wrote:
> > Add the RPC HyperFlash device node along with its partitions to the
> > common Salvator-X(S) board DTS file.
> >
> > Based on a patch in the BSP by Valentine Barshak.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> No pinctrl settings for patch 4+5?

The QSPI pins are single-function on R-Car H3, M3-W, M3-W+, and M3-N.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 4/5] arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node

[Geert Uytterhoeven]

Hi Wolfram,

On Thu, Apr 7, 2022 at 9:08 AM Wolfram Sang <wsa@kernel.org> wrote:
> On Tue, Mar 29, 2022 at 02:20:04PM +0200, Geert Uytterhoeven wrote:
> > Add the RPC HyperFlash device node along with its partitions to the
> > common Salvator-X(S) board DTS file.
> >
> > Based on a patch in the BSP by Valentine Barshak.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> No pinctrl settings for patch 4+5?

The QSPI pins are single-function on R-Car H3, M3-W, M3-W+, and M3-N.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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