From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 492E4C433F5 for ; Tue, 29 Mar 2022 16:02:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239128AbiC2QDn (ORCPT ); Tue, 29 Mar 2022 12:03:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238372AbiC2QDm (ORCPT ); Tue, 29 Mar 2022 12:03:42 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA25B51591; Tue, 29 Mar 2022 09:01:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648569719; x=1680105719; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=XtK+qF/NBtqnWJTk/2k8vIkRlnahWCMn9PfN5nUzZwM=; b=FKfTARM6EyqwtUXkGLwEvIuESa3RgovvQSDeX+Cda+Kc+oon1oFdMu8M XhoNKPiE6dq+ddnnfOtlCzQd0HYqrevdODWZ+PRgykxr7RZAEgR/RqNU3 wFGWv8mWyYCNblAdSHjFTB4KB7LfY+Vw+MIYg4FY+VR4mscsbSyoA/aU2 8DDVcW5Czf9v+SgDWW5kWjmZMe5nKqOXt3PKZQyNfe2VOLD7qXVCwMgNl EoZ/m91VarlCE5fJ8aoHVbdRWZguS93qc+twjoINvs2Ror00CZbkTmXcV kpQgR6HEyQcc4HAm7okp7iagPP1X6u7vxKeGDWO5yYoMOPcDf+u9ilwV/ Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="259470594" X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="259470594" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2022 09:01:51 -0700 X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="787639883" Received: from smile.fi.intel.com ([10.237.72.59]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2022 09:01:48 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.95) (envelope-from ) id 1nZEHS-008qQf-MU; Tue, 29 Mar 2022 19:01:14 +0300 Date: Tue, 29 Mar 2022 19:01:14 +0300 From: Andy Shevchenko To: Miquel Raynal Cc: Geert Uytterhoeven , Magnus Damm , Greg Kroah-Hartman , Jiri Slaby , linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger Subject: Re: [PATCH v3 00/10] serial: 8250: dw: RZN1 DMA support Message-ID: References: <20220329152430.756947-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220329152430.756947-1-miquel.raynal@bootlin.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org On Tue, Mar 29, 2022 at 05:24:20PM +0200, Miquel Raynal wrote: > Hello, > > Support for the RZN1 DMA engine allows us adapt a little bit the 8250 DW > UART driver with to bring DMA support for this SoC. > > This short series applies on top of the series bringing RZN1 DMA > support, currently on its v5, see [1]. Technically speaking, only the DT > patch needs to be applied after [1]. The other patches can come in at > any moment, because if no "dmas" property is provided in the DT, DMA > support will simply be ignored. > > [1] https://lore.kernel.org/dmaengine/20220315191255.221473-1-miquel.raynal@bootlin.com/T/#m0ef3323abce3eec961e142bf2fb35e95b9045fc5 Thanks for a new version! It becomes definitely closer to the good enough state. Since I have comments and we still in the middle of the merge window we have time to address them. -- With Best Regards, Andy Shevchenko