All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Disable DC5 before going to DC9
Date: Wed, 20 Apr 2022 15:27:30 -0400	[thread overview]
Message-ID: <YmBeohtBLI4GblB4@intel.com> (raw)
In-Reply-To: <YmBdL2A3xOumaL4Z@ideak-desk.fi.intel.com>

On Wed, Apr 20, 2022 at 10:21:19PM +0300, Imre Deak wrote:
> On Wed, Apr 20, 2022 at 03:09:21PM -0400, Rodrigo Vivi wrote:
> > According to BSPec:
> > 	Sequence to Allow DC9:
> > 		1. Follow Sequence to Disallow DC5.
> > 
> > which is:
> > 	Sequence to Disallow DC5 and DC6
> > 		Set DC_STATE_EN Dynamic DC State Enable = "Disable".
> > 
> > I understand that we haven't had any issue so far. But since
> > DC9 is a software thing, it is better to disable DC5 before
> > to avoid any conflict. And respect the spec to avoid potential
> > future issues.
> > 
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_power.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index 6a5695008f7c..b3cf5182044f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -883,6 +883,9 @@ static void bxt_enable_dc9(struct drm_i915_private *dev_priv)
> >  {
> >  	assert_can_enable_dc9(dev_priv);
> >  
> > +	/* Disable DC5 before enabling DC9 */
> > +	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> 
> For DC9 DMC should be disabled already, along with DC states and other
> dependencies like power well 1, etc. That happens in
> bxt/icl_display_core_uninit().

but that wasn't on the suspend_late path... but Anusha is right and
probably the check in the assert is already enough for now... if we
notice that assert is coming we do something else...

I was willing to avoid indirection and the risk of changing something
and this dc5 disable getting forgotten, but with the assert we are
probably good...

let's just ignore this patch...

> 
> > +
> >  	drm_dbg_kms(&dev_priv->drm, "Enabling DC9\n");
> >  	/*
> >  	 * Power sequencer reset is not needed on
> > -- 
> > 2.34.1
> > 

  reply	other threads:[~2022-04-20 19:27 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-20 19:09 [Intel-gfx] [PATCH] drm/i915: Disable DC5 before going to DC9 Rodrigo Vivi
2022-04-20 19:19 ` Srivatsa, Anusha
2022-04-20 19:21 ` Imre Deak
2022-04-20 19:27   ` Rodrigo Vivi [this message]
2022-04-20 22:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YmBeohtBLI4GblB4@intel.com \
    --to=rodrigo.vivi@intel.com \
    --cc=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.