From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A6846C433FE for ; Thu, 21 Apr 2022 15:36:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jO1NzSF7JInjrP5H14Q2CfRnNF0hQsvT3Stx4MzvjHQ=; b=adOh/qh6Bf+hBl phmb+IWi0L39E5iz8bn8aDvYUFlidebcOzZ/L5d7lTQR0X/R3jIgo5VU1/E0G/sFU8k57WZROJZCm Eq9MfWMkvoZsmOKRsJuhn70NwaTBU1iWlQud+DhmYnR0hfZy0ucaA/nLn8yY+IMHbaxC/aA1JJ+wb rlDUlEdFjGUQ98raBCsqZ8YnAK4+f8tjTh0BvcAdBBLOi3XL9Sl0/5E5ix9MVzxu4mMy/9K29OWPZ Lw5yzeVSokzsh6NwnNP3V23IcKXF7XPaPii3/vZycw3K9MK20ZSWNy1lYuZQVVLEx3MynWBSVdvzq FlhqCF8iAmmVsFE5ANTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhYq2-00E2jf-RH; Thu, 21 Apr 2022 15:35:22 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhYpz-00E2ir-4x for linux-arm-kernel@lists.infradead.org; Thu, 21 Apr 2022 15:35:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BF9351516; Thu, 21 Apr 2022 08:35:17 -0700 (PDT) Received: from lakrids (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DA72A3F73B; Thu, 21 Apr 2022 08:35:16 -0700 (PDT) Date: Thu, 21 Apr 2022 16:35:14 +0100 From: Mark Rutland To: Mark Brown Cc: Catalin Marinas , Will Deacon , Marc Zyngier , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 4/8] arm64: Add sysreg header generation scripting Message-ID: References: <20220419104329.188489-1-broonie@kernel.org> <20220419104329.188489-5-broonie@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220421_083519_326393_7A613EEC X-CRM114-Status: GOOD ( 47.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Apr 21, 2022 at 03:50:41PM +0100, Mark Brown wrote: > On Thu, Apr 21, 2022 at 03:16:52PM +0100, Mark Rutland wrote: > > On Thu, Apr 21, 2022 at 02:00:17PM +0100, Mark Brown wrote: > > > > > > The script requires that all bits in the register be specified and that > > > > > there be no overlapping fields. This helps the script spot errors in the > > > > > input but means that the few registers which change layout at runtime > > > > > depending on things like virtualisation settings will need some manual > > > > > handling. No actual register conversions are done here but a header for > > > > > the register data with some documention of the format is provided. > > > > > It would be good to see an example of how we'd handle one of those, in case > > > > that means we need to play around with naming or structure of the definitions a > > > > bit. > > > > My thinking here was that we might not want to handle those registers > > > through the automated stuff at all. I haven't yet come up with > > > something that seems tasteful and viable for them, if I had a firm idea > > > for what that should look like I'd probably have implemented it. > > > Sure, and I'm not expecting that we automate all of that, just that we > > have an idea of how the manual bits would work with the automatic bits. > > If the odd cases looks simple enough, we might be able to get away with > > a couple of small additions to the scripting. > > > For example, for ESR_EL{1,2,3} today we define ESR_ELx_field > > definitions rather than duplicate ESR_EL1_field / ESR_EL2_field / > > ESR_EL3_field definitions. If the scripting has a mechanism to handle > > that, then that might be good enough for the other odd cases. > > Ah, that's a separate issue to the registers which change layout which > was what was being mentioned above. Sure; what I was getting at is that the same mechanism might help there too -- see below. > > For example, I think we could do something like: > > > # Define a set of fields without a specific register encoding, using the > > # name `ESR_ELx` > > SysregFields ESR_ELx > > Res0 63:37 > > Field 36:32 ISS2 > > Field 31:26 EC > > Field 25 IL > > Field 24:0 ISS > > EndSysregFields > > Yes, I'd been thinking of something like this - it seemed an obvious > enough extension. > > > # This could instead be SysregEncoding > > Sysreg ESR_EL1 3 0 5 2 0 > > Comment "See ESR_ELx for fields" > > # Don't create any field definitions for this reg, and don't > > # bother with the associated sanity checks > > NoFields > > EndSysreg > > I think we're going to end up wanting to still generate the numbered > versions for use in macros so we should probably have that comment and > NoFields be a SharedLayout (or whatever bikeshedded name) statement. That's fair. My point was just that we *don't* do that today for ESR_ELx and having this might simplify the conversion and/or avoid repetition. Naming wise I'm fine with NoFields/SharedLayout/WhateverYouWant, and structurally I'm fine with doing other things, I just think we need to have an idea of what our get-out-of-jail-free-card looks like. > Until we need it that can just be equivalent to a comment, ready to kick > in once someone needs it. I can update the existing (trivial but meh) > TTBRn register conversion to do that. FWIW, I'm happy either way (i.e. TTBRn to staty as-is, or be converted), given the duplication is trivial. > > ... and the `SysregFields` `NoFields`, and `Comment` mechanisms might be > > good enough to cover the other odd cases we have (e.g. aliased > > GIC registers, or different "views" for the same register). > > > Does that make sense, or have I misunderstood the point you were making? > > I was talking about a completely different issue, things like CPTR_EL2 > where the register layout changes depending on some runtime > configuration. You'd need two separate register layouts within a single > Sysreg which isn't too bad until you get to the point of having to name > things like RES0/RES1 and any name collisons in fields (I don't *think* > we have name collisons...). I understood that was a distinct problem; what I was suggesting is the same mechanism might help there, as e.g. it would allow us to do: # Creates CPTR_EL2__E2H1_RES0, etc SysregFields CPTR_EL2__E2H1 Comment "CPTR_EL2 layout when HCR_EL2.E2H == 1" ... EndSysregFields # Creates CPTR_EL2__E2H0_RES0, etc SysregFields CPTR_EL2__E2H0 Comment "CPTR_EL2 layout when HCR_EL2.E2H == 0" ... EndSysregFields # Doesn't create CPTR_EL2_RES0, etc Sysreg CPTR_EL2 3 0 1 0 2 Comment "See CPTR_EL2__E2H1_* and CPTR_EL2__E2H0_*" NoFields EndSysreg ... or where we have two names for the same register encoding (which is really silly, but does exist): Sysreg ICV_EOIR0_EL1 3 0 12 8 1 Comment "See ICx_EOIR0_EL1_*" NoFields EndSysreg Sysreg ICH_EOIR0_EL1 3 0 12 8 1 Comment "See ICx_EOIR0_EL1_*" NoFields EndSysreg SysregFields ICx_EOIR0_EL1 Comment "Shared layout for ICV_EOIR0_EL1 and ICH_EOIR0_EL1" Res0 63:24 Field 23:0 INTID EndSysregFields I can believe there are problems with that, and/or maybe it's too ugly. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel