From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF346C433F5 for ; Thu, 21 Apr 2022 20:25:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392311AbiDUU2S (ORCPT ); Thu, 21 Apr 2022 16:28:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232992AbiDUU2Q (ORCPT ); Thu, 21 Apr 2022 16:28:16 -0400 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4322020184 for ; Thu, 21 Apr 2022 13:25:25 -0700 (PDT) Received: by mail-pl1-x632.google.com with SMTP id b7so6251494plh.2 for ; Thu, 21 Apr 2022 13:25:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=UEySV0DzK7I3Ur0LWxDI/vgnosJG6pJ56bIbPZMY9gQ=; b=HOkSQYpqvME1oE3C2IiUkZ51aNe8k3MUEsrK+jepBWwioR5nIjNh8BclZ0zx5q8xVs mkpaqV/+bdSVkqpU8GPemInL/rV1vajkfOslG1xo9vM/SP5001Tax+OvpMcaGHKy8N6A gqyBwvuqrQbSYGBzHPyDBAPbzu7lVVb7jZCpA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=UEySV0DzK7I3Ur0LWxDI/vgnosJG6pJ56bIbPZMY9gQ=; b=csAlJ1yam+nYJyig2GDh+ExYiqw0SzJMOmr/w2vY3eg+mO5hjBXlDTUvVj2Mog4hYS o99PPMcZngsjepiq8Ba0AJEADb+no1yg2SRCjwyHqqGuzaMECaJte00ThjJpjs9EI37T ryiU+sO12HDwbYbeyIQH8876X3hzb34iqQ689r8WXDIADHE5S7Dn0wP47UG1xKRCNQH1 xNEN2tqFPnEotw6BS7wc00PAyp94iy92gs9aO6vooa5rvVJ/g4489PrAgjsDmljpcW2G ZKPh2YFZPrN9+WOxkHSK7eZoh3nzTJd3n/9TIcrwuFCayMwKjffoXXrPBRaTv/c4Z5r9 OHZg== X-Gm-Message-State: AOAM531yHsBGKl0VNYuP0nHz3Scrx2QfZebYuLUf1tTg5WOntXeGKlQQ IMGHvHEGcM/bRCJYUXDIb/yQvw== X-Google-Smtp-Source: ABdhPJz7Ubc59E9HMMX6D9g97BLJYRK26lvIUBBQKnmU48NoqdR2Jv2jwAvBDap9HMew2Zo3SGwWeQ== X-Received: by 2002:a17:902:8506:b0:154:8692:a7ac with SMTP id bj6-20020a170902850600b001548692a7acmr1013146plb.10.1650572724719; Thu, 21 Apr 2022 13:25:24 -0700 (PDT) Received: from google.com ([2620:15c:202:201:e283:652b:fb2e:829f]) by smtp.gmail.com with ESMTPSA id y2-20020a056a00190200b004fa865d1fd3sm26252370pfi.86.2022.04.21.13.25.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Apr 2022 13:25:23 -0700 (PDT) Date: Thu, 21 Apr 2022 13:25:21 -0700 From: Brian Norris To: Luca Weiss Cc: Ulf Hansson , Adrian Hunter , Douglas Anderson , Heiner Kallweit , Shawn Lin , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, alexeymin@postmarketos.org Subject: Re: [PATCH v3] mmc: core: Set HS clock speed before sending HS CMD13 Message-ID: References: <20220330132946.v3.1.I484f4ee35609f78b932bd50feed639c29e64997e@changeid> <11962455.O9o76ZdvQC@g550jk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11962455.O9o76ZdvQC@g550jk> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Luca, On Thu, Apr 21, 2022 at 08:46:42PM +0200, Luca Weiss wrote: > On Mittwoch, 6. April 2022 16:55:40 CEST Ulf Hansson wrote: > > To get this thoroughly tested, I have applied it to my next branch, for now. > > > > If it turns out that there are no regressions being reported, I think > > we should move the patch to the fixes branch (to get it included for > > v5.18) and then also tag it for stable. So, I will get back to this in > > a couple of weeks. > > Unfortunately this patch breaks internal storage on qcom-msm8974-fairphone-fp2 That is indeed unfortunate :( So we should definitely not pick it to fixes/stable, at least not yet. And if we can't come to a solution soon, maybe revert it entirely, or at least drop the HS200 portions of the change. (The systems that inspired this change are OK at HS400ES, FWIW, so the HS200 changes are just a bonus.) > With this patch (included in linux-next-20220421) it fails to initialize: > > [ 1.868608] mmc0: SDHCI controller on f9824900.sdhci [f9824900.sdhci] using > ADMA 64-bit > [ 1.925220] mmc0: mmc_select_hs200 failed, error -110 > [ 1.925285] mmc0: error -110 whilst initialising MMC card > > After reverting this patch, it works fine again. > > [ 1.908835] mmc0: SDHCI controller on f9824900.sdhci [f9824900.sdhci] using > ADMA 64-bit > [ 1.964700] mmc0: new HS200 MMC card at address 0001 > [ 1.965388] mmcblk0: mmc0:0001 BWBC3R 29.1 GiB > [ 1.975106] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 > p16 p17 p18 p19 p20 > [ 1.982545] mmcblk0boot0: mmc0:0001 BWBC3R 4.00 MiB > [ 1.988247] mmcblk0boot1: mmc0:0001 BWBC3R 4.00 MiB > [ 1.993287] mmcblk0rpmb: mmc0:0001 BWBC3R 4.00 MiB, chardev (242:0) As a bit of a (semi-educated) shot in the dark: can you try the appended patch? That's what my patch v1 did, but I changed it due to review comments. (Either way worked for my systems.) After re-reading the HS200-specific portions of the spec (JESD84-B51 page 45 / 6.6.2.2), it's possible setting all the way to 200 MHz this early was a bit overagressive, and we should be keeping a max of 52 MHz at this point. Thanks for testing and reporting. Brian --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1491,7 +1491,7 @@ static int mmc_select_hs200(struct mmc_card *card) old_timing = host->ios.timing; old_clock = host->ios.clock; mmc_set_timing(host, MMC_TIMING_MMC_HS200); - mmc_set_bus_speed(card); + mmc_set_clock(card->host, card->ext_csd.hs_max_dtr); /* * For HS200, CRC errors are not a reliable way to know the