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From: Keith Busch <kbusch@kernel.org>
To: Klaus Jensen <its@irrelevant.dk>
Cc: kbusch@fb.com, qemu-block@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH] nvme: fix bit buckets
Date: Mon, 25 Apr 2022 08:33:45 -0600	[thread overview]
Message-ID: <YmaxSUmENF1jAcag@kbusch-mbp.dhcp.thefacebook.com> (raw)
In-Reply-To: <YmZxApttNqy6SNLi@apples>

On Mon, Apr 25, 2022 at 11:59:30AM +0200, Klaus Jensen wrote:
> The approach is neat and simple, but I don't think it has the intended
> effect. The memory region addr is just left at 0x0, so we just end up
> with mapping that directly into the qsg and in my test setup, this
> basically does DMA to the admin completion queue which happens to be at
> 0x0.
> 
> I would have liked to handle it like we do for CMB addresses, and
> reserve some address known to the device (i.e. remapping to a local
> allocated buffer), but we can't easily do that because of the iov/qsg
> duality thingie. The dma helpers wont work with it.
> 
> For now, I think we need to just rip out the bit bucket support.

Ah crap, I think you're right. Not as simple as I thought. The idea was to have
a dummy DMA-able region. We can have a controller DMA to another controller's
CMB without any special handling, so that's kind of what I'm trying except the
region doesn't need to be tied to any particular device.

And now that you got me thinking about it, there needs to be special bit bucket
handling for local CMB as well.


      reply	other threads:[~2022-04-25 14:52 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20220422163721.3392373-1-kbusch@kernel.org>
2022-04-25  9:59 ` [PATCH] nvme: fix bit buckets Klaus Jensen
2022-04-25 14:33   ` Keith Busch [this message]

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