From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DFE2C4332F for ; Mon, 9 May 2022 02:56:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229729AbiEIC7Y (ORCPT ); Sun, 8 May 2022 22:59:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229585AbiEIC55 (ORCPT ); Sun, 8 May 2022 22:57:57 -0400 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD4DD8164B for ; Sun, 8 May 2022 19:54:05 -0700 (PDT) Received: by mail-pj1-x1036.google.com with SMTP id l7-20020a17090aaa8700b001dd1a5b9965so1113286pjq.2 for ; Sun, 08 May 2022 19:54:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20210112.gappssmtp.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=ZTTQaK1MCP0Shiup/o7qs7DSoxAGZcC20JNp/8zusXE=; b=lvu0tqEAYL4lMpXHlUzMzuGrVzNiSN1F7GkTpaXG15DPrHT1CKlKmPTSyxU7h/NV/j kUWsTNFP/67CPMC2uOZi3lJkE0lLp5sDkHR5Vg4ZoLQibwozZlVvVrWAmrcTfYRpX//B IUvdewS9yYA2LSGRsdHGz3Vy9in8L82rvGFwD3Zc8rtXp9G3nFfXed3dmePb2uW74wWS gjRGNoAkLLOEaS+JIVqDdXS8Khp2rr6+h+bGKqkjlK7OSgl+ubpQebutmaP5tiQRi8Kq 5jTLundScFrLcZoaaz36HUq3ybV0gU6aQtsrRhtprHTBJRtzsvzNZ5USFQbLHaHia+ap v4wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=ZTTQaK1MCP0Shiup/o7qs7DSoxAGZcC20JNp/8zusXE=; b=uwc8GOXxzAVOptfAoEPeWPTXfwkGbXb+kRV8MrDBNau51XVnlkJAcxiIuZPS4rx5oH xY+DaWaC9YKlw3BdoJfgZoPO0SYtqKLPoV0Uy+7zTJgJoLBVWWZxehg0g1Q7z2w1YuDt xA7fVXAZyETznEIG0hMeewiTyDrzv7SxkRppY5Gj6vb96Q/WvJwZUl+y9HMZSh4DexbZ Tkl1g+iV7pjn+jN7FDBaNZLf/elJKEBlizOQPL/XnlYUcCkarCROAKut58YY6yXHT9Vh dj2X+D6yLzWR/reZYbvNWZlNmvMFEjIPDPgbRE/u+8NkKWmtYak0ybxnbbjyksyDrSne 0NEw== X-Gm-Message-State: AOAM533lEF8EU2wI5d9FAsPStY9jjZOmKOIQBYJFcM7UQ6hACIrPZphd MqohMT/x0YAYgQpLBEZgyyLaJg== X-Google-Smtp-Source: ABdhPJy7zWNcQupxAcYMUNYtQ/R40mo+W7VEUJcoJcHH9ByfyOdtqYbfEKoLlg6WSLCwLEQ+8OB54A== X-Received: by 2002:a17:902:d2c9:b0:15e:b28d:8ad2 with SMTP id n9-20020a170902d2c900b0015eb28d8ad2mr14262241plc.94.1652064845269; Sun, 08 May 2022 19:54:05 -0700 (PDT) Received: from localhost ([139.177.225.250]) by smtp.gmail.com with ESMTPSA id o18-20020a170902e29200b0015e8d4eb258sm5783241plc.162.2022.05.08.19.54.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 May 2022 19:54:04 -0700 (PDT) Date: Mon, 9 May 2022 10:54:00 +0800 From: Muchun Song To: Matthew Wilcox Cc: Baolin Wang , catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, mike.kravetz@oracle.com, akpm@linux-foundation.org, sj@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org Subject: Re: [RFC PATCH 0/3] Introduce new huge_ptep_get_access_flags() interface Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 08, 2022 at 06:08:18PM +0100, Matthew Wilcox wrote: > On Sun, May 08, 2022 at 04:58:51PM +0800, Baolin Wang wrote: > > As Mike pointed out [1], the huge_ptep_get() will only return one specific > > pte value for the CONT-PTE or CONT-PMD size hugetlb on ARM64 system, which > > will not take into account the subpages' dirty or young bits of a CONT-PTE/PMD > > size hugetlb page. That will make us miss dirty or young flags of a CONT-PTE/PMD > > size hugetlb page for those functions that want to check the dirty or > > young flags of a hugetlb page. For example, the gather_hugetlb_stats() will > > get inaccurate dirty hugetlb page statistics, and the DAMON for hugetlb monitoring > > will also get inaccurate access statistics. > > > > To fix this issue, one approach is that we can define an ARM64 specific huge_ptep_get() > > implementation, which will take into account any subpages' dirty or young bits. > > However we should add a new parameter for ARM64 specific huge_ptep_get() to check > > how many continuous PTEs or PMDs in this CONT-PTE/PMD size hugetlb, that means we > > should convert all the places using huge_ptep_get(), meanwhile most places using > > huge_ptep_get() did not care about the dirty or young flags at all. > > > > So instead of changing the prototype of huge_ptep_get(), this patch set introduces > > a new huge_ptep_get_access_flags() interface and define an ARM64 specific implementation, > > that will take into account any subpages' dirty or young bits for CONT-PTE/PMD size > > hugetlb page. And we can only change to use huge_ptep_get_access_flags() for those > > functions that care about the dirty or young flags of a hugetlb page. > > I question whether this is the right approach. I understand that > different hardware implementations have different requirements here, > but at least one that I'm aware of (AMD Zen 2/3) requires that all > PTEs that are part of a contig PTE must have identical A/D bits. Now, > you could say that's irrelevant because it's x86 and we don't currently > support contPTE on x86, but I wouldn't be surprised to see that other > hardware has the same requirement. > > So what if we make that a Linux requirement? Setting a contPTE dirty or > accessed becomes a bit more expensive (although still one/two cachelines, > so not really much more expensive than a single write). Then there's no > need to change the "get" side of things because they're always identical. > > It does mean that we can't take advantage of hardware setting A/D bits, > unless hardware can be persuaded to behave this way. I don't have any > ARM specs in front of me to check. > I have looked at the comments in get_clear_flush() (in arch/arm64/mm/hugetlbpage.c). That says: /* * If HW_AFDBM is enabled, then the HW could turn on * the dirty or accessed bit for any page in the set, * so check them all. */ Unfortunately, the AD bits are not identical in all subpages. Thanks. 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Sun, 08 May 2022 19:54:04 -0700 (PDT) Date: Mon, 9 May 2022 10:54:00 +0800 From: Muchun Song To: Matthew Wilcox Cc: Baolin Wang , catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, mike.kravetz@oracle.com, akpm@linux-foundation.org, sj@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org Subject: Re: [RFC PATCH 0/3] Introduce new huge_ptep_get_access_flags() interface Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220508_195406_625921_740A8084 X-CRM114-Status: GOOD ( 34.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, May 08, 2022 at 06:08:18PM +0100, Matthew Wilcox wrote: > On Sun, May 08, 2022 at 04:58:51PM +0800, Baolin Wang wrote: > > As Mike pointed out [1], the huge_ptep_get() will only return one specific > > pte value for the CONT-PTE or CONT-PMD size hugetlb on ARM64 system, which > > will not take into account the subpages' dirty or young bits of a CONT-PTE/PMD > > size hugetlb page. That will make us miss dirty or young flags of a CONT-PTE/PMD > > size hugetlb page for those functions that want to check the dirty or > > young flags of a hugetlb page. For example, the gather_hugetlb_stats() will > > get inaccurate dirty hugetlb page statistics, and the DAMON for hugetlb monitoring > > will also get inaccurate access statistics. > > > > To fix this issue, one approach is that we can define an ARM64 specific huge_ptep_get() > > implementation, which will take into account any subpages' dirty or young bits. > > However we should add a new parameter for ARM64 specific huge_ptep_get() to check > > how many continuous PTEs or PMDs in this CONT-PTE/PMD size hugetlb, that means we > > should convert all the places using huge_ptep_get(), meanwhile most places using > > huge_ptep_get() did not care about the dirty or young flags at all. > > > > So instead of changing the prototype of huge_ptep_get(), this patch set introduces > > a new huge_ptep_get_access_flags() interface and define an ARM64 specific implementation, > > that will take into account any subpages' dirty or young bits for CONT-PTE/PMD size > > hugetlb page. And we can only change to use huge_ptep_get_access_flags() for those > > functions that care about the dirty or young flags of a hugetlb page. > > I question whether this is the right approach. I understand that > different hardware implementations have different requirements here, > but at least one that I'm aware of (AMD Zen 2/3) requires that all > PTEs that are part of a contig PTE must have identical A/D bits. Now, > you could say that's irrelevant because it's x86 and we don't currently > support contPTE on x86, but I wouldn't be surprised to see that other > hardware has the same requirement. > > So what if we make that a Linux requirement? Setting a contPTE dirty or > accessed becomes a bit more expensive (although still one/two cachelines, > so not really much more expensive than a single write). Then there's no > need to change the "get" side of things because they're always identical. > > It does mean that we can't take advantage of hardware setting A/D bits, > unless hardware can be persuaded to behave this way. I don't have any > ARM specs in front of me to check. > I have looked at the comments in get_clear_flush() (in arch/arm64/mm/hugetlbpage.c). That says: /* * If HW_AFDBM is enabled, then the HW could turn on * the dirty or accessed bit for any page in the set, * so check them all. */ Unfortunately, the AD bits are not identical in all subpages. Thanks. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel