From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67E26C433F5 for ; Tue, 10 May 2022 11:34:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241116AbiEJLiM (ORCPT ); Tue, 10 May 2022 07:38:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241031AbiEJLhz (ORCPT ); Tue, 10 May 2022 07:37:55 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E201552B21; Tue, 10 May 2022 04:33:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6921FB81CDB; Tue, 10 May 2022 11:33:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A281BC385A6; Tue, 10 May 2022 11:33:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1652182433; bh=4S94+mx6dVJLEG2BxGlKwrLKJDvYFLhBRg0uGGTZxLQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TKuXZ4Vij6fynBapIO/JqbWo2+ZCuYrRV19th1q98id7Pn2Az9AKQEADloVliY6NN 6cQLYO984vdEV+h+6bkNlRHxlz74UovwlXUixxypbt9/JHG8Ge3Zo9e4Q0FVNu0c49 Tz0VrzIDJ+yyS2T6OVHNFy7feDgMtB+1n9+ZfLF0= Date: Tue, 10 May 2022 13:33:50 +0200 From: Greg KH To: Paolo Bonzini Cc: Kyle Huey , stable@vger.kernel.org, Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , kvm@vger.kernel.org, Robert O'Callahan , Keno Fischer Subject: Re: [PATCH 5.4] KVM: x86/svm: Account for family 17h event renumberings in amd_pmc_perf_hw_id Message-ID: References: <20220508165434.119000-1-khuey@kylehuey.com> <29767a7d-d887-1a0c-296e-5bed220f1c9e@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <29767a7d-d887-1a0c-296e-5bed220f1c9e@redhat.com> Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Mon, May 09, 2022 at 01:41:20PM +0200, Paolo Bonzini wrote: > On 5/8/22 18:54, Kyle Huey wrote: > > From: Kyle Huey > > > > commit 5eb849322d7f7ae9d5c587c7bc3b4f7c6872cd2f upstream > > > > Zen renumbered some of the performance counters that correspond to the > > well known events in perf_hw_id. This code in KVM was never updated for > > that, so guest that attempt to use counters on Zen that correspond to the > > pre-Zen perf_hw_id values will silently receive the wrong values. > > > > This has been observed in the wild with rr[0] when running in Zen 3 > > guests. rr uses the retired conditional branch counter 00d1 which is > > incorrectly recognized by KVM as PERF_COUNT_HW_STALLED_CYCLES_BACKEND. > > > > [0] https://rr-project.org/ > > > > Signed-off-by: Kyle Huey > > Message-Id: <20220503050136.86298-1-khuey@kylehuey.com> > > Cc: stable@vger.kernel.org > > [Check guest family, not host. - Paolo] > > Signed-off-by: Paolo Bonzini > > [Backport to 5.4: adjusted context] > > Signed-off-by: Kyle Huey > > --- > > arch/x86/kvm/pmu_amd.c | 28 +++++++++++++++++++++++++--- > > 1 file changed, 25 insertions(+), 3 deletions(-) > > > > diff --git a/arch/x86/kvm/pmu_amd.c b/arch/x86/kvm/pmu_amd.c > > index 6bc656abbe66..3ccfd1abcbad 100644 > > --- a/arch/x86/kvm/pmu_amd.c > > +++ b/arch/x86/kvm/pmu_amd.c > > @@ -44,6 +44,22 @@ static struct kvm_event_hw_type_mapping amd_event_mapping[] = { > > [7] = { 0xd1, 0x00, PERF_COUNT_HW_STALLED_CYCLES_BACKEND }, > > }; > > +/* duplicated from amd_f17h_perfmon_event_map. */ > > +static struct kvm_event_hw_type_mapping amd_f17h_event_mapping[] = { > > + [0] = { 0x76, 0x00, PERF_COUNT_HW_CPU_CYCLES }, > > + [1] = { 0xc0, 0x00, PERF_COUNT_HW_INSTRUCTIONS }, > > + [2] = { 0x60, 0xff, PERF_COUNT_HW_CACHE_REFERENCES }, > > + [3] = { 0x64, 0x09, PERF_COUNT_HW_CACHE_MISSES }, > > + [4] = { 0xc2, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS }, > > + [5] = { 0xc3, 0x00, PERF_COUNT_HW_BRANCH_MISSES }, > > + [6] = { 0x87, 0x02, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND }, > > + [7] = { 0x87, 0x01, PERF_COUNT_HW_STALLED_CYCLES_BACKEND }, > > +}; > > + > > +/* amd_pmc_perf_hw_id depends on these being the same size */ > > +static_assert(ARRAY_SIZE(amd_event_mapping) == > > + ARRAY_SIZE(amd_f17h_event_mapping)); > > + > > static unsigned int get_msr_base(struct kvm_pmu *pmu, enum pmu_type type) > > { > > struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu); > > @@ -130,17 +146,23 @@ static unsigned amd_find_arch_event(struct kvm_pmu *pmu, > > u8 event_select, > > u8 unit_mask) > > { > > + struct kvm_event_hw_type_mapping *event_mapping; > > int i; > > + if (guest_cpuid_family(pmc->vcpu) >= 0x17) > > + event_mapping = amd_f17h_event_mapping; > > + else > > + event_mapping = amd_event_mapping; > > + > > for (i = 0; i < ARRAY_SIZE(amd_event_mapping); i++) > > - if (amd_event_mapping[i].eventsel == event_select > > - && amd_event_mapping[i].unit_mask == unit_mask) > > + if (event_mapping[i].eventsel == event_select > > + && event_mapping[i].unit_mask == unit_mask) > > break; > > if (i == ARRAY_SIZE(amd_event_mapping)) > > return PERF_COUNT_HW_MAX; > > - return amd_event_mapping[i].event_type; > > + return event_mapping[i].event_type; > > } > > /* return PERF_COUNT_HW_MAX as AMD doesn't have fixed events */ > > Acked-by: Paolo Bonzini Now queued up, thanks. greg k-h