From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AC6DC433EF for ; Tue, 10 May 2022 12:55:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 3BBA7C385C2; Tue, 10 May 2022 12:55:19 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.kernel.org (Postfix) with ESMTP id D15C2C385C6 for ; Tue, 10 May 2022 12:55:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org D15C2C385C6 Authentication-Results: smtp.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6039212FC for ; Tue, 10 May 2022 05:55:17 -0700 (PDT) Received: from e110455-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1B4FC3F73D for ; Tue, 10 May 2022 05:55:17 -0700 (PDT) Date: Tue, 10 May 2022 13:55:13 +0100 From: Liviu Dudau To: Sudeep Holla List-Id: Cc: carsten.haitzler@foss.arm.com, carsten.haitzler@arm.com, soc@kernel.org, linux-arm-kernel@lists.infradead.org, Robin Murphy Subject: Re: [PATCH] arm64: defconfig: Enable modules for arm displays Message-ID: References: <20220509125510.152114-1-carsten.haitzler@foss.arm.com> <20220510111545.uqatdfthc6lv5p7i@bogus> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220510111545.uqatdfthc6lv5p7i@bogus> On Tue, May 10, 2022 at 12:15:45PM +0100, Sudeep Holla wrote: > + Liviu, Robin > > On Mon, May 09, 2022 at 01:55:10PM +0100, carsten.haitzler@foss.arm.com wrote: > > Key devices that support displays on SoCs like the Komeda DRM driver, the > > older HDLCD were not enabled by default and should be so displays can work > > out of the box on defconfig. Also Candence I2C support should be enabled so > > the PHY and thus displays can work too. > > > > While at it, can we get these too enabled which are needed on JUNO IIUC. > CONFIG_DRM_I2C_NXP_TDA998X > CONFIG_DRM_I2C_NXP_TDA9950 I would not enable by default TDA9950 as that one is for CEC, which Juno doesn't implement so you get warnings everytime time tda998x probes. Best regards, Liviu > > Liviu/Robin who use HDLCD more than me on Juno can confirm if these are > needed or not. I seem to have these for some HDLCD clock testing using SCMI. > > -- > Regards, > Sudeep -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66C62C433EF for ; Tue, 10 May 2022 13:01:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Tue, 10 May 2022 05:55:17 -0700 (PDT) Date: Tue, 10 May 2022 13:55:13 +0100 From: Liviu Dudau To: Sudeep Holla Cc: carsten.haitzler@foss.arm.com, carsten.haitzler@arm.com, soc@kernel.org, linux-arm-kernel@lists.infradead.org, Robin Murphy Subject: Re: [PATCH] arm64: defconfig: Enable modules for arm displays Message-ID: References: <20220509125510.152114-1-carsten.haitzler@foss.arm.com> <20220510111545.uqatdfthc6lv5p7i@bogus> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220510111545.uqatdfthc6lv5p7i@bogus> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220510_055521_292629_8C96A5FB X-CRM114-Status: GOOD ( 16.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVHVlLCBNYXkgMTAsIDIwMjIgYXQgMTI6MTU6NDVQTSArMDEwMCwgU3VkZWVwIEhvbGxhIHdy b3RlOgo+ICsgTGl2aXUsIFJvYmluCj4gCj4gT24gTW9uLCBNYXkgMDksIDIwMjIgYXQgMDE6NTU6 MTBQTSArMDEwMCwgY2Fyc3Rlbi5oYWl0emxlckBmb3NzLmFybS5jb20gd3JvdGU6Cj4gPiBLZXkg ZGV2aWNlcyB0aGF0IHN1cHBvcnQgZGlzcGxheXMgb24gU29DcyBsaWtlIHRoZSBLb21lZGEgRFJN IGRyaXZlciwgdGhlCj4gPiBvbGRlciBIRExDRCB3ZXJlIG5vdCBlbmFibGVkIGJ5IGRlZmF1bHQg YW5kIHNob3VsZCBiZSBzbyBkaXNwbGF5cyBjYW4gd29yawo+ID4gb3V0IG9mIHRoZSBib3ggb24g ZGVmY29uZmlnLiBBbHNvIENhbmRlbmNlIEkyQyBzdXBwb3J0IHNob3VsZCBiZSBlbmFibGVkIHNv Cj4gPiB0aGUgUEhZIGFuZCB0aHVzIGRpc3BsYXlzIGNhbiB3b3JrIHRvby4KPiA+IAo+IAo+IFdo aWxlIGF0IGl0LCBjYW4gd2UgZ2V0IHRoZXNlIHRvbyBlbmFibGVkIHdoaWNoIGFyZSBuZWVkZWQg b24gSlVOTyBJSVVDLgo+IENPTkZJR19EUk1fSTJDX05YUF9UREE5OThYCj4gQ09ORklHX0RSTV9J MkNfTlhQX1REQTk5NTAKCkkgd291bGQgbm90IGVuYWJsZSBieSBkZWZhdWx0IFREQTk5NTAgYXMg dGhhdCBvbmUgaXMgZm9yIENFQywgd2hpY2ggSnVubyBkb2Vzbid0CmltcGxlbWVudCBzbyB5b3Ug Z2V0IHdhcm5pbmdzIGV2ZXJ5dGltZSB0aW1lIHRkYTk5OHggcHJvYmVzLgoKQmVzdCByZWdhcmRz LApMaXZpdQoKPiAKPiBMaXZpdS9Sb2JpbiB3aG8gdXNlIEhETENEIG1vcmUgdGhhbiBtZSBvbiBK dW5vIGNhbiBjb25maXJtIGlmIHRoZXNlIGFyZQo+IG5lZWRlZCBvciBub3QuIEkgc2VlbSB0byBo YXZlIHRoZXNlIGZvciBzb21lIEhETENEIGNsb2NrIHRlc3RpbmcgdXNpbmcgU0NNSS4KPiAKPiAt LSAKPiBSZWdhcmRzLAo+IFN1ZGVlcAoKLS0gCj09PT09PT09PT09PT09PT09PT09CnwgSSB3b3Vs ZCBsaWtlIHRvIHwKfCBmaXggdGhlIHdvcmxkLCAgfAp8IGJ1dCB0aGV5J3JlIG5vdCB8CnwgZ2l2 aW5nIG1lIHRoZSAgIHwKIFwgc291cmNlIGNvZGUhICAvCiAgLS0tLS0tLS0tLS0tLS0tCiAgICDC r1xfKOODhClfL8KvCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3Rz LmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5m by9saW51eC1hcm0ta2VybmVsCg==