From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AE08C4332F for ; Tue, 17 May 2022 10:11:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343575AbiEQKLt (ORCPT ); Tue, 17 May 2022 06:11:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344059AbiEQKLL (ORCPT ); Tue, 17 May 2022 06:11:11 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9F244C41B; Tue, 17 May 2022 03:09:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652782199; x=1684318199; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=o0rfa2LgldSLeyeg6O3xFJ5xH9GUQLhGfm/buC6Zf/Q=; b=ja58K5Odw1f9B6WjkZSQJ+2Sd7NgfggZ8M6PwrS6Rt5QWUHjTXN7A4EX Se7UhVOh9NvaAOB/NOrVAF2VZ8ubbI6St9i95ZJJAThLN7GHaaIcDpCU+ SxWdsJMMLnlP7vSQKt8RjMIN6GTceQNWuODVf03tl0WoK1ju6yTTg2ctR kX6tZe+l2DgClv9e2UoOmprNHlQ8USAmihnX30IlAbZasBJO3W0c4F2cI 3NyPzN8mvQ+F5R9kWmo38u5UYc8d+MI3xmvgwKrefwugpWZrBUzvKIQcz sftnLa2iKjHmh7TuAc7pW2JnO0el0XMfpUCyZ+0tfQY1MxNudxfEsxits g==; X-IronPort-AV: E=McAfee;i="6400,9594,10349"; a="357544196" X-IronPort-AV: E=Sophos;i="5.91,232,1647327600"; d="scan'208";a="357544196" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 May 2022 03:09:58 -0700 X-IronPort-AV: E=Sophos;i="5.91,232,1647327600"; d="scan'208";a="816831982" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.162]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 May 2022 03:09:55 -0700 Received: by lahna (sSMTP sendmail emulation); Tue, 17 May 2022 13:09:53 +0300 Date: Tue, 17 May 2022 13:09:53 +0300 From: Mika Westerberg To: Andy Shevchenko Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko , Linus Walleij Subject: Re: [PATCH v1 1/2] pinctrl: intel: make irq_chip immutable Message-ID: References: <20220516185618.32448-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220516185618.32448-1-andriy.shevchenko@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Mon, May 16, 2022 at 09:56:17PM +0300, Andy Shevchenko wrote: > Since recently, the kernel is nagging about mutable irq_chips: > > "not an immutable chip, please consider fixing it!" > > Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new > helper functions and call the appropriate gpiolib functions. > > While at it, align IRQ chip callback names with member names for > the sake of consistency. Or for the sake of inconsistency? ;-) All the other structs are not using this kind of alignment and I would like to keep this one matching the rest too. Also I prefer the format currently used in the driver.