From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A042C433EF for ; Tue, 17 May 2022 16:42:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351121AbiEQQms (ORCPT ); Tue, 17 May 2022 12:42:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351106AbiEQQmp (ORCPT ); Tue, 17 May 2022 12:42:45 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE1EC403D7 for ; Tue, 17 May 2022 09:42:43 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 82EB9B8181B for ; Tue, 17 May 2022 16:42:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73A2DC385B8; Tue, 17 May 2022 16:42:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1652805761; bh=1IrxNJ1bp3kbA2oD6OHuufL2ZTrxl/ACrlKCvG7jTxQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hQeQSS+V1lj64xDAGzkxKJCHnkihMRbBKk2KbalQc+XmCt4HPchv4lCVWrSfzd2Od 5K9XN4lutNDsC40vvqk8mXq0gt+/ob0xmC3xmHOjP5iI7Kh/J2VY2WTe5UVmzEk3uH YDKCHwuDl7AEKV/0qhQOD4dXaCjUxV7iIGJlNg1kxu7e/RDsyVbHof/Vr2HYcw2FXG Vdmt22FdW9mQG5UDeUIpwIXE5D3u+PeV5Dt6Aie3aCTujOhLapO+j8pGhnxZKoPV4Q Izz8BTiWQmqm8/WksnkH830yWMBwQZe8w3ylhaGQ85eS+VAL26Dlw2J0L8CNHZCqtg EsTsYVHVsDQfg== Date: Wed, 18 May 2022 00:33:52 +0800 From: Jisheng Zhang To: Anup Patel Cc: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Alexandre Ghiti , linux-riscv , "linux-kernel@vger.kernel.org List" , kasan-dev@googlegroups.com Subject: Re: [PATCH v2 2/4] riscv: introduce unified static key mechanism for CPU features Message-ID: References: <20220508160749.984-1-jszhang@kernel.org> <20220508160749.984-3-jszhang@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 17, 2022 at 09:31:50AM +0530, Anup Patel wrote: > On Mon, May 16, 2022 at 11:02 PM Jisheng Zhang wrote: > > ... > > Currently, RISCV_ISA_EXT_MAX equals to 64 while the base ID is 26. > > In those 26 base IDs, only F/D and V need static key, it means > > we waste at least 24 static keys. > > If you want to save space of unused static keys then there are other > ways. > > For example, you can create a small static key array which has > many-to-one relation with the ISA extension numbers. For ISA extension "any problem in computer science can be solved with another layer of indirection" ;) I see your points, thanks very much! But I think the array should be a static inline function to make use of compiler optimization to avoid the array references for performance. And the static key check maybe used in modules, I want to export less vars. I'm cooking the patches, will send out for review soon. > which are always ON or always OFF, we can use fixed FALSE and > TRUE keys. Something like below. > > enum riscv_isa_ext_key { > RISCV_ISA_EXT_KEY_FALSE = 0, > RISCV_ISA_EXT_KEY_TRUE, > RISCV_ISA_EXT_KEY_FLOAD, /* For 'F' and 'D' */ > RISCV_ISA_EXT_KEY_VECTOR, /* For all vector extensions */ > RISCV_ISA_EXT_KEY_SVINVAL, > RISCV_ISA_EXT_KEY_SSCOFPMT, > RISCV_ISA_EXT_KEY_MAX, > }; > > extern unsigned char __riscv_isa_ext_id2key[RISCV_ISA_EXT_ID_MAX]; > extern struct static_key_false __riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_MAX]; > > static __always_inline bool __riscv_isa_extension_keycheck(unsigned int ext) > { > if (RISCV_ISA_EXT_ID_MAX <= ext) > return false; > return static_branch_unlikely(&__riscv_isa_ext_keys[__riscv_isa_ext_id2key[ext]]); > } > #define riscv_isa_extension_keycheck(ext) \ > __riscv_isa_extension_keycheck(RISCV_ISA_EXT_##ext) > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3EA62C433EF for ; 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Tue, 17 May 2022 16:42:46 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nr0HT-00EtBB-RP for linux-riscv@lists.infradead.org; Tue, 17 May 2022 16:42:45 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 77DF0B81AFA; Tue, 17 May 2022 16:42:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73A2DC385B8; Tue, 17 May 2022 16:42:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1652805761; bh=1IrxNJ1bp3kbA2oD6OHuufL2ZTrxl/ACrlKCvG7jTxQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hQeQSS+V1lj64xDAGzkxKJCHnkihMRbBKk2KbalQc+XmCt4HPchv4lCVWrSfzd2Od 5K9XN4lutNDsC40vvqk8mXq0gt+/ob0xmC3xmHOjP5iI7Kh/J2VY2WTe5UVmzEk3uH YDKCHwuDl7AEKV/0qhQOD4dXaCjUxV7iIGJlNg1kxu7e/RDsyVbHof/Vr2HYcw2FXG Vdmt22FdW9mQG5UDeUIpwIXE5D3u+PeV5Dt6Aie3aCTujOhLapO+j8pGhnxZKoPV4Q Izz8BTiWQmqm8/WksnkH830yWMBwQZe8w3ylhaGQ85eS+VAL26Dlw2J0L8CNHZCqtg EsTsYVHVsDQfg== Date: Wed, 18 May 2022 00:33:52 +0800 From: Jisheng Zhang To: Anup Patel Cc: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Alexandre Ghiti , linux-riscv , "linux-kernel@vger.kernel.org List" , kasan-dev@googlegroups.com Subject: Re: [PATCH v2 2/4] riscv: introduce unified static key mechanism for CPU features Message-ID: References: <20220508160749.984-1-jszhang@kernel.org> <20220508160749.984-3-jszhang@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220517_094244_218114_A034941E X-CRM114-Status: GOOD ( 16.11 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, May 17, 2022 at 09:31:50AM +0530, Anup Patel wrote: > On Mon, May 16, 2022 at 11:02 PM Jisheng Zhang wrote: > > ... > > Currently, RISCV_ISA_EXT_MAX equals to 64 while the base ID is 26. > > In those 26 base IDs, only F/D and V need static key, it means > > we waste at least 24 static keys. > > If you want to save space of unused static keys then there are other > ways. > > For example, you can create a small static key array which has > many-to-one relation with the ISA extension numbers. For ISA extension "any problem in computer science can be solved with another layer of indirection" ;) I see your points, thanks very much! But I think the array should be a static inline function to make use of compiler optimization to avoid the array references for performance. And the static key check maybe used in modules, I want to export less vars. I'm cooking the patches, will send out for review soon. > which are always ON or always OFF, we can use fixed FALSE and > TRUE keys. Something like below. > > enum riscv_isa_ext_key { > RISCV_ISA_EXT_KEY_FALSE = 0, > RISCV_ISA_EXT_KEY_TRUE, > RISCV_ISA_EXT_KEY_FLOAD, /* For 'F' and 'D' */ > RISCV_ISA_EXT_KEY_VECTOR, /* For all vector extensions */ > RISCV_ISA_EXT_KEY_SVINVAL, > RISCV_ISA_EXT_KEY_SSCOFPMT, > RISCV_ISA_EXT_KEY_MAX, > }; > > extern unsigned char __riscv_isa_ext_id2key[RISCV_ISA_EXT_ID_MAX]; > extern struct static_key_false __riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_MAX]; > > static __always_inline bool __riscv_isa_extension_keycheck(unsigned int ext) > { > if (RISCV_ISA_EXT_ID_MAX <= ext) > return false; > return static_branch_unlikely(&__riscv_isa_ext_keys[__riscv_isa_ext_id2key[ext]]); > } > #define riscv_isa_extension_keycheck(ext) \ > __riscv_isa_extension_keycheck(RISCV_ISA_EXT_##ext) > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv