On Mon, Jun 27, 2022 at 04:14:12PM +0100, Marc Zyngier wrote:

> +.Linit_sve:	/* SVE register access */
> +	msr	cptr_el2, x0			// Disable SVE traps
> +	bic	x0, x0, #CPTR_EL2_TZ
> +	msr	cptr_el2, x0

Same mrs/msr thing as with the SME patch - if the code is correct it
probably needs a comment.